From nobody Mon Feb 9 21:03:00 2026 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C596F245011; Thu, 17 Apr 2025 12:04:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744891469; cv=none; b=iQ0y0ksAvVwCWZE1gox0MIdaStSBeDU+Ny0BvNJmdiG4OjfuwaEPzSLv1QNFkDBv6q0qLPvczOfGK7ycP+rWW1Xxk/90hkOITytqBWkrGQzxnNvKwJy022DWRMjae4NTvlM8pGpZ7krDgPPUMtuZyd5mJjE3HGDAloAEpZMq+zs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744891469; c=relaxed/simple; bh=civ/b628nMGW7LYUW9/9NZ+1VxOVKi/jE4Kf4cHYVvg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=jcGFDeAZmTFo1yIVFImdFn/y0CPGXXl1r2qwSma//tm3uEZmTHcSlVbk96cPsPVUSLZMbC/9rAiedabZmrTq8u80E14R87kLmkrV0c0T5DipL5HUoD0rfkNiS0CszoH48VCAcqWUm8Hrl0em8/DT90gzMy/Q+rA8UqN51dKZP70= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=KnQETKix; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="KnQETKix" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 53HC4Mw0683328 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 17 Apr 2025 07:04:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1744891462; bh=kOJJ2yFsOE7ZiB04CjWUhqyskQzHFg2rmt8TzH7FxHI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=KnQETKix7UvmAeCok/jBORsShMIBg9qiVWibPkuuFq6msyVL1djKArv5gJyLw1scB vNBfVVVZdgBeeaK43ta6KsI75zHrUkZN1Wxa6niSKDgfQsDIfkilsLfmM5YReyYJGq 1HTpofyF/kyFQWDoEUBX+3xSxxt28fpMOPfR9zL4= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 53HC4MmP077828 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 17 Apr 2025 07:04:22 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 17 Apr 2025 07:04:21 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 17 Apr 2025 07:04:21 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [10.24.72.113]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53HC47VL004789; Thu, 17 Apr 2025 07:04:18 -0500 From: Siddharth Vadapalli To: , , , , , CC: , , , , Subject: [PATCH 3/7] arm64: dts: ti: k3-j721e: add ranges for PCIe0 DAT1 and PCIe1 DAT1 Date: Thu, 17 Apr 2025 17:34:03 +0530 Message-ID: <20250417120407.2646929-4-s-vadapalli@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250417120407.2646929-1-s-vadapalli@ti.com> References: <20250417120407.2646929-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The PCIe0 DAT1 and PCIe1 DAT1 are 4 GB address regions in the 64-bit address space of the respective PCIe Controllers. Hence, update the ranges to include them. Signed-off-by: Siddharth Vadapalli --- arch/arm64/boot/dts/ti/k3-j721e.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/= k3-j721e.dtsi index a7f2f52f42f7..4f5d277c97a4 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi @@ -126,6 +126,8 @@ cbass_main: bus@100000 { <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */ <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71 */ <0x00 0x6f000000 0x00 0x6f000000 0x00 0x00310000>, /* A72 PERIPHBASE */ + <0x40 0x00000000 0x40 0x00000000 0x00 0x08000000>, /* PCIe0 DAT1 */ + <0x41 0x00000000 0x41 0x00000000 0x00 0x08000000>, /* PCIe1 DAT1 */ <0x44 0x00000000 0x44 0x00000000 0x00 0x08000000>, /* PCIe2 DAT */ <0x44 0x10000000 0x44 0x10000000 0x00 0x08000000>, /* PCIe3 DAT */ <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */ --=20 2.34.1