From nobody Fri Dec 19 20:34:32 2025 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1951289357; Tue, 15 Apr 2025 11:19:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744715950; cv=none; b=ErtpdrN2RR6LvKrChFRN8JpLBTxEBU7xZ6F0KEnIgfgqMrYx+sxwsBkbLvC+gDGJ+/Soq3ciHILAc0kabHw+JtPFnarMub0ynDwrPlgRJtCbI7+eGXy4r1K3nNL45rzweb0+6aUO6xI0uMMkmKZb7VozK6Qok17l7AQkjcTi6xs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744715950; c=relaxed/simple; bh=4r9DjLhexbkPaME0MfgcL7TQBXGAQ6UN2Wc4/ZGwh7Q=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=NKMO0BgsJiiZz0cz1OO9u2/KgPQktW2HiRhdb/JQvzL9vDqUsyaQMr8UNpOMaNciN26r6faE7gboT6J5m0zBXNsa2udcOCLNEvPWpSU917gnM/fqH9YreCrQ5VxhP6cboLCUGUlMgQJOXHI8ay5iQCJDEduaaISlW3+pEH5TYuY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=57/gd+C6; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="57/gd+C6" Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 53F7cHed002917; Tue, 15 Apr 2025 13:18:42 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= YLoRpcl9tXKtJLd+8WJKIJFOTcibTvljhF2F7NJ//oI=; b=57/gd+C6H30Mh4iZ aXksiGpXyY8P+14TpOknatRLPbbQulu2qLYcGUHNmP2/AfHKLzHrTfeHzC0+6if2 QU9Bibmt5KOjQ8P+9k+PwJuxnqZR8CG4hXh8ni8vk0NaXi/uCxA5cExOPvPqmxj4 qPBzOQBH9FRtq9noftV4n+VV89LnYSvkUTLW9QqBEPYF07UxsEHF0ULooY8nesbL /gy2twGs35daVZsbJ1goF0wECIcjxGarptKBn6CWmZARM05DAsSXCb+/gieEgOaB +vgqHZLkb8z1+SRNb0ro7m0/P4dQmRFOgQAAlLay/upa8Wq8RwWpwTZ1/VFcdA0t KNR40Q== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 45yfh1vvwf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 15 Apr 2025 13:18:42 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 0E2184004D; Tue, 15 Apr 2025 13:17:49 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 5BA949B3DEE; Tue, 15 Apr 2025 13:17:11 +0200 (CEST) Received: from localhost (10.130.77.120) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 15 Apr 2025 13:17:11 +0200 From: Christian Bruel To: , , , , CC: , , , , , Christian Bruel Subject: [PATCH v2 2/6] arm64: dts: st: Use 128kB size for aliased GIC400 register access on stm32mp25 SoCs Date: Tue, 15 Apr 2025 13:16:50 +0200 Message-ID: <20250415111654.2103767-3-christian.bruel@foss.st.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250415111654.2103767-1-christian.bruel@foss.st.com> References: <20250415111654.2103767-1-christian.bruel@foss.st.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-15_05,2025-04-10_01,2024-11-22_01 Content-Type: text/plain; charset="utf-8" Adjust the size of 8kB GIC regions to 128kB so that each 4kB is mapped 16 times over a 64kB region. The offset is then adjusted in the irq-gic driver. see commit 12e14066f4835 ("irqchip/GIC: Add workaround for aliased GIC400") Fixes: 5d30d03aaf785 ("arm64: dts: st: introduce stm32mp25 SoCs family") Signed-off-by: Christian Bruel Suggested-by: Marc Zyngier Acked-by: Marc Zyngier --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/s= t/stm32mp251.dtsi index 379e290313dc..87110f91e489 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -119,9 +119,9 @@ intc: interrupt-controller@4ac00000 { #interrupt-cells =3D <3>; interrupt-controller; reg =3D <0x0 0x4ac10000 0x0 0x1000>, - <0x0 0x4ac20000 0x0 0x2000>, - <0x0 0x4ac40000 0x0 0x2000>, - <0x0 0x4ac60000 0x0 0x2000>; + <0x0 0x4ac20000 0x0 0x20000>, + <0x0 0x4ac40000 0x0 0x20000>, + <0x0 0x4ac60000 0x0 0x20000>; }; =20 psci { --=20 2.34.1