From nobody Fri Dec 19 17:38:09 2025 Received: from mail-m49234.qiye.163.com (mail-m49234.qiye.163.com [45.254.49.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9312227A119; Tue, 15 Apr 2025 10:32:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744713137; cv=none; b=RoWDKGL+H3//yGBEXQJufa9Gp2lOSAvMe5+N4qTHGQs9YinhDUcqHf7SN5+sc3GY+B5wcGwW5MaFBwhI4fT9OUewY5rGXPK7RDjKjolzPbP69B90uAS+edCiy682ltKsPt+TjhIbYFZhKzNr+fkF30pQIt/E6xU9NFXfUILfc1A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744713137; c=relaxed/simple; bh=pHjveY6KoURnQuwE5Fd0lcHQLQ3u3khaDsZ0Fw6YzOQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=bUPLntsTTi4zCy8saExqVIf0IezFvqbeyNZhfrwr9X2pS1I4E/gmiy79LaiNukQBQ0qis2gJzelj5WuyUPuygmsK39epdHJK/vguECRKAMQXQcKRfAgk/l7Y0XoY2fyWcgcLft9OucVSOl59msKVlkyozyBtQ3zDW/fiLuf2zPM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=Fpvav24r; arc=none smtp.client-ip=45.254.49.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="Fpvav24r" Received: from localhost.localdomain (unknown [103.29.142.67]) by smtp.qiye.163.com (Hmail) with ESMTP id 11f2f600c; Tue, 15 Apr 2025 18:32:07 +0800 (GMT+08:00) From: Kever Yang To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, Kever Yang , devicetree@vger.kernel.org, Conor Dooley , Rob Herring , Srinivas Kandagatla , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/3] dt-bindings: nvmem: rockchip,otp: Add support for rk3562 and rk3568 Date: Tue, 15 Apr 2025 18:32:01 +0800 Message-Id: <20250415103203.82972-2-kever.yang@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250415103203.82972-1-kever.yang@rock-chips.com> References: <20250415103203.82972-1-kever.yang@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkaQ0xIVkkeGkhDTEMdSkIYGVYVFAkWGhdVEwETFh oSFyQUDg9ZV1kYEgtZQVlKS0hVSUJVSk9JVU1MWVdZFhoPEhUdFFlBWU9LSFVKS0lPT09IVUpLS1 VKQktLWQY+ X-HM-Tid: 0a963901956e03afkunm11f2f600c X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PVE6PRw*NzJRMBgIMh4dIi4w GgpPCiJVSlVKTE9PTEpISklDQklDVTMWGhIXVRAeDR4JVQIaFRw7CRQYEFYYExILCFUYFBZFWVdZ EgtZQVlKS0hVSUJVSk9JVU1MWVdZCAFZQUhNTU43Bg++ DKIM-Signature: a=rsa-sha256; b=Fpvav24r00q9fYbGPkYAhH/bkoQv1u1vQmhEWGHRQNhoex6kebUG3A5krHs2i2h3fOqORNA6vqk3FqWVIAZbfmLkhzl6y/o+57CdlQgp/2FV4Bdn3tFyQDgB0e8PCWYxSQfY3QrqyNm1ytP5ozwjq0Ghp04uvIoTNLqI11gjDo4=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=iiNUR2t26Uu7+OW1iXl8pE11P0d1ljLW8CEOcUnql5c=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Add compatible entry for the otp controller in rk3562 and rk3568, add schema for different clock names for new entry. Signed-off-by: Kever Yang Reviewed-by: Heiko Stuebner Reviewed-by: Rob Herring (Arm) --- Changes in v3: - update the clock name from "usr" to "otp" and re-order to sync with other soc. Changes in v2: - Update the commit message and add maxItems in schema. .../bindings/nvmem/rockchip,otp.yaml | 53 ++++++++++++++++--- 1 file changed, 46 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml b/Do= cumentation/devicetree/bindings/nvmem/rockchip,otp.yaml index a44d44b32809..8b257662f282 100644 --- a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml +++ b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml @@ -14,6 +14,8 @@ properties: enum: - rockchip,px30-otp - rockchip,rk3308-otp + - rockchip,rk3562-otp + - rockchip,rk3568-otp - rockchip,rk3588-otp =20 reg: @@ -25,19 +27,15 @@ properties: =20 clock-names: minItems: 3 - items: - - const: otp - - const: apb_pclk - - const: phy - - const: arb + maxItems: 4 =20 resets: minItems: 1 - maxItems: 3 + maxItems: 4 =20 reset-names: minItems: 1 - maxItems: 3 + maxItems: 4 =20 required: - compatible @@ -62,12 +60,45 @@ allOf: properties: clocks: maxItems: 3 + clock-names: + items: + - const: otp + - const: apb_pclk + - const: phy resets: maxItems: 1 reset-names: items: - const: phy =20 + - if: + properties: + compatible: + contains: + enum: + - rockchip,rk3562-otp + - rockchip,rk3568-otp + then: + properties: + clocks: + minItems: 4 + maxItems: 4 + clock-names: + items: + - const: otp + - const: apb_pclk + - const: phy + - const: sbpi + resets: + minItems: 4 + maxItems: 4 + reset-names: + items: + - const: otp + - const: apb + - const: phy + - const: sbpi + - if: properties: compatible: @@ -78,8 +109,16 @@ allOf: properties: clocks: minItems: 4 + maxItems: 4 + clock-names: + items: + - const: otp + - const: apb_pclk + - const: phy + - const: arb resets: minItems: 3 + maxItems: 3 reset-names: items: - const: otp --=20 2.25.1 From nobody Fri Dec 19 17:38:09 2025 Received: from mail-m32116.qiye.163.com (mail-m32116.qiye.163.com [220.197.32.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7CAD3297A6B for ; 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arc=none smtp.client-ip=220.197.32.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="ZEQsGoQr" Received: from localhost.localdomain (unknown [103.29.142.67]) by smtp.qiye.163.com (Hmail) with ESMTP id 11f2f6013; Tue, 15 Apr 2025 18:32:09 +0800 (GMT+08:00) From: Kever Yang To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, Finley Xiao , Kever Yang , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v3 2/3] nvmem: rockchip-otp: Add support for rk3568-otp Date: Tue, 15 Apr 2025 18:32:02 +0800 Message-Id: <20250415103203.82972-3-kever.yang@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250415103203.82972-1-kever.yang@rock-chips.com> References: <20250415103203.82972-1-kever.yang@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkaTBpCVh1NTkxNGkxOH0oZQlYVFAkWGhdVEwETFh oSFyQUDg9ZV1kYEgtZQVlKS0hVSUJVSk9JVU1MWVdZFhoPEhUdFFlBWU9LSFVKS0lPT09IVUpLS1 VKQktLWQY+ X-HM-Tid: 0a9639019ccd03afkunm11f2f6013 X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6MQg6Tjo4FDJITxgxIh8tIh9D ED8wFC5VSlVKTE9PTEpISkhLSE5DVTMWGhIXVRAeDR4JVQIaFRw7CRQYEFYYExILCFUYFBZFWVdZ EgtZQVlKS0hVSUJVSk9JVU1MWVdZCAFZQUhCTUM3Bg++ DKIM-Signature: a=rsa-sha256; b=ZEQsGoQrNsEKpBCqw4Z0Loc4swUmTJodmrcKn6wQI4dgqGTQNz0k2zf/E6xDi9ZKpMcGmgcXDxTnfpWu7r+mj9bghqnwPJoj1QHMbuxlmZ1BTt29+Lq3lF3TwK+PFobULl2CbK9QUfdNU9/0afu7YW7nQKzf1n9bH5qxuEIsE8A=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=3WtYajYvmFhZ8aAdgWvECPsAEGnYPULDIqp3fCwCsOI=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" From: Finley Xiao This adds the necessary data for handling otp the rk3568. Signed-off-by: Finley Xiao Signed-off-by: Kever Yang Reviewed-by: Heiko Stuebner Tested-by: Heiko Stuebner --- Changes in v3: - rebase on rk3576 and rk3528, changes suggest by Jonas Changes in v2: None drivers/nvmem/rockchip-otp.c | 69 ++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index 45bbb6147fb7..cfb69bc58869 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -27,6 +27,7 @@ #define OTPC_USER_CTRL 0x0100 #define OTPC_USER_ADDR 0x0104 #define OTPC_USER_ENABLE 0x0108 +#define OTPC_USER_QP 0x0120 #define OTPC_USER_Q 0x0124 #define OTPC_INT_STATUS 0x0304 #define OTPC_SBPI_CMD0_OFFSET 0x1000 @@ -184,6 +185,58 @@ static int px30_otp_read(void *context, unsigned int o= ffset, return ret; } =20 +static int rk3568_otp_read(void *context, unsigned int offset, void *val, + size_t count) +{ + struct rockchip_otp *otp =3D context; + u16 *buf =3D val; + u32 otp_qp; + int ret; + + ret =3D rockchip_otp_reset(otp); + if (ret) { + dev_err(otp->dev, "failed to reset otp phy\n"); + return ret; + } + + ret =3D rockchip_otp_ecc_enable(otp, true); + if (ret) { + dev_err(otp->dev, "rockchip_otp_ecc_enable err\n"); + return ret; + } + + writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL); + udelay(5); + + while (count--) { + writel(offset++ | OTPC_USER_ADDR_MASK, + otp->base + OTPC_USER_ADDR); + writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK, + otp->base + OTPC_USER_ENABLE); + + ret =3D rockchip_otp_wait_status(otp, OTPC_INT_STATUS, + OTPC_USER_DONE); + if (ret) { + dev_err(otp->dev, "timeout during read setup\n"); + goto read_end; + } + + otp_qp =3D readl(otp->base + OTPC_USER_QP); + if (((otp_qp & 0xc0) =3D=3D 0xc0) || (otp_qp & 0x20)) { + ret =3D -EIO; + dev_err(otp->dev, "ecc check error during read setup\n"); + goto read_end; + } + + *buf++ =3D readl(otp->base + OTPC_USER_Q); + } + +read_end: + writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL); + + return ret; +} + static int rk3588_otp_read(void *context, unsigned int offset, void *val, size_t count) { @@ -280,6 +333,18 @@ static const struct rockchip_data px30_data =3D { .reg_read =3D px30_otp_read, }; =20 +static const char * const rk3568_otp_clocks[] =3D { + "otp", "apb_pclk", "phy", "sbpi", +}; + +static const struct rockchip_data rk3568_data =3D { + .size =3D 0x80, + .word_size =3D sizeof(u16), + .clks =3D rk3568_otp_clocks, + .num_clks =3D ARRAY_SIZE(rk3568_otp_clocks), + .reg_read =3D rk3568_otp_read, +}; + static const struct rockchip_data rk3576_data =3D { .size =3D 0x100, .read_offset =3D 0x700, @@ -311,6 +376,10 @@ static const struct of_device_id rockchip_otp_match[] = =3D { .compatible =3D "rockchip,rk3308-otp", .data =3D &px30_data, }, + { + .compatible =3D "rockchip,rk3568-otp", + .data =3D &rk3568_data, + }, { .compatible =3D "rockchip,rk3576-otp", .data =3D &rk3576_data, --=20 2.25.1 From nobody Fri Dec 19 17:38:09 2025 Received: from mail-m49248.qiye.163.com (mail-m49248.qiye.163.com [45.254.49.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 475BA27B4EF for ; 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b=EfC4sK23XRiJ7p7rSdymQJ/3mM6Mrl8gix4vDQT7F8LEMdZXMCdYJ/1dx3tPnAhb1jBov8XyTwxpYq1xuayS25WsmFTtiEs3JnWnO7u98sm36bHsY3/OsWpn7XGN8WK3ohUKhgZ2uj/eGAvgSvT7n+CmLfnFypCTZPgv5OfQUcg=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=x2rU+2/DAdfeDTzcu3czX3OXDy+kV2hraQlukBVYidA=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" From: Finley Xiao This adds the necessary data for handling otp on the rk3562. Signed-off-by: Finley Xiao Signed-off-by: Kever Yang Reviewed-by: Heiko Stuebner Tested-by: Willy Tarreau --- Changes in v3: - Use rk3568 data structure for rk3562 Changes in v2: None drivers/nvmem/rockchip-otp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index cfb69bc58869..62ce22d72586 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -376,6 +376,10 @@ static const struct of_device_id rockchip_otp_match[] = =3D { .compatible =3D "rockchip,rk3308-otp", .data =3D &px30_data, }, + { + .compatible =3D "rockchip,rk3562-otp", + .data =3D &rk3568_data, + }, { .compatible =3D "rockchip,rk3568-otp", .data =3D &rk3568_data, --=20 2.25.1