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Tue, 15 Apr 2025 06:53:22 -0700 (PDT) From: Stephan Gerhold Date: Tue, 15 Apr 2025 15:52:48 +0200 Subject: [PATCH 5/8] arm64: dts: qcom: apq8016-sbc: Move non-console UART pinctrl to board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250415-msm8916-console-pinctrl-v1-5-a1d33ea994b9@linaro.org> References: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> In-Reply-To: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Day , Casey Connolly X-Mailer: b4 0.14.2 Prepare for removing the generic UART pinctrl templates from msm8916.dtsi by copying the definition for the 4 pin UART1 instance into apq8016-sbc.dts Having it defined separately in the board DT file makes it clear that the set of pins/pull etc are specific to the board and UART use case. No functional change. Signed-off-by: Stephan Gerhold --- arch/arm64/boot/dts/qcom/apq8016-sbc.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts b/arch/arm64/boot/dts= /qcom/apq8016-sbc.dts index f12a5e2b1e8c2cce6e85b8444c97a7e0d7b7c58f..b0c594c5f236c9c1d334e6acfca= a7e41c1f9f3a5 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts @@ -597,6 +597,21 @@ &tlmm { "USR_LED_2_CTRL", /* GPIO 120 */ "SB_HS_ID"; =20 + blsp_uart1_default: blsp-uart1-default-state { + /* TX, RX, CTS_N, RTS_N */ + pins =3D "gpio0", "gpio1", "gpio2", "gpio3"; + function =3D "blsp_uart1"; + drive-strength =3D <16>; + bias-disable; + }; + + blsp_uart1_sleep: blsp-uart1-sleep-state { + pins =3D "gpio0", "gpio1", "gpio2", "gpio3"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + sdc2_cd_default: sdc2-cd-default-state { pins =3D "gpio38"; function =3D "gpio"; --=20 2.47.2