From nobody Tue Dec 16 04:06:50 2025 Received: from mail-ej1-f49.google.com (mail-ej1-f49.google.com [209.85.218.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A384178395 for ; Tue, 15 Apr 2025 13:53:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725202; cv=none; b=H0N3v7BXzuA0QgVDMbdX0Hmc2QYbzwsIHYCpTrD/1ihf9Yh0BMJjg8BjptpGSNT5pYbcCHVtVEOgsgwVj3ntN0M8yTJKStGzyxuewd/UH+4yaQNDjGhUcCU/3E+Dab0N51zMGMEClAtXMxQdDIXkraLSyaMPUPtE4L8G5mn4quA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725202; c=relaxed/simple; bh=7rT0DnZ40BX0chd62YZIMarCtZkIZTK+AlWOSsnMwGU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QzJLy7Pa9xrMYwiq7roAeqMgHiHID8PrmvEjPGSG6f7qwBHdaZSiXiH1z9VJAUPnzcaSosCbKA9TonMND/fSdK3pQxuG1opQYH18IHWdUIGsEZSS27m/fI0BWRCZPJ/uJLevFLyUeoeNO8u4NBhYnIWftinzUcvkZ0HT/gPjx7I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=y7IMz9/t; arc=none smtp.client-ip=209.85.218.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="y7IMz9/t" Received: by mail-ej1-f49.google.com with SMTP id a640c23a62f3a-ac2a81e41e3so982416066b.1 for ; Tue, 15 Apr 2025 06:53:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1744725199; x=1745329999; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=S6tYxjgZnNiRfOX1HagPvU4+OfIiUTK0uIOiDBKkMjM=; b=y7IMz9/tz7QC4qUgfMWO0TWDSiNTNhL4gduoy/OHKLrBiVNzu1OyGP8P5FD7i68Rjw sb/M9r33+hrgykmJDPuMYKCrlXShESp5+TAwbG34Yboym2ZIqvaU7gI+F2ipF9YQ5Hii bgk4DDr6iAKRyYiB+shAy1QC0vqN2JmOJ+2c2Y/ZzluCdMrf9xu+OjfD9JAJUSZzIj4V lVZY3x/Pz/koSA6M4wKlq1PJSf94vb/Rf2gEyKuJPZsIHgzCVkSCE++m3SvmaZTgom+x asDo4fdIq9NTdjxRnO5LOHlbYtRto1Du1eMLPDNf++GZl4UB983ga22yiBqlPi0dOdb6 jAQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744725199; x=1745329999; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=S6tYxjgZnNiRfOX1HagPvU4+OfIiUTK0uIOiDBKkMjM=; b=cfxTLLlmoLkoYi2YkKY0UxqPNtsh+WDti0pkp+VDrmcxocKasfop+EM/kQKTNeC4ow gPPfv1F47lnyuyt3qtPUUK1Uye1b+ugs+05YXpjwI1axkA068fjxibe1Q4T5OpfDaZkQ RTudMQu6U18y9tpOTFe9cgqqnTPm5SiNBN2iqlHavV0HQkRp5hdVKhFQeJgV/tDdmbIA fv5tRTCad/JeqIWUWgS4GXUTFOUUXMsHhImD0s8vc1qdnb95NJ2PIJfRuuIo9cMOm84u t3JXuMY9WtHEGnaWtDfhDDicQKGpRBTV07pa83d4/g9Mn10Y0g3uiHJD8O7a1fiaTvR5 ULwA== X-Forwarded-Encrypted: i=1; AJvYcCXG37bz4E4AqxAu3xgH82Gg1OWIdtvE6LqjkugEhhc3mUr9zpjc8WbKA931JnCi0TOjqZd+op/F1bg23rU=@vger.kernel.org X-Gm-Message-State: AOJu0YwEyBNSDZGzmg7rhuRg0N0ItTYsz+H+Lsydm3NGt8wMFOiD9q8J QO9aPgdM4H2PkkUVlj8Hjtb3hKuFZTUpQ1AZlBB40OUxLk1n3XHzLfkJeTRiykM= X-Gm-Gg: ASbGncuIoxF8+zhWsYLNCmXbj1GZjs2Y3YWInmihicPAZNR4uUOhpUADBrRMMyPjpDI f1KSy3k7YCth86TPXqMf0oGC2tTCRqMjv7m8sZV+AiDO8qrkqi9xSJPSH9Jt75RdeC5PdSsgjE5 U+FVYBJhjdmpmomxYIIsUPlBvpxSN366cvqRdNI9YYor0q6QUic8vanRQrtjanZEqghhHSu5Igd mjXeYS0nBVlCu6Wv8k97KBIS8z3PQluHxXUOl69GAUrU7gymxCo2tblYPEFoC1sI9JjM5Z01m5P 5B0UBOY4YVNn4fwX2UIarhxyuI9cFtM873Gh9M85lErSvlt0AJvu3nc= X-Google-Smtp-Source: AGHT+IFj4BGzQDL0tZmOUj1gbsZcM1OSfHV0iPjzyd8vrIYlrHFKk2z6XvkElZnyILkNERPUmwhmrw== X-Received: by 2002:a17:907:940a:b0:abf:6ec7:65e9 with SMTP id a640c23a62f3a-acad36a6206mr1463236066b.43.1744725198568; Tue, 15 Apr 2025 06:53:18 -0700 (PDT) Received: from [127.0.0.2] ([2a02:2454:ff21:ef41:7b18:2529:5ce1:343d]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acadcc21a44sm681379166b.177.2025.04.15.06.53.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Apr 2025 06:53:18 -0700 (PDT) From: Stephan Gerhold Date: Tue, 15 Apr 2025 15:52:44 +0200 Subject: [PATCH 1/8] arm64: dts: qcom: msm8916/39: Move UART pinctrl to board files Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250415-msm8916-console-pinctrl-v1-1-a1d33ea994b9@linaro.org> References: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> In-Reply-To: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Day , Casey Connolly X-Mailer: b4 0.14.2 In preparation of adding a new console UART specific pinctrl template, move the pinctrl reference to the board DT part. This forces people porting new boards to consider what exactly they need for their board. No functional change for the boards upstream. Signed-off-by: Stephan Gerhold Reviewed-by: Konrad Dybcio --- The ordering of the pinctrl before/after the "status" property matches the existing style of the files. --- arch/arm64/boot/dts/qcom/apq8016-sbc.dts | 6 ++++++ arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts | 6 ++++++ arch/arm64/boot/dts/qcom/apq8039-t2.dts | 6 ++++++ arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi | 3 +++ arch/arm64/boot/dts/qcom/msm8916-mtp.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi | 3 +++ arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi | 3 +++ arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi | 3 +++ arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi | 3 +++ arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi | 3 +++ arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi | 3 +++ arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8916.dtsi | 6 ------ arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts | 3 +++ arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi | 3 +++ arch/arm64/boot/dts/qcom/msm8939.dtsi | 6 ------ 28 files changed, 87 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts b/arch/arm64/boot/dts= /qcom/apq8016-sbc.dts index aba08424aa38439952f959f79a9ded2201de1f7c..6175b1b9d7c6e82ef8ed3b6198b= 4b8cef81514d8 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts @@ -222,11 +222,17 @@ &blsp_spi5 { &blsp_uart1 { status =3D "okay"; label =3D "LS-UART0"; + pinctrl-0 =3D <&blsp_uart1_default>; + pinctrl-1 =3D <&blsp_uart1_sleep>; + pinctrl-names =3D "default", "sleep"; }; =20 &blsp_uart2 { status =3D "okay"; label =3D "LS-UART1"; + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; }; =20 &camss { diff --git a/arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts b/arch/a= rm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts index 75c6137e5a11dd5c738681d676dfc9b014efb34c..7a03893530c7b89705f5544491c= 14edd7120acdc 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts +++ b/arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts @@ -190,11 +190,17 @@ tpm@0 { }; =20 &blsp_uart1 { + pinctrl-0 =3D <&blsp_uart1_default>; + pinctrl-1 =3D <&blsp_uart1_sleep>; + pinctrl-names =3D "default", "sleep"; label =3D "UART0"; status =3D "okay"; }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; label =3D "UART1"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/apq8039-t2.dts b/arch/arm64/boot/dts/= qcom/apq8039-t2.dts index 4f82bb668616f942d65f59a6f418cf38f404df32..f656eca59ee23a6d19450b4d3fe= e7a661b002709 100644 --- a/arch/arm64/boot/dts/qcom/apq8039-t2.dts +++ b/arch/arm64/boot/dts/qcom/apq8039-t2.dts @@ -116,6 +116,9 @@ &blsp_i2c5 { }; =20 &blsp_uart1 { + pinctrl-0 =3D <&blsp_uart1_default>; + pinctrl-1 =3D <&blsp_uart1_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 @@ -128,6 +131,9 @@ &blsp_uart1_sleep { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts b/arch/arm64/= boot/dts/qcom/msm8916-acer-a1-724.dts index b4ce14a79370bc16b7d8fe144e56f4bb27e01534..9b82468ace3edfe8d808492b83e= 7753d3314e7af 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts @@ -133,6 +133,9 @@ touchscreen@38 { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts b/arch/ar= m64/boot/dts/qcom/msm8916-alcatel-idol347.dts index 3459145516a12ae8e054e24b3ed9b73f9d79905a..1c2f8e8f9b263b024cc7c239447= e7158262b0c1c 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts @@ -214,6 +214,9 @@ led@1 { =20 &blsp_uart2 { status =3D "okay"; + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; }; =20 &mpss_mem { diff --git a/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts b/arch/arm64/bo= ot/dts/qcom/msm8916-asus-z00l.dts index 77618c7374dfe29cf5660e0834aa2b0fa6f3d67c..f7a9ee0dba09eef83e9b4149856= cdefa0ae3fd4b 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts @@ -130,6 +130,9 @@ touchscreen@38 { =20 &blsp_uart2 { status =3D "okay"; + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; }; =20 &mpss_mem { diff --git a/arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts b/arch/arm6= 4/boot/dts/qcom/msm8916-gplus-fl8005a.dts index f7be7e3718209b9ca96afb13ea1aca05e1388225..e5ca1ca0d9976a0d36af5359e70= 5ca7b2070122b 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts @@ -131,6 +131,9 @@ touchscreen@38 { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts b/arch/arm64/bo= ot/dts/qcom/msm8916-huawei-g7.dts index bf7fc89dd106f670e7cda270c7284a6a3d7d052d..f75e60b5d1b3b40673cb0639a3f= 8d0056d037a02 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts @@ -214,6 +214,9 @@ nfc@28 { =20 &blsp_uart2 { status =3D "okay"; + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; }; =20 &lpass { diff --git a/arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts b/arch/arm64/boot/= dts/qcom/msm8916-lg-c50.dts index a823a1c4020894edf845130e72803b48dbd24ac8..7c49b4cb27cb5a9914b38865596= eb27541f390fd 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts @@ -59,6 +59,9 @@ reg_sd_vmmc: regulator-sdcard-vmmc { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts b/arch/arm64/boot= /dts/qcom/msm8916-lg-m216.dts index 07345e694f6f46bbf71ed3c551b2a80d5f352d2c..6e55d37f588c9b829bb594ff156= cda6cb8b6caf2 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts @@ -112,6 +112,9 @@ touchscreen@34 { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts b/arch/ar= m64/boot/dts/qcom/msm8916-longcheer-l8150.dts index 7f0c2c1b8a94b2c4d79e5e0b2b7188f4e2b2d281..4576178cc9b0936a7356b9852fc= 003fe949ed903 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts @@ -254,6 +254,9 @@ rmi4-f12@12 { =20 &blsp_uart2 { status =3D "okay"; + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; }; =20 &pm8916_bms { diff --git a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts b/arch/ar= m64/boot/dts/qcom/msm8916-longcheer-l8910.dts index 2cc54eaf72027a213f9d779c57fa22386bda934a..e0dacdf552452a36cbdb041b37d= 68eb4d661e6c8 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts @@ -178,6 +178,9 @@ imu@68 { =20 &blsp_uart2 { status =3D "okay"; + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; }; =20 &mpss_mem { diff --git a/arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi b/arch/a= rm64/boot/dts/qcom/msm8916-motorola-common.dtsi index 6a27d0ecd2ad23b462191a5a328a49a76ab13b42..48134e5ff524fd5708db7b9c3a5= 67ec3f751868c 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi @@ -69,6 +69,9 @@ rmi4-f11@11 { }; =20 &blsp_uart1 { + pinctrl-0 =3D <&blsp_uart1_default>; + pinctrl-1 =3D <&blsp_uart1_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dts b/arch/arm64/boot/dts= /qcom/msm8916-mtp.dts index c11a845e91bb5029e89905ec7dee3b07646dd4cb..c115142df364e99a4f566775d4d= 1679e6a8920e2 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-mtp.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-mtp.dts @@ -23,5 +23,8 @@ chosen { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi b/a= rch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi index e6355e5e2177df9e3beba6b2d96a15fb069ce57a..58a548d220a485e9a92c012c152= 9e3fe838d6c9f 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi @@ -302,6 +302,9 @@ charger: charger { =20 &blsp_uart2 { status =3D "okay"; + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; }; =20 &gpu { diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi b= /arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi index 7a7e99b015d9bf9686d2b41f7efb76a093c1730d..4290ae7782d659eb0d259482571= 7ffaf4c84076b 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi @@ -304,6 +304,9 @@ charger: charger { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi b/arc= h/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi index fbd2caf405d5f686a40a59ff7e0bfc78f164e03c..30e34574999c52f7ea99c9bd7af= 41101e5d4d4d0 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi @@ -116,6 +116,9 @@ fuelgauge@36 { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi b/arch= /arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi index 5ca2ada266f495e4584a5143a8cce6f1f1c4ad78..d4af7856f5f3a70160774d1637e= 39e19d163725d 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi @@ -135,6 +135,9 @@ touchscreen: touchscreen@50 { =20 &blsp_uart2 { status =3D "okay"; + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; }; =20 &mpss_mem { diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts b/arch/= arm64/boot/dts/qcom/msm8916-samsung-serranove.dts index caad1dead2e03c30dd6eb09b457439a9b0446126..45c3b3387b52030a6475ae0da2a= 2c89ea98ca6c1 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts @@ -319,6 +319,9 @@ rt5033_charger: charger { =20 &blsp_uart2 { status =3D "okay"; + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; }; =20 &gpu { diff --git a/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi b/arch/arm64/boot/dt= s/qcom/msm8916-ufi.dtsi index c77ed04bb6c36dbc0cb7c0b09f50d1f18aafa4c9..2bfe56da8f6c624ed97d8a5750d= 12c59c039c874 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi @@ -72,6 +72,9 @@ &bam_dmux_dma { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi b/arch/= arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi index 1a7c347dc3f08409f7db3b246c04687c666bba32..f5caac42bbad106f86448c217aa= 1472a32fbeaa6 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi @@ -93,6 +93,9 @@ touchscreen@38 { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts b/arch/a= rm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts index 510b3b3c4e3c4223c64bcfa563e0e080d033d7b7..10d0974334abf0e501ec97e2de4= 87f40c1507f82 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts @@ -169,6 +169,9 @@ led@2 { =20 &blsp_uart2 { status =3D "okay"; + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; }; =20 &mpss_mem { diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qc= om/msm8916.dtsi index c89f9e92e832eae8f630555e9e7f5817d6731d4d..733c17d0495617e683d362d7b7a= ae59078f2a0b0 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -2159,9 +2159,6 @@ blsp_uart1: serial@78af000 { clock-names =3D "core", "iface"; dmas =3D <&blsp_dma 0>, <&blsp_dma 1>; dma-names =3D "tx", "rx"; - pinctrl-names =3D "default", "sleep"; - pinctrl-0 =3D <&blsp_uart1_default>; - pinctrl-1 =3D <&blsp_uart1_sleep>; status =3D "disabled"; }; =20 @@ -2173,9 +2170,6 @@ blsp_uart2: serial@78b0000 { clock-names =3D "core", "iface"; dmas =3D <&blsp_dma 2>, <&blsp_dma 3>; dma-names =3D "tx", "rx"; - pinctrl-names =3D "default", "sleep"; - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; status =3D "disabled"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts b/arch/arm64/= boot/dts/qcom/msm8939-huawei-kiwi.dts index 3cec51891aed95968f7b5cb099ae2107691635fb..9f647027d082864ccaa240f7118= f20a8d19f6a4a 100644 --- a/arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts +++ b/arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts @@ -126,6 +126,9 @@ touchscreen@1c { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts b/arch/ar= m64/boot/dts/qcom/msm8939-longcheer-l9100.dts index b845da4fa23e612f04cf8a8f15b8892e396a8c41..f59647b5b7dfdd7bf630f9d180b= b56a10a3ea0a3 100644 --- a/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts +++ b/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts @@ -243,6 +243,9 @@ touchscreen@4a { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts b/arch/arm64/b= oot/dts/qcom/msm8939-samsung-a7.dts index ceba6e73b2112687d16ee595003c80ea1a93143a..3d9cbe7fdad8808968190d7a744= bab29eeb0e827 100644 --- a/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts +++ b/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts @@ -373,6 +373,9 @@ charger: charger { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi b/arch/= arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi index 800e0747a2f79f6ef9a7d86d56c1a2006207b1c7..cbefe34327ba7b04ea57032c68d= d69642e6d1685 100644 --- a/arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi @@ -126,6 +126,9 @@ touchscreen: touchscreen@38 { }; =20 &blsp_uart2 { + pinctrl-0 =3D <&blsp_uart2_default>; + pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qc= om/msm8939.dtsi index ca478db63be4578b92d85e178548c5e16b29bf03..67ff2ffc6e455fa5ad8a664a161= 873507cab6391 100644 --- a/arch/arm64/boot/dts/qcom/msm8939.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi @@ -1770,9 +1770,6 @@ blsp_uart1: serial@78af000 { clock-names =3D "core", "iface"; dmas =3D <&blsp_dma 0>, <&blsp_dma 1>; dma-names =3D "tx", "rx"; - pinctrl-0 =3D <&blsp_uart1_default>; - pinctrl-1 =3D <&blsp_uart1_sleep>; - pinctrl-names =3D "default", "sleep"; status =3D "disabled"; }; =20 @@ -1784,9 +1781,6 @@ blsp_uart2: serial@78b0000 { clock-names =3D "core", "iface"; dmas =3D <&blsp_dma 2>, <&blsp_dma 3>; dma-names =3D "tx", "rx"; - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; - pinctrl-names =3D "default", "sleep"; status =3D "disabled"; }; =20 --=20 2.47.2 From nobody Tue Dec 16 04:06:50 2025 Received: from mail-ej1-f44.google.com (mail-ej1-f44.google.com [209.85.218.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D3C51A3160 for ; Tue, 15 Apr 2025 13:53:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725205; cv=none; b=isopNHiF1LmVWj0UBjwI3kApBSmntX84ukiaKlz9P1n7fs34OcDeX7f1fIU3gYjDBB6ky8J68epdaLADo3pBwmPERs6TO+0giq6yD25RZU7JffIKQjb0xdW99mFpgUUcKNE1gbgvNj8Q9J55/jOm993+OOf2rnMRL6Xmjmymg8U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725205; c=relaxed/simple; bh=w3WlQcntpBe85wnKizplsb4utHZXddeF30YcBF9V6T8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IeAQIymf9UzOOLbmZY+nG21nGfNsnWk1d1mkqlHrmm0E2/hDs4veuD3zSdkxU5FwLh/ms1D98cuCKb1JmUck82rbltRIAOSoeoVBKM4u7sJTzNDnTC8UVbCIEHwYnM7vMT+Ob4fHirOKAGb6DKtXN4nJs4zWAa2qaSHiRPFUHEU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=b39IGyYt; arc=none smtp.client-ip=209.85.218.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="b39IGyYt" Received: by mail-ej1-f44.google.com with SMTP id a640c23a62f3a-abbb12bea54so1083817466b.0 for ; Tue, 15 Apr 2025 06:53:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1744725200; x=1745330000; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ocL8C9B6DxFYTI+XzvW6PxhfaIdPqGvVLvHUq+LfZSU=; b=b39IGyYtzYgWVp5z94ltAzxWIBdr8G9zrWjiQgksA4wJsnvSiRxX/Fp30cOrTfyfEg F125IAbH0dS0GTwvfyCHnxXSzudu0fzrFQ4kNNnBSPzyR0pSb0AoASbz4Yv51gF37J8x DTiel4E3sdX705I7giNRpLoaih4NmCtJANjbH/gUtCGjpzidY/nGGtToauAtw9DibDLO ps5WcAeD+kx5+O2cKx/5UteuiK9ecEvQi0voiWPisxSofVDTfwSitrD/9XgxGR6nIENP On9EvncqfGkRXhBo/5cK771bSW/Sp5Bf+5JMzWbURf+ZfDNNdNXxgeinjNG+UUeJPGvg 7ZgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744725200; x=1745330000; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ocL8C9B6DxFYTI+XzvW6PxhfaIdPqGvVLvHUq+LfZSU=; b=rRFwB/8JoVnCueuCcQIL8XzTuj3wY3jVzop6rowUTW0+CP3M4YSwmSQ8p+Dq0XxTDx 8XUSbIO+MkAEbSNMguKC9kGdW07ZSKyhrIXmb6zxN9l00SQPORdC1eF+TCm4r6rdhZFN yKNraibD11uJHFEhYWl/OwAl3qgdm7AoL12S3ePNRMeHy05BEzQ03g5sv3nIDLp50pAJ KqL4X8H3YgMKKcrfZInnDbGz/6Y3kHLMVBBOMiRk6CcqPluX/vof4E/969YRxQUIKS67 P348WqTiJkVikSs4gCsD9Y8S8c3cpbQ6V/IJ3qLecmKKYCRyY6AdgY13sCOP+JvzBp+T 7wPg== X-Forwarded-Encrypted: i=1; AJvYcCWuoJ+lIdIwm3/vOdYnSN8x8uZDs3wwNcVNKmf70FxkYOlZbwnT39HTFFCKEa6f0ewEswwcrjnhaK6/SoA=@vger.kernel.org X-Gm-Message-State: AOJu0YzVns2jwIyS/5M6VJCl54hEjNGRC7J+tWQARua2GTkkbcIGvWLN 69dGko/oL3y6tLlsc80BszP7JMTa37P0mUHNXq+YfESmRWbmq5ZTYvNP6sKbCr4= X-Gm-Gg: ASbGncuph/qhNlEHAhVYcisig0ieD1r5luTFfttW6qKeBAjJls1DxeMX3hWw3i3HlIP PNCxuIVLzkgXTkNY5aVsJHinzRMhGHScz1iD2BsS865mJLh9HMnFlF0KJQ4fxU9x6nfBBIk8fan dqlnjKDKqxTDAMXntDEBmqc1tYyFVXtqghkDHvjeOcbLlQN/loFLwdqv0VwYxXKxqWxvNexEwsL kEUlyZiU6NKOaTAC6UQ4kxgF6/mdt2aIx1P3P5q+tIy5fnLqXvvDWTzOVjd69rccEVF4m5NuMg8 eWhNAPD+YlSWyg5go2E/x02ZiLRv/sCgIYgJuseeWsaqjrjCyzBecnw= X-Google-Smtp-Source: AGHT+IHifoGCkv9G/x2m8KFU82j44OhfqXR3++NsCbFcIC9nGr6wuzzt7fHwhztGOnXT0wraoravHg== X-Received: by 2002:a17:907:1b09:b0:aca:96b6:a0f4 with SMTP id a640c23a62f3a-acad34a1c31mr1190134866b.23.1744725199514; Tue, 15 Apr 2025 06:53:19 -0700 (PDT) Received: from [127.0.0.2] ([2a02:2454:ff21:ef41:7b18:2529:5ce1:343d]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acadcc21a44sm681379166b.177.2025.04.15.06.53.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Apr 2025 06:53:19 -0700 (PDT) From: Stephan Gerhold Date: Tue, 15 Apr 2025 15:52:45 +0200 Subject: [PATCH 2/8] arm64: dts: qcom: msm8916/39: Introduce new UART console pinctrl Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250415-msm8916-console-pinctrl-v1-2-a1d33ea994b9@linaro.org> References: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> In-Reply-To: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Day , Casey Connolly X-Mailer: b4 0.14.2 At the moment, msm8916/39.dtsi have two inconsistent UART pinctrl templates that are used by all the boards: - &blsp_uart1_default configures all 4 pins (TX, RX, CTS, RTS), some boards then limit this to just RX and TX - &blsp_uart2_default only configures 2 pins (TX, RX), even though UART2 also supports CTS/RTS It's difficult to define a generic pinctrl template for all UART use cases, since they are quite different in practice. The main use case for most of the 40+ MSM8916/39-based boards upstream is the UART debug console. The current generic template is lacking some properties to work properly: - bias-pull-up for RX: Generally, UART is push-pull and does not need pull up/down. Both sides drive TX, so RX should never be floating. This is why the current pinctrl in msm8916/39.dtsi uses bias-disable. However, this assumes that UART is always connected. For the debug console this will be rarely the case on mobile devices, only during debugging sessions. The rest of the time, the RX pin is floating. This has never caused massive problems, but it's obvious now that this needs fixing: (1) In U-Boot, we have been fighting with problems with autoboot for years. Most of the time, there is a single \0 byte ("break event") read during boot, which interrupts the autoboot process. I tried to work around that by inserting some random delay [1], but it turned out this is also not working reliably on all boards. What happens is: Since RX is floating, it switches randomly between high or low. A long low state is interpreted as "break event" (\0). (2) In postmarketOS, we used to have the "magic SysRq key" enabled by default for the serial console. We had to disable this at some point, because there was a small number of users who were reporting sysrq spam in the kernel log, possibly even crashes/panics triggered by sysrq. What likely happened is: SysRq is triggered by sending a "break event", like in (1). With enough luck, you could even trigger any of the SysRq actions if the RX pin switches between high and low (e.g. because of noise introduced by the LTE radio close by). We can fix this using bias-pull-up, but this may be unneeded, unexpected, or even unwanted for other UART use cases. - bootph-all: U-Boot needs to know which pinctrl to apply during early boot stages, so we should specify "bootph-all" for the console UART pinctrl. Without bootph-all, the bias-pull-up won't be applied early enough in U-Boot to avoid the problem with autoboot in point (1) above. It doesn't make sense to specify this for the other UART instances. bootph-all is a generic property documented in dt-schema bootph.yaml. Define these two additional properties only for the debug UART console, by defining a new pinctrl template specifically for that. In the following commits, boards will be converted to use these where appropriate. [1]: https://source.denx.de/u-boot/u-boot/-/commit/ad7e967738a9c639e07cf50b= 83ffccdf9a8537b0 Signed-off-by: Stephan Gerhold Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 43 +++++++++++++++++++++++++++++++= +++- arch/arm64/boot/dts/qcom/msm8939.dtsi | 43 +++++++++++++++++++++++++++++++= +++- 2 files changed, 84 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qc= om/msm8916.dtsi index 733c17d0495617e683d362d7b7aae59078f2a0b0..9f1796222c597afd45dd31131b1= 98f3574e97885 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1247,6 +1247,30 @@ blsp_uart1_sleep: blsp-uart1-sleep-state { bias-pull-down; }; =20 + blsp_uart1_console_default: blsp-uart1-console-default-state { + tx-pins { + pins =3D "gpio0"; + function =3D "blsp_uart1"; + drive-strength =3D <16>; + bias-disable; + bootph-all; + }; + rx-pins { + pins =3D "gpio1"; + function =3D "blsp_uart1"; + drive-strength =3D <16>; + bias-pull-up; + bootph-all; + }; + }; + + blsp_uart1_console_sleep: blsp-uart1-console-sleep-state { + pins =3D "gpio0", "gpio1"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + blsp_uart2_default: blsp-uart2-default-state { pins =3D "gpio4", "gpio5"; function =3D "blsp_uart2"; @@ -1254,7 +1278,24 @@ blsp_uart2_default: blsp-uart2-default-state { bias-disable; }; =20 - blsp_uart2_sleep: blsp-uart2-sleep-state { + blsp_uart2_console_default: blsp-uart2-console-default-state { + tx-pins { + pins =3D "gpio4"; + function =3D "blsp_uart2"; + drive-strength =3D <16>; + bias-disable; + bootph-all; + }; + rx-pins { + pins =3D "gpio5"; + function =3D "blsp_uart2"; + drive-strength =3D <16>; + bias-pull-up; + bootph-all; + }; + }; + + blsp_uart2_sleep: blsp_uart2_console_sleep: blsp-uart2-sleep-state { pins =3D "gpio4", "gpio5"; function =3D "gpio"; drive-strength =3D <2>; diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qc= om/msm8939.dtsi index 67ff2ffc6e455fa5ad8a664a161873507cab6391..16c16ec0f4560a7102f8ffef20c= 58fbec81dee38 100644 --- a/arch/arm64/boot/dts/qcom/msm8939.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi @@ -919,6 +919,30 @@ blsp_uart1_sleep: blsp-uart1-sleep-state { bias-pull-down; }; =20 + blsp_uart1_console_default: blsp-uart1-console-default-state { + tx-pins { + pins =3D "gpio0"; + function =3D "blsp_uart1"; + drive-strength =3D <16>; + bias-disable; + bootph-all; + }; + rx-pins { + pins =3D "gpio1"; + function =3D "blsp_uart1"; + drive-strength =3D <16>; + bias-pull-up; + bootph-all; + }; + }; + + blsp_uart1_console_sleep: blsp-uart1-console-sleep-state { + pins =3D "gpio0", "gpio1"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + blsp_uart2_default: blsp-uart2-default-state { pins =3D "gpio4", "gpio5"; function =3D "blsp_uart2"; @@ -926,7 +950,24 @@ blsp_uart2_default: blsp-uart2-default-state { bias-disable; }; =20 - blsp_uart2_sleep: blsp-uart2-sleep-state { + blsp_uart2_console_default: blsp-uart2-console-default-state { + tx-pins { + pins =3D "gpio4"; + function =3D "blsp_uart2"; + drive-strength =3D <16>; + bias-disable; + bootph-all; + }; + rx-pins { + pins =3D "gpio5"; + function =3D "blsp_uart2"; + drive-strength =3D <16>; + bias-pull-up; + bootph-all; + }; + }; + + blsp_uart2_sleep: blsp_uart2_console_sleep: blsp-uart2-sleep-state { pins =3D "gpio4", "gpio5"; function =3D "gpio"; drive-strength =3D <2>; --=20 2.47.2 From nobody Tue Dec 16 04:06:50 2025 Received: from mail-ej1-f42.google.com (mail-ej1-f42.google.com [209.85.218.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 697A91ACEC8 for ; Tue, 15 Apr 2025 13:53:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725205; cv=none; b=Uy2e+J6Q6RL1ukXfQ9Eakv+tUovdPZBm2c4ts8SQ/BcKcvQRsw3H5Z9OpxlxAdM0Ex9AYhqWCon7WpiNRY3F/7fXKrgcl4q6kLCZVqhKA2ERvgmjMWWYfrCBnDIg9ttjcEv5sJWEpCJxF+g5srW9S8bK0r9WOsHsKID0fX5YgIg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725205; c=relaxed/simple; bh=90veFZYkI7tOsSfYhPXPr8MTVtRlDMrsdewxWsLlM80=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kUSil39NfejSIOjwCLfC/DwCzYNpGRXErm1vVcj1Fqu1TDrR6WWATWDZwXCL9BeP/9O2iwI04enDAvVAEIesJRi0lR/9gOCWdZfz3kw4I83ZlHl0oAAFflMWU4+UO34qXVdcV3ZRM6aY3zBIQteIX/rtk4cKJZJRAY5LG9Yj/5A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=E22lVqLC; arc=none smtp.client-ip=209.85.218.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="E22lVqLC" Received: by mail-ej1-f42.google.com with SMTP id a640c23a62f3a-ac339f53df9so1113701666b.1 for ; Tue, 15 Apr 2025 06:53:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1744725201; x=1745330001; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=F+VemoH6JbPZfntDzSZfUEE9eySHn4jqOWYpmcA1Ep4=; b=E22lVqLCWgIyMQhFIuvRgrk+20nIID2RaFGBhhv2CNbURJwiQSVYU1RnWT/j1vMBKf 4rdN7ty57EEKEqyTB2oTJuWQOzuxlFHLDVGqRM4/mHzsMnsTfWVCvIBpvG5ScSVeF0TK ytWWgbncjBdlGNLGJgrfOTJ+NJdw4XtHWN1MGqQeh4PRmJvCoY/2b905Y6Nlctr7XNBz W5zxcBH3JcrC28e1XVU3nKqcy1KRijsFCnZ5JCu1K7i53S8rBPzvM94qhlaFO/n8oPl9 2mL10gXSsh2c8NZRnpCs34LNBPkqAjH+w7fN+5BrQ6ERpd3Z/w8P3L608wrINTYSAz6e 8/eQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744725201; x=1745330001; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=F+VemoH6JbPZfntDzSZfUEE9eySHn4jqOWYpmcA1Ep4=; b=O6flzGr21UL0AWjfSNml+HRuWtcBRivu90NDJeg2Gm6356IN4i435QLVnMiRdRqOBp pSeiMafeBzB0Gxg09efgcxQl+WHFA28xyr5mgCFtZq6/h5D1ivBAFoGR8PdiR3u7D12J mmVLNx0OGGgy3o59ehHWUFUVmR/8f6OPfw9w15GP0b9JAKVz1mJFsCdaaoieM0K34Q/q ZFWoQ+erphPB7nFaMfUanr2frTL1R9sZbdvdjLKDDgDdNFhqZ80v2JXeRM4yI3qA39kr /IKyqC/pDr0c9WVojttJijR9g1yJMB1Z64UQ4qdqbBMAX27jQ2Ko3C6wKTBMjr6qL6iZ 5vPQ== X-Forwarded-Encrypted: i=1; AJvYcCXvwSMqnf4LPmuKt77o4NdAkyMl708cmJZImqwXQf0hv4m/Sa7WJBzIFgD6QdAVgpZ9qK8gImyzXO6iHog=@vger.kernel.org X-Gm-Message-State: AOJu0YyPnZVE61OySd5z/7DC0C/lt+GtTTbbE3AMk6Usp7g14Eesymg/ YUJDxDklpair4Ey9MZLVYzD892wQUSNEdCpcARhKuFrhQ5kb8zs5T7JkpshKpuU= X-Gm-Gg: ASbGnctCA8POGUPI3PPdX6xVIFgTDaZojV+oG/tOyUDEH5yr2AzgYp50hWdElUSW/Zo KKLl/yzgN/YRtp2e7lpdrDLRn9Wqix9A/9ghISF5FBYJMaCumkqMi5BCNI5oiJO9hSg9QXf1XhY uwk3YA1p+OXnmnHUtDHEbDMOcL0pWXBhW9hMnaAtXpQFs5oUtG6LNiiC/csGhRas/SFnBzjUCrl W5celgOY71yuXBIKHVhyM4cAQfiVp/X+iK6GNDZGy7OAg3tIdKi1XknOH30Rugy1unAKV+cSXhC IRn/YhwnepynvDoFEjQXLvVXk5WAnb54Zlgb15NrbaiKmcXI6h2Ay0A= X-Google-Smtp-Source: AGHT+IHCes0G+xk/lOar09FklsVADVO86cU+eaDfU0dbj2bA77b5QNHnjabmqTqpe+Ix/13ytNhHTw== X-Received: by 2002:a17:907:1b1e:b0:ac7:4f1:65c5 with SMTP id a640c23a62f3a-acad36d7ac0mr1453544966b.54.1744725200534; Tue, 15 Apr 2025 06:53:20 -0700 (PDT) Received: from [127.0.0.2] ([2a02:2454:ff21:ef41:7b18:2529:5ce1:343d]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acadcc21a44sm681379166b.177.2025.04.15.06.53.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Apr 2025 06:53:20 -0700 (PDT) From: Stephan Gerhold Date: Tue, 15 Apr 2025 15:52:46 +0200 Subject: [PATCH 3/8] arm64: dts: qcom: msm8919/39: Use UART2 console pinctrl where appropriate Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250415-msm8916-console-pinctrl-v1-3-a1d33ea994b9@linaro.org> References: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> In-Reply-To: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Day , Casey Connolly X-Mailer: b4 0.14.2 Convert the majority of MSM8916/39-based boards, which use UART2 with 2 pins (TX, RX) for the debug UART console. This adds the needed bias-pull-up and bootph-all properties to avoid garbage input when UART is disconnected. apq8016-schneider-hmibsc.dts does not use UART2 as a debug console, so it's left as-is in this commit. Signed-off-by: Stephan Gerhold Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/apq8016-sbc.dts | 4 ++-- arch/arm64/boot/dts/qcom/apq8039-t2.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-mtp.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts | 4 ++-- arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi | 4 ++-- 24 files changed, 48 insertions(+), 48 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts b/arch/arm64/boot/dts= /qcom/apq8016-sbc.dts index 6175b1b9d7c6e82ef8ed3b6198b4b8cef81514d8..f12a5e2b1e8c2cce6e85b8444c9= 7a7e0d7b7c58f 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts @@ -230,8 +230,8 @@ &blsp_uart1 { &blsp_uart2 { status =3D "okay"; label =3D "LS-UART1"; - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/apq8039-t2.dts b/arch/arm64/boot/dts/= qcom/apq8039-t2.dts index f656eca59ee23a6d19450b4d3fee7a661b002709..4aa0ad19bc0f7fde6f5f3a93cdb= 6be19fb4f1f65 100644 --- a/arch/arm64/boot/dts/qcom/apq8039-t2.dts +++ b/arch/arm64/boot/dts/qcom/apq8039-t2.dts @@ -131,8 +131,8 @@ &blsp_uart1_sleep { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts b/arch/arm64/= boot/dts/qcom/msm8916-acer-a1-724.dts index 9b82468ace3edfe8d808492b83e7753d3314e7af..3a6eba904641c65ee8e982774f4= 122ef9ddb3704 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts @@ -133,8 +133,8 @@ touchscreen@38 { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts b/arch/ar= m64/boot/dts/qcom/msm8916-alcatel-idol347.dts index 1c2f8e8f9b263b024cc7c239447e7158262b0c1c..2de8b6f9531b25f1ee745c5e298= d1cab806f0391 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts @@ -214,8 +214,8 @@ led@1 { =20 &blsp_uart2 { status =3D "okay"; - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts b/arch/arm64/bo= ot/dts/qcom/msm8916-asus-z00l.dts index f7a9ee0dba09eef83e9b4149856cdefa0ae3fd4b..29d61f8d5dc9c8099524ecbfdb8= 0ab7afaa811c4 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts @@ -130,8 +130,8 @@ touchscreen@38 { =20 &blsp_uart2 { status =3D "okay"; - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts b/arch/arm6= 4/boot/dts/qcom/msm8916-gplus-fl8005a.dts index e5ca1ca0d9976a0d36af5359e705ca7b2070122b..742a325245c5c09dcb6227ae262= 865b17ee5ef46 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts @@ -131,8 +131,8 @@ touchscreen@38 { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts b/arch/arm64/bo= ot/dts/qcom/msm8916-huawei-g7.dts index f75e60b5d1b3b40673cb0639a3f8d0056d037a02..aa414b5d7ee47a0e20ca2341c9a= 3250503184a69 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts @@ -214,8 +214,8 @@ nfc@28 { =20 &blsp_uart2 { status =3D "okay"; - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts b/arch/arm64/boot/= dts/qcom/msm8916-lg-c50.dts index 7c49b4cb27cb5a9914b38865596eb27541f390fd..22bc73b94344aff42f560304c99= cbb7b8995fdfd 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts @@ -59,8 +59,8 @@ reg_sd_vmmc: regulator-sdcard-vmmc { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts b/arch/arm64/boot= /dts/qcom/msm8916-lg-m216.dts index 6e55d37f588c9b829bb594ff156cda6cb8b6caf2..c50374979939c26186e97d19047= de77356a9c3c1 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts @@ -112,8 +112,8 @@ touchscreen@34 { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts b/arch/ar= m64/boot/dts/qcom/msm8916-longcheer-l8150.dts index 4576178cc9b0936a7356b9852fc003fe949ed903..eb449112a22684492e6b6f97053= 89d44f2cec379 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts @@ -254,8 +254,8 @@ rmi4-f12@12 { =20 &blsp_uart2 { status =3D "okay"; - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts b/arch/ar= m64/boot/dts/qcom/msm8916-longcheer-l8910.dts index e0dacdf552452a36cbdb041b37d68eb4d661e6c8..887764dc55b21a5892510f82200= 4b054eb65fa0a 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts @@ -178,8 +178,8 @@ imu@68 { =20 &blsp_uart2 { status =3D "okay"; - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dts b/arch/arm64/boot/dts= /qcom/msm8916-mtp.dts index c115142df364e99a4f566775d4d1679e6a8920e2..63d476523544babc9213e34e227= 870a447410eca 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-mtp.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-mtp.dts @@ -23,8 +23,8 @@ chosen { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi b/a= rch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi index 58a548d220a485e9a92c012c1529e3fe838d6c9f..6f75707b6f9b4707cbed7e12ab6= 0fa888d6a1f06 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi @@ -302,8 +302,8 @@ charger: charger { =20 &blsp_uart2 { status =3D "okay"; - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi b= /arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi index 4290ae7782d659eb0d2594825717ffaf4c84076b..fb790b02736acff017d12318de1= c01100a33c808 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi @@ -304,8 +304,8 @@ charger: charger { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi b/arc= h/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi index 30e34574999c52f7ea99c9bd7af41101e5d4d4d0..ff9679d3f664cbb203ff42b4cf2= 7468622cc5cf3 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi @@ -116,8 +116,8 @@ fuelgauge@36 { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi b/arch= /arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi index d4af7856f5f3a70160774d1637e39e19d163725d..697f25d51d9d05087500231f4d9= ad77fe81ea3b3 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi @@ -135,8 +135,8 @@ touchscreen: touchscreen@50 { =20 &blsp_uart2 { status =3D "okay"; - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts b/arch/= arm64/boot/dts/qcom/msm8916-samsung-serranove.dts index 45c3b3387b52030a6475ae0da2a2c89ea98ca6c1..71b5c98458ff475e101a0a40d36= 01b5ca144ec92 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts @@ -319,8 +319,8 @@ rt5033_charger: charger { =20 &blsp_uart2 { status =3D "okay"; - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi b/arch/arm64/boot/dt= s/qcom/msm8916-ufi.dtsi index 2bfe56da8f6c624ed97d8a5750d12c59c039c874..5719933fa8e01b0b90ef7477c0b= f181af379a524 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi @@ -72,8 +72,8 @@ &bam_dmux_dma { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi b/arch/= arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi index f5caac42bbad106f86448c217aa1472a32fbeaa6..ebe85cd85ddf30b990597531874= 6403e0cecf7ee 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi @@ -93,8 +93,8 @@ touchscreen@38 { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts b/arch/a= rm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts index 10d0974334abf0e501ec97e2de487f40c1507f82..68c8856d4c2ed22370822eb295c= 0000fd80226f5 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts @@ -169,8 +169,8 @@ led@2 { =20 &blsp_uart2 { status =3D "okay"; - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts b/arch/arm64/= boot/dts/qcom/msm8939-huawei-kiwi.dts index 9f647027d082864ccaa240f7118f20a8d19f6a4a..18381a66daef8642da27b3ea8c4= 8964c1ccf121b 100644 --- a/arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts +++ b/arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts @@ -126,8 +126,8 @@ touchscreen@1c { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts b/arch/ar= m64/boot/dts/qcom/msm8939-longcheer-l9100.dts index f59647b5b7dfdd7bf630f9d180bb56a10a3ea0a3..13422a19c26a15812657e92ab0b= 52d6f53f5c944 100644 --- a/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts +++ b/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts @@ -243,8 +243,8 @@ touchscreen@4a { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts b/arch/arm64/b= oot/dts/qcom/msm8939-samsung-a7.dts index 3d9cbe7fdad8808968190d7a744bab29eeb0e827..07613080e79e9bfb21493a0b61c= 85bc172d5e3f6 100644 --- a/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts +++ b/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts @@ -373,8 +373,8 @@ charger: charger { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi b/arch/= arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi index cbefe34327ba7b04ea57032c68dd69642e6d1685..a5187355f9fa09148b9f04970da= 6855a49cdd059 100644 --- a/arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi @@ -126,8 +126,8 @@ touchscreen: touchscreen@38 { }; =20 &blsp_uart2 { - pinctrl-0 =3D <&blsp_uart2_default>; - pinctrl-1 =3D <&blsp_uart2_sleep>; + pinctrl-0 =3D <&blsp_uart2_console_default>; + pinctrl-1 =3D <&blsp_uart2_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; --=20 2.47.2 From nobody Tue Dec 16 04:06:50 2025 Received: from mail-ed1-f41.google.com (mail-ed1-f41.google.com [209.85.208.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D3F21B4227 for ; Tue, 15 Apr 2025 13:53:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725205; cv=none; b=WP/H7ylUUhhAkvEsIxT0+7SZYREl38lLyjGy/AHLTED6Kp/9c8oxbJ5OKyh+wGFqDwoggIpPmomW75qwEt5doN85M0C4pcLq63JNuTK4GM8ocui/CeoixE9ZYgIvigr9HWT6e7mSXIGrZbhOg2PV8C71/s9XSudFfYu8+C7NPsQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725205; c=relaxed/simple; bh=JWwoxEMK2A5kDbhJ080c6MdZJuqktgRFVi8Ef7ShjQk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hETeE4bH6CIWqR8VxqHM1cqftzJGZLnAYMRGqaHlLDSMMzq3zwb2SXjSVLQbOz7tkNF1ys2iDaym0S9wV97WOZCJQgjebxBLaKxL/YqDbv0rJ0tBKy41QANHFJD+4z9bOvXyNGqsrFhVCMOUBA9WCu24cHNqw7NcNIcDEvQLGzg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=ySUlPsEB; arc=none smtp.client-ip=209.85.208.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ySUlPsEB" Received: by mail-ed1-f41.google.com with SMTP id 4fb4d7f45d1cf-5e5e63162a0so9151341a12.3 for ; Tue, 15 Apr 2025 06:53:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1744725201; x=1745330001; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=IzowgvGIaxdQmiDRDdrZTttLqfGAIGHXMByDo47trxw=; b=ySUlPsEB3vYBsGS1xVnFdaphSHt7LRYeQAyYfwPYNT9teyB71pHVb9/KQhP9rl9w16 0yzbXnHY7LKNYG/z+WaL94p1ljxIDOo1KWJt3jWkLfwQAfZ+QdwU+jcUhZS2SaQeCOP2 GsXTNfetQElNS8j96kZZG+MyllcNvhQK8srYh4PbOXCaRmCj27Fv+/lDzAtntww2omiA WaJECwzXpMK78Lb20cT9+f+/nAVSqVkWGJLm7MeZ0qwKQXuPKBIKTx8LhFND998yuLn5 dS1NQfYfHG8vyNeiZhNHoCRizAUkNr2kyV/lFfWVwNxyoQ66cBQIdW8a2n2RxsW5bDYq XSBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744725201; x=1745330001; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IzowgvGIaxdQmiDRDdrZTttLqfGAIGHXMByDo47trxw=; b=uPC32f4xH8vCAZr0Vx3IS8j5hXe05UuLZl/AbBEnoWU3rPjLLLFZLovkF5JHBJM4kU uJDW8AhFyENw87bzL2Iqy6ct1vPhHyJp5C9Lkmt58DPUsNa6OYbcJlaep88GdvQwtQyy opxyxmlUkpaMu9xCPfBxTl/aO+BjWxePjQl27UIedzTRNgp2xpK3Z/m/CFXl+qmQlszj pocqIf4DR5AJfReVhIYlpD8k5aAr1yhpCSqmFzmA/IZKe07IXh41W6hwQrDcZM1KFWDP Y4f7/PbO45wtLOb0M14bKP3HhRaCr/xEzPrX0Qx2fGSr0IlZ+2OezTDJIEto9uewjuzf 2BSw== X-Forwarded-Encrypted: i=1; AJvYcCXOBmBOdARYn9ZqN0M7fp8BWOa4GOBagv1dAdnQxlfK0CjObt2Xr9JUMbfnG3vl2yqHHH58lNG3rjqWLOs=@vger.kernel.org X-Gm-Message-State: AOJu0YycJam0lcAEp3Dt41klI2zMItdXw9pRtm9hcWVKycNq5gVHxnPu ODw8foetdZvRxQ1a0JNBz+sl9PH5WCqhjs+bO8kO1ZVT0LFJYWj9lmA1lXX/pYgyE7HTSo3JuEg M X-Gm-Gg: ASbGncusapBiR5zWltKEn4rwa9NFzioe/gAlHCMZHhlsx+zI/4EIjr4Fk04WXHXH255 imQxRNy19xZvms7Yz68xS04cqKg3DL80IYGTOO1jHJ9knGfTUd+W3uNBG1ww0tZoZmcwlzC/QC7 batPcY6i/uvAuSo+dg3+ATIBped5Cvt5unqKNjKhzzg9q31NB9eCs8eBTRff5EXtppUHhoexPkS Hrb7Ku14xjHsKY2ddU51V0upo7V/8B4l7yWKzg62EUbh6KR5oHz0dv73i7kiHPZZYFzAqfP9V7S axWnGSZkM0bQOzMF8ZkNPUDobtZxot1ohZYtkcbVtGD8JWB4ZsImgYk= X-Google-Smtp-Source: AGHT+IE675xAbbKMbD4WeLidcu5LWshKzXZX5noo05D93crI/D9lMfCT+vddCc2faeoXBgbbVScKiw== X-Received: by 2002:a17:907:972a:b0:ac6:f4c1:b797 with SMTP id a640c23a62f3a-acad349c39cmr1352690966b.19.1744725201472; Tue, 15 Apr 2025 06:53:21 -0700 (PDT) Received: from [127.0.0.2] ([2a02:2454:ff21:ef41:7b18:2529:5ce1:343d]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acadcc21a44sm681379166b.177.2025.04.15.06.53.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Apr 2025 06:53:21 -0700 (PDT) From: Stephan Gerhold Date: Tue, 15 Apr 2025 15:52:47 +0200 Subject: [PATCH 4/8] arm64: dts: qcom: msm8916-motorola: Use UART1 console pinctrl Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250415-msm8916-console-pinctrl-v1-4-a1d33ea994b9@linaro.org> References: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> In-Reply-To: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Day , Casey Connolly X-Mailer: b4 0.14.2 The Motorola MSM8916-based smartphones all use UART1 with 2 pins (TX, RX) as debug UART console, so make use of the new &blsp_uart1_console_default template. This applies the needed bias-pull-up to avoid garbage input, bootph-all for U-Boot and avoids having to override the UART pins. Signed-off-by: Stephan Gerhold Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi b/arch/a= rm64/boot/dts/qcom/msm8916-motorola-common.dtsi index 48134e5ff524fd5708db7b9c3a567ec3f751868c..4e202e7ed7db1921f347ca8b4a0= 1ccec593a8d8e 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi @@ -69,8 +69,8 @@ rmi4-f11@11 { }; =20 &blsp_uart1 { - pinctrl-0 =3D <&blsp_uart1_default>; - pinctrl-1 =3D <&blsp_uart1_sleep>; + pinctrl-0 =3D <&blsp_uart1_console_default>; + pinctrl-1 =3D <&blsp_uart1_console_sleep>; pinctrl-names =3D "default", "sleep"; status =3D "okay"; }; @@ -132,14 +132,6 @@ &wcnss_mem { status =3D "okay"; }; =20 -/* CTS/RTX are not used */ -&blsp_uart1_default { - pins =3D "gpio0", "gpio1"; -}; -&blsp_uart1_sleep { - pins =3D "gpio0", "gpio1"; -}; - &tlmm { gpio_keys_default: gpio-keys-default-state { pins =3D "gpio107"; --=20 2.47.2 From nobody Tue Dec 16 04:06:50 2025 Received: from mail-ej1-f50.google.com (mail-ej1-f50.google.com [209.85.218.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C5A21C5D4C for ; Tue, 15 Apr 2025 13:53:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725206; cv=none; b=jtsRidizy2fuhmKTZUebpWmaG1MkIhTIMU1RqrJdLGI4zKHZm/WPL7hIYlI+R5kN9NevhXnIarfgJ26dC5aZYyvbacOkOhfvDSxquKp5yH1/s+ruajHXg+ksT/x0BQhyzoAVqSlSK7Bkji62Mn2LH11fZbhH9rlP5llpBn/+Uac= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725206; c=relaxed/simple; bh=pasHWSU2nGmm0wTdGpnA+YTR6fwTfPInkJzIhRwnGrU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=r8kVB8C7f98vfkMqvenHmX7I6L66Y69vIJuSdLcQ0WOdkU6SQf8fMSG/Q6ynw1KWiMx7lgbbrbtb7I8Ovz2V+dlLvp8mscXJo3rBEcapBSvXEfARSY5ffE+AeeO25mHnedv5p3lm8nhDEZjXT8a5JujPXmsiOhdyE8rYcOxdO8o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=OXqnwST7; arc=none smtp.client-ip=209.85.218.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="OXqnwST7" Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-ac3fcf5ab0dso962187566b.3 for ; Tue, 15 Apr 2025 06:53:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1744725202; x=1745330002; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Pge4o9cHBqaAOg3mTeBAmeDqZJrFMUn1AiEvtXGp2iw=; b=OXqnwST7WFfDrifUexDB9Soe7hM9674ZD3EZbzJsHKIxHd1b3t8VkB7dzCB4mpAaba XkuiEUTS5Xto/qnjouI91TO2T1t9Xh566Yz13xWMg0/oR9nEkoipyRkzLQVDDoOK1Aba 2ixY+FobFkHu/pSZmcavbcSs5lFJsp/Ao8clM8Yb4R58ujFwSrr20M0WxPNvuRx8JfhQ DAeOJFcM7vyODG6kP08l+fwS0RRQBUtwp6mVabwmNvDGD5k73JKb+Bc1kfkfXQP3ifqf hFtOIQD3LgQpdvAv8DppiAnF1taoSzIk/GfbVOBR89ZGX6+twoYMywX8McdC4A1MErlD Kgdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744725202; x=1745330002; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Pge4o9cHBqaAOg3mTeBAmeDqZJrFMUn1AiEvtXGp2iw=; b=sVcwJVYscV8Wp2Gx0Vs/sG1yVqFLCEZr1h9EOlZTLiunJdTc+5Z+BjUjIuqvE5bJKX rJidngRlAiRz7QRZhHD4eFMdSk1RhtEuKelmVwBRDXjmigXB/u+iQBbJfc5TkY+cvL3b gIMhf8vllLPlz1GySbQzCBu6XBLi9pwzdau3mZA4Y8uWB1V/I05VuXEF5d7OUQtjITjf uLyF9VsMW3VWp4sDPjYOg1++JSh0J7l9yuXPBO9597QaR3Ed/eewdW7f15BeC2KVF6xk 8MnufbEuOE1t6HFt2yo2VSE1q/HzG8xHc8d+pg8IAFfBB/358TdTzrIijZJe327QNSQL TV3A== X-Forwarded-Encrypted: i=1; AJvYcCWrc5HN2NFcOMV2o5o3qcCX2MILJFdJSz9mltvArtqobc7SD51xdj9h7SlntTzijSoXE/E/dJMhjkTNQk8=@vger.kernel.org X-Gm-Message-State: AOJu0YzWs0E9tMFFgR1B7MTLqmn8ku5D3Wx3ZStYHI/HUJOryDhOviVN w8f3atMM7/vqPrZIE7vHQFU2u8UVnSTcd3/9FMhmnZsU8GwZh0RhVLh5/O3WC3Q= X-Gm-Gg: ASbGnctIumUqR3KZn1V9vrhwde7yLoETwYm8kunhy2OT3Fqci9cE+7fcm5+MD+Ou5Ev eWS79L8h9kv0Iqq2i8RYPKRYaLRzPJmlT8CQSFKaoEpF2c01WU9dYIfPFxh/YkHq7o8JIxtjlqN +oUQQijo2sy1Plya4SJrWb5HWLPsM19Rxv9WrS+x9U/lNFHkuXmGi8zxg9Va1IW8xkcbHLzo3Cg 9E1Mw9tiz8jZbmj7jWejLER3LLSa3+NFGAvxI7E9GMshOtHOHR9vS5RVkwNg/I0Qo5geC/zRf15 xhiDIepJQzyBJ2Vc2pMh9DQtuNLuN7sMLLvXFgdaZIq39HtHhlD1siE= X-Google-Smtp-Source: AGHT+IFzbpbH4GLJ5InXnSEyFRv0wczgq6f5oEy25Mu0yL/aDFPOfMB7Jlpd8NTCxr4BmMOv9fFWgw== X-Received: by 2002:a17:907:8690:b0:ac3:446d:142 with SMTP id a640c23a62f3a-acad3445e2fmr1369567166b.2.1744725202370; Tue, 15 Apr 2025 06:53:22 -0700 (PDT) Received: from [127.0.0.2] ([2a02:2454:ff21:ef41:7b18:2529:5ce1:343d]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acadcc21a44sm681379166b.177.2025.04.15.06.53.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Apr 2025 06:53:22 -0700 (PDT) From: Stephan Gerhold Date: Tue, 15 Apr 2025 15:52:48 +0200 Subject: [PATCH 5/8] arm64: dts: qcom: apq8016-sbc: Move non-console UART pinctrl to board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250415-msm8916-console-pinctrl-v1-5-a1d33ea994b9@linaro.org> References: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> In-Reply-To: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Day , Casey Connolly X-Mailer: b4 0.14.2 Prepare for removing the generic UART pinctrl templates from msm8916.dtsi by copying the definition for the 4 pin UART1 instance into apq8016-sbc.dts Having it defined separately in the board DT file makes it clear that the set of pins/pull etc are specific to the board and UART use case. No functional change. Signed-off-by: Stephan Gerhold --- arch/arm64/boot/dts/qcom/apq8016-sbc.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts b/arch/arm64/boot/dts= /qcom/apq8016-sbc.dts index f12a5e2b1e8c2cce6e85b8444c97a7e0d7b7c58f..b0c594c5f236c9c1d334e6acfca= a7e41c1f9f3a5 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts @@ -597,6 +597,21 @@ &tlmm { "USR_LED_2_CTRL", /* GPIO 120 */ "SB_HS_ID"; =20 + blsp_uart1_default: blsp-uart1-default-state { + /* TX, RX, CTS_N, RTS_N */ + pins =3D "gpio0", "gpio1", "gpio2", "gpio3"; + function =3D "blsp_uart1"; + drive-strength =3D <16>; + bias-disable; + }; + + blsp_uart1_sleep: blsp-uart1-sleep-state { + pins =3D "gpio0", "gpio1", "gpio2", "gpio3"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + sdc2_cd_default: sdc2-cd-default-state { pins =3D "gpio38"; function =3D "gpio"; --=20 2.47.2 From nobody Tue Dec 16 04:06:50 2025 Received: from mail-ej1-f46.google.com (mail-ej1-f46.google.com [209.85.218.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 487D61DDA32 for ; Tue, 15 Apr 2025 13:53:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725207; cv=none; b=FwwNDFlnbv2nqww3zAc/Ug9VhwOc8sLtx0RNIMojcVKmxdBw4nS5izmDfRnpkbzmyGJp9zeXEDoBfH8bcCyjpBCz/bLgW26CffIOC6gY1k0H8XhKv6SyAEPIs8ghXTG9rlc54jsj2XiZQHRo7rZXnJMTxjvVN1dJyxr1nDS8UCA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725207; c=relaxed/simple; bh=2KwIlvvGECXFrETJCT6z2gk+hxmBfBaHfHMjOZSbJew=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SMgiDj2XsLwl6E286TK0HEEd2Uy+Uklg+urssxhLeEUJOpXEszujqqR2tzDqPfhubd6LCRyM0a7rGG0TqozxhE9fixapsQrdWz2nkNsRvmqg+oKBlrWA3DklenyDAbQBazKxrk1uM1zJRV/wLn09rsk0O/It4F8SB0ImnN/JZxA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=ow4Iftyv; arc=none smtp.client-ip=209.85.218.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ow4Iftyv" Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-acacb8743a7so835991166b.1 for ; Tue, 15 Apr 2025 06:53:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1744725203; x=1745330003; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=IzromOuf9zzJyEBnUnC0UIApSp7seWmK6Swkwn2TE30=; b=ow4IftyvpsLLhLr7EM9k4WQnLD38TPJD0GMXoSHK6tEddkfqBDwasXqc6AcA9DY/aE sXuplFWIQTB6wA0Tbe+ApnedhZ9exwiKI0vG25lMDi7PWkHUzF3eGaAs3DfAGK8cIZ3n mwuCzDyerdEXCBpMuz8oOX96UyuJxMSWgRhoLvkHgPl5Xbqei7xe1zQufImgGQV06WRX A6cByR6fPOeb94Z02/R7bXPL3o5X+yqgebCQEWyuz9eTA50xLm8Z/4gzMWwbmeS6lp0L PbjuzsmOi+gn8czrdGoZLU94jc+hU1jaAYpqyM17E1i8X6k4K007dMv3zqwUyZHu81j1 tdWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744725203; x=1745330003; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IzromOuf9zzJyEBnUnC0UIApSp7seWmK6Swkwn2TE30=; b=EOniKK0XgXY6t8KK2HxEjxMbcW2sGDwZzDpwOwNNCq+KFgtx6wZzroBBCSEBwtHFv5 qN0/VmFvY02jeyDq09DR7H8kQrrCi3YilytI9tKV4DfQoJHKr/PIkuH/zL6WSyAi5jP4 i0YwSRhx5u3dCueRCadETtvHgJq8XSdMpqZXasnGrgtPPnL0WnqnHgQB+jlHdKTwPkzC 9uCETlGP/Jqsh5pGfN/7PfgSOur7jFuQMajLFIDgOv8+9HYk0FJggGEUsH8G0V61kLaq w9/tWPYO876ZJJDS/zI8S1keWZYfKL1kcuhBTMHm1zRq7kkkumwYwT/cLMD3B6rFCOf0 XbbA== X-Forwarded-Encrypted: i=1; AJvYcCVWOk4OQoQQMdIHemGieu2zowTaWHEKjBaN7bGXYtDvBt2webJLxuHEXuMp0jK3kn/EfrvxTfk0nfGrq08=@vger.kernel.org X-Gm-Message-State: AOJu0Yz+z4oueiukQvqCdHs24ro2pT7hwo/sGxmXm/+efivPcb+bvHKc UtFSJOhiWrNNYWu3+MXfkbQ+ASuVMEkYgDixq4o7jwtCT4dZlthlflfn9WPIbPs= X-Gm-Gg: ASbGncsqc3es9ut67AjqoZH+PcAZogCDfbC0X9fnDsN7MNUHXx+lJmswMGKBm5wWF8i 2/qUbbuwLdiGleH96kDtG++uiVm4K0/byvHHL1Za0DyQbUUXIRwTc0aJ8K2BknsOhtjbYC+6q1S d3PQkWyzRnI+iDYd7M13LLG5F5ugC5s3ZQc7Z12gW2RUdS9CMNjAsr1TST/6r4KtnrZisKs5zMn 1D3DCkufv2AEtE+f3fJOJrGGbPeH0QGHtkmXQt1830J6v6DfOWU17nwFHEZJ4J5ZePImLRXbQ6z St2Go40WptZykW5wr97HA5NjpVCvGdy8xLItVrts7MXKoPn0rp85VIQ= X-Google-Smtp-Source: AGHT+IFwlxOkxM+FSTXk89qNtD3AqxVqNDqmG63ewdt7FIeooDU3A2bPFLmNB60nWDT25K0clFz4aQ== X-Received: by 2002:a17:907:d15:b0:aca:d48c:916 with SMTP id a640c23a62f3a-acb166d6d5fmr282910266b.9.1744725203245; Tue, 15 Apr 2025 06:53:23 -0700 (PDT) Received: from [127.0.0.2] ([2a02:2454:ff21:ef41:7b18:2529:5ce1:343d]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acadcc21a44sm681379166b.177.2025.04.15.06.53.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Apr 2025 06:53:22 -0700 (PDT) From: Stephan Gerhold Date: Tue, 15 Apr 2025 15:52:49 +0200 Subject: [PATCH 6/8] arm64: dts: qcom: apq8016-schneider-hmibsc: Move UART pinctrl to board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250415-msm8916-console-pinctrl-v1-6-a1d33ea994b9@linaro.org> References: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> In-Reply-To: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Day , Casey Connolly X-Mailer: b4 0.14.2 Prepare for removing the generic UART pinctrl templates from msm8916.dtsi by copying the definition for the 4 pin UART1 and 2 pin UART2 instance into apq8016-schneider-hmibsc.dts. Having it defined separately in the board DT file makes it clear that the set of pins/pull etc are specific to the board and UART use case. No functional change. Signed-off-by: Stephan Gerhold --- .../boot/dts/qcom/apq8016-schneider-hmibsc.dts | 35 ++++++++++++++++++= +--- 1 file changed, 31 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts b/arch/a= rm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts index 7a03893530c7b89705f5544491c14edd7120acdc..ce75046ffdac48a206d14499bc7= 11f8f4a777fe5 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts +++ b/arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts @@ -373,6 +373,37 @@ adv7533_switch_suspend: adv7533-switch-suspend-state { bias-disable; }; =20 + blsp_uart1_default: blsp-uart1-default-state { + /* TX, RX, CTS_N, RTS_N */ + pins =3D "gpio0", "gpio1", "gpio2", "gpio3"; + function =3D "blsp_uart1"; + drive-strength =3D <16>; + bias-disable; + bootph-all; + }; + + blsp_uart1_sleep: blsp-uart1-sleep-state { + pins =3D "gpio0", "gpio1", "gpio2", "gpio3"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + + blsp_uart2_default: blsp-uart2-default-state { + /* TX, RX */ + pins =3D "gpio4", "gpio5"; + function =3D "blsp_uart2"; + drive-strength =3D <16>; + bias-disable; + }; + + blsp_uart2_sleep: blsp-uart2-sleep-state { + pins =3D "gpio4", "gpio5"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + msm_key_volp_n_default: msm-key-volp-n-default-state { pins =3D "gpio107"; function =3D "gpio"; @@ -469,10 +500,6 @@ &blsp_i2c6_default { drive-strength =3D <16>; }; =20 -&blsp_uart1_default { - bootph-all; -}; - /* Enable CoreSight */ &cti0 { status =3D "okay"; }; &cti1 { status =3D "okay"; }; --=20 2.47.2 From nobody Tue Dec 16 04:06:50 2025 Received: from mail-ed1-f52.google.com (mail-ed1-f52.google.com [209.85.208.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 01A4778F4B for ; Tue, 15 Apr 2025 13:53:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725208; cv=none; b=REUHTxP9Ct+/94WROZbY4cVG9TnCOovj3w/aF7iqZvM8HVM5gNInsn2s2yh7x4mXeMb2jI5m1U3Vi2j8v4CTvgr2LDpn+eV5Ws5AeE3WM4/rloQWEOUqQMyqRncqHx1urFLGDi0gGLXMedFeFV49+AGk2d7Gf5rkdQ+ETZMWeco= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725208; c=relaxed/simple; bh=ZIi3kcYiMso2WJn9cew3pYXvwn9ZXc1TLzpsXS99dGU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qR0QzPAfUKed0EFQ005bNKKLiMrNyzUTUKCvKIhsWGhRCRM7j+lqxRUevnQLeeyHMxNQ5w+lGArcZDQrh7zVdE5FfxPQF4e9hl7FZSp3VwPPramo/xDHNJGcMzML15jqjHZ10i7jxKKp0P+6kv4tmLMn79GkTBeMMdAFZ60j2Bc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=v9jvvfyW; arc=none smtp.client-ip=209.85.208.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="v9jvvfyW" Received: by mail-ed1-f52.google.com with SMTP id 4fb4d7f45d1cf-5e5cded3e2eso8929648a12.0 for ; Tue, 15 Apr 2025 06:53:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1744725204; x=1745330004; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=/MYD5mLPfBJwtdhmSlhM/n7g0njzNNoiH91RzZwtKY0=; b=v9jvvfyWu6G0l2ckXMU/H8V5aLqKncBMZafm55nGih2VSuAFGtgZhrftroS/wqo3L0 s5GcHpWYI3eshVYJsVddUJDw6XHWb5FT1k3i8mZoMi2mIMzV0a2V6HbDf31T1VbMsuJc leiIdD9BuMaQBPrSXvPGVa+a6375hLPHrSXRTcmhHvCJoV7tp4B0IqRyxv9M+f5LE45L 8US1JaProNJM9M+SqGViI5YObyONRr9fDJxAueb3GJXYQDA0k0JKlCBxz/E/rTKnMoF0 dMv1gxVSGEi9ooqHcXlydc3B0MQvIOAOt7WzO75qo5rT8XKAhnYC3ozCvWSYrIsOwiBf /yzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744725204; x=1745330004; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/MYD5mLPfBJwtdhmSlhM/n7g0njzNNoiH91RzZwtKY0=; b=KJS4WsCHut1xgZAGu1fm3h7GCydrJOV12llvJNxTNxvkT4UeTI0B1EoBsfw1Ln3k4+ aC3ESubDieSO0M2J1j0euoRHwTXWED5Q8bjnge/9vqQs4j9H/mPw/uCCyKnJl++Xi58s 6Xe6yEOELqbvRAqtHsxHPcpJJcn2CPP3Fx7H64Tk2Ym9gaw8W/c54XDut7Q7kS1L1Daz DVmLIbNFiCT8BFh49YHHKUkTwgzO+bhqj/w89K+bfdnsWbxorlIftvxPh0XnpjLS1wJx z6PvMknmeFPP+uZGibkDHxJgKXv3+3LdayIQmIlX/rYHTjzP45t3WjGRz3Tl1ZpxCnoA CRLg== X-Forwarded-Encrypted: i=1; AJvYcCWyzISGZHY4Fl330h+mEdzbKD3rStct1sB27NTN1q6/BqzBGYWXqZ19xZ34tdc4RBe0jJPGlsreSjAZpX8=@vger.kernel.org X-Gm-Message-State: AOJu0Yz22XUASCwly3xFOqKkRB+eIvBAV5VTEoa/Rk91DuFNWJbJFaAh 7aP8syB0SIXXw+155W7KAPvnPWj4o8rm6+W4ZjayPA/XxS5+JckPsy2hGaM+4l4= X-Gm-Gg: ASbGncuV2HI0Euklh11KceAQfFDgZ9QhMIhgMtKUmICmAoIMyCps0Hha+oTlbQXatpN lRYEDE+kmJhnQ9B/RvdjKv0esfAxK6N/mZLCAdfiVYIrvSl8eCinsY77KZQX9TUIL2he/AXikLK K38JICMsOHElZBd61kUU273SChAFt4BKjTEzOPOnLejVELUktdlex54/UrB1kuJOrXIDrGQrbtH VkxQMgr3kUdFqKCa+LwuxbJ/r94iY0lnkubo1QZNpy3v/aswZynGTgyeqK0JUtqjz29xK+KMT3Y u0LTCNYZyqASi8Q3Y1yzTesMX1+Vlbi++W6YpTYK3K6ZDte8O4fZF7s= X-Google-Smtp-Source: AGHT+IEVRudoi2scqh4XMCLq7eGU/gtugjegdf6OGs4JINDcEGAAHxM95AejGZDsKYMpE+VTCck6EQ== X-Received: by 2002:a17:907:3d4d:b0:ac3:8626:615 with SMTP id a640c23a62f3a-acad36d62camr1778426566b.49.1744725204133; Tue, 15 Apr 2025 06:53:24 -0700 (PDT) Received: from [127.0.0.2] ([2a02:2454:ff21:ef41:7b18:2529:5ce1:343d]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acadcc21a44sm681379166b.177.2025.04.15.06.53.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Apr 2025 06:53:23 -0700 (PDT) From: Stephan Gerhold Date: Tue, 15 Apr 2025 15:52:50 +0200 Subject: [PATCH 7/8] arm64: dts: qcom: apq8039-t2: Move customized pinctrl to board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250415-msm8916-console-pinctrl-v1-7-a1d33ea994b9@linaro.org> References: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> In-Reply-To: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Day , Casey Connolly X-Mailer: b4 0.14.2 Prepare for removing the generic UART pinctrl templates from msm8939.dtsi by copying the definition for the 4 pin UART1 instance into apq8039-t2.dts and apply the override to limit it to 2 pins. Having it defined separately in the board DT file makes it clear that the set of pins/pull etc are specific to the board and UART use case. No functional change. Signed-off-by: Stephan Gerhold --- arch/arm64/boot/dts/qcom/apq8039-t2.dts | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/apq8039-t2.dts b/arch/arm64/boot/dts/= qcom/apq8039-t2.dts index 4aa0ad19bc0f7fde6f5f3a93cdb6be19fb4f1f65..38c281f0fe65ccfc49de70eaef2= a970323ecebc8 100644 --- a/arch/arm64/boot/dts/qcom/apq8039-t2.dts +++ b/arch/arm64/boot/dts/qcom/apq8039-t2.dts @@ -122,14 +122,6 @@ &blsp_uart1 { status =3D "okay"; }; =20 -&blsp_uart1_default { - pins =3D "gpio0", "gpio1"; -}; - -&blsp_uart1_sleep { - pins =3D "gpio0", "gpio1"; -}; - &blsp_uart2 { pinctrl-0 =3D <&blsp_uart2_console_default>; pinctrl-1 =3D <&blsp_uart2_console_sleep>; @@ -329,6 +321,20 @@ &tlmm { "USBC_GPIO7_1V8", /* GPIO_120 */ "NC"; =20 + blsp_uart1_default: blsp-uart1-default-state { + pins =3D "gpio0", "gpio1"; + function =3D "blsp_uart1"; + drive-strength =3D <16>; + bias-disable; + }; + + blsp_uart1_sleep: blsp-uart1-sleep-state { + pins =3D "gpio0", "gpio1"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + pinctrl_backlight: backlight-state { pins =3D "gpio98"; function =3D "gpio"; --=20 2.47.2 From nobody Tue Dec 16 04:06:50 2025 Received: from mail-ej1-f42.google.com (mail-ej1-f42.google.com [209.85.218.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F1C2E1F4635 for ; Tue, 15 Apr 2025 13:53:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725209; cv=none; b=XmH13GfzXi2goLSYALXhQFcmJxuY4DDgwUNYsQIz3dlvAzRI+DTf/Id/uyGYguTf1Qpol9qBikMKGqEt9M50nwDNCJTXdmfkHWP1BMOC0xHMybyqZpFnxlKq+3hfE881GC+uCrRLlQAFtQpkt1zUg453tFg4Ej6TEIx6+TxV0cc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744725209; c=relaxed/simple; bh=vHHaCmn/9aX14sPYqzMHTDqRNgtEpmUR2XVR9kxw4us=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=R0t/H4f7Fpg9P85b+IHY3D0p7hwn6iB6RCXp3ihqPDvwrMFEyA2zCOYoJdeXpWrNkoOjqM+eAGrb/TYYg7lGxYAe1ammi6Hk17TEKOPnwLvttpW86cplhC/Z0E+15wzPGMuzAkDoUe0FLh0uMF0+czzWqjI1O4211o3pDQIJRIk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=LMZ3lR7U; arc=none smtp.client-ip=209.85.218.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="LMZ3lR7U" Received: by mail-ej1-f42.google.com with SMTP id a640c23a62f3a-ac29fd22163so890349866b.3 for ; Tue, 15 Apr 2025 06:53:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1744725205; x=1745330005; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Y4l6FA9ivn6gypUQ5rfKT4sB7wf6dagDvJ3RDh2XcgA=; b=LMZ3lR7UIsJ9tfCDq+sA6fcKM2jFaPcqVG015fmPGAT5WMYmxD2nnLkHWN5wvnMLO7 p5tV7ZsTsgr8HT8/m+ENLr5zCrsQ8ULfFKj+zFRDm6ZF80B0ybYzDK7eIIKPhnBbe/cC AlTl5xWFZ1KfKwHDPIRk84RiPzFGrWQE92G1uY0/GovRkbUaec0o0sV1cNNvJTNSMY1t w6mSoU18P9o9RxbTaPB3muXBJDhFJh9Hu6LSDImktT9q2iibYw/AXbw2FcaQosp5EpGf /0zw64yU6XXaxVXB/8Wg+oAvEGq4ikU8BELQUg5y3Q05p/xBmef2bG4Ji0WYfIikLDzE a4rQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744725205; x=1745330005; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Y4l6FA9ivn6gypUQ5rfKT4sB7wf6dagDvJ3RDh2XcgA=; b=bYCmukJSW0WvZR1CTZmrzkouyT+AaFhmXeSKMDjWdMVdSQIRd/yDSVYGxJOV5VTQ2W 41l3ZCyH2DvEDZGXPLCivITmWB18MqDc1lG6upLFTg+aAcAiiFHLbK7Ubg/j9++dACvw 4K1ceNA7J49aEfeGL6LbcNkUZD+XYWcW8FCNpF6csABVLU2EWjzUyQBDFSMUFQumeUIa QrUptuS5jDqxLTpuoOq8uXNtBHd3qFo0hzbyqa4wymUCPaO3JWx3sybtxt4EPn+nzXab Ehpv7DSwSG6yQP5AN+Nf5DZjmi5V1LH5wHTDYhcmzRhEsoiQiOwy5H9lZOTz07EBteY5 k0/w== X-Forwarded-Encrypted: i=1; AJvYcCWRwyaukhc4GaTLQNuS6uKZEuYLc/bQ9wfN0KRQOnayG+9Lw13/Bt7hwr7/UrFQ7KXZjhgMy0PBtWcnDdg=@vger.kernel.org X-Gm-Message-State: AOJu0YwaT1/KWdNUZmR2I065HP7iAiz83ldw1pD0Jsr975Q3xk0vZLrf Im5ptmCzR+YWLpFqzxoZxWqYC+uteRtAGlZbEAJn51MzI7vXR/GwFm7xkXbOrN0= X-Gm-Gg: ASbGncufqn9po7ARhmD6vibnfk+HXK+rGbWmu1Fx6C5VAlLwRS9utiYwIQOtyRnuKjc m/larT0+zn5XMj7ohbW3lXCjzDP/gJNPUhNJz6V05eYtG+mfa+nZIpUUbzZmqKOjgVvHPN2cedN s7DgF7M7bMc+Ikbzgp9WnIsiuixW2mvmNkrx6Z+X/Gzd7DIZ7QUi13xHg8EUgSjpKwqJ80eRRHg uyGmEPiBQ2TSTJaXxqCQ/BuE6RJrZlwQrsMjSM/Ah++jg3JMTOm0YZVG/ihmVXfSd7e8j820f5p yfEoQdwmQM4LFk86skjSWOh4HKiKFrB5l1NA7q8l0F1YS/y7+xngc0I= X-Google-Smtp-Source: AGHT+IGLoagUswLH/ZZJxI5K2dTSGE3DxsOQWCM3VHaHo3ThpnYQbzNk4zQXdqBSRKUbftY/ghk2xw== X-Received: by 2002:a17:906:db06:b0:ac6:ecd8:a235 with SMTP id a640c23a62f3a-acad34c1a5bmr1656932066b.28.1744725205043; Tue, 15 Apr 2025 06:53:25 -0700 (PDT) Received: from [127.0.0.2] ([2a02:2454:ff21:ef41:7b18:2529:5ce1:343d]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acadcc21a44sm681379166b.177.2025.04.15.06.53.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Apr 2025 06:53:24 -0700 (PDT) From: Stephan Gerhold Date: Tue, 15 Apr 2025 15:52:51 +0200 Subject: [PATCH 8/8] arm64: dts: qcom: msm8916/39: Drop generic UART pinctrl templates Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250415-msm8916-console-pinctrl-v1-8-a1d33ea994b9@linaro.org> References: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> In-Reply-To: <20250415-msm8916-console-pinctrl-v1-0-a1d33ea994b9@linaro.org> To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Day , Casey Connolly X-Mailer: b4 0.14.2 Now that all boards use either the customized console UART pinctrl templates or define the UART pinctrl directly in the board DT file, drop the old inconsistent generic pinctrl templates to reduce potential confusion. No functional change. Signed-off-by: Stephan Gerhold --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 24 +----------------------- arch/arm64/boot/dts/qcom/msm8939.dtsi | 23 +---------------------- 2 files changed, 2 insertions(+), 45 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qc= om/msm8916.dtsi index 9f1796222c597afd45dd31131b198f3574e97885..4175abc20fa7d26180ea4c69a0e= 1972222261354 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1232,21 +1232,6 @@ blsp_spi6_sleep: blsp-spi6-sleep-state { bias-pull-down; }; =20 - blsp_uart1_default: blsp-uart1-default-state { - /* TX, RX, CTS_N, RTS_N */ - pins =3D "gpio0", "gpio1", "gpio2", "gpio3"; - function =3D "blsp_uart1"; - drive-strength =3D <16>; - bias-disable; - }; - - blsp_uart1_sleep: blsp-uart1-sleep-state { - pins =3D "gpio0", "gpio1", "gpio2", "gpio3"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-pull-down; - }; - blsp_uart1_console_default: blsp-uart1-console-default-state { tx-pins { pins =3D "gpio0"; @@ -1271,13 +1256,6 @@ blsp_uart1_console_sleep: blsp-uart1-console-sleep-s= tate { bias-pull-down; }; =20 - blsp_uart2_default: blsp-uart2-default-state { - pins =3D "gpio4", "gpio5"; - function =3D "blsp_uart2"; - drive-strength =3D <16>; - bias-disable; - }; - blsp_uart2_console_default: blsp-uart2-console-default-state { tx-pins { pins =3D "gpio4"; @@ -1295,7 +1273,7 @@ rx-pins { }; }; =20 - blsp_uart2_sleep: blsp_uart2_console_sleep: blsp-uart2-sleep-state { + blsp_uart2_console_sleep: blsp-uart2-console-sleep-state { pins =3D "gpio4", "gpio5"; function =3D "gpio"; drive-strength =3D <2>; diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qc= om/msm8939.dtsi index 16c16ec0f4560a7102f8ffef20c58fbec81dee38..3ee61acc0f96aaf79a182d21920= b3664a0daa5fc 100644 --- a/arch/arm64/boot/dts/qcom/msm8939.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi @@ -905,20 +905,6 @@ blsp_spi6_sleep: blsp-spi6-sleep-state { bias-pull-down; }; =20 - blsp_uart1_default: blsp-uart1-default-state { - pins =3D "gpio0", "gpio1", "gpio2", "gpio3"; - function =3D "blsp_uart1"; - drive-strength =3D <16>; - bias-disable; - }; - - blsp_uart1_sleep: blsp-uart1-sleep-state { - pins =3D "gpio0", "gpio1", "gpio2", "gpio3"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-pull-down; - }; - blsp_uart1_console_default: blsp-uart1-console-default-state { tx-pins { pins =3D "gpio0"; @@ -943,13 +929,6 @@ blsp_uart1_console_sleep: blsp-uart1-console-sleep-sta= te { bias-pull-down; }; =20 - blsp_uart2_default: blsp-uart2-default-state { - pins =3D "gpio4", "gpio5"; - function =3D "blsp_uart2"; - drive-strength =3D <16>; - bias-disable; - }; - blsp_uart2_console_default: blsp-uart2-console-default-state { tx-pins { pins =3D "gpio4"; @@ -967,7 +946,7 @@ rx-pins { }; }; =20 - blsp_uart2_sleep: blsp_uart2_console_sleep: blsp-uart2-sleep-state { + blsp_uart2_console_sleep: blsp-uart2-console-sleep-state { pins =3D "gpio4", "gpio5"; function =3D "gpio"; drive-strength =3D <2>; --=20 2.47.2