From nobody Fri Dec 19 14:21:18 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DEDE62DFA3B for ; Mon, 14 Apr 2025 17:34:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652088; cv=none; b=IQbczxeFlBaHkVJjKMWpXDgyG9MP6twsjinDS+lcpoYh8fXBE/ouNYRhMDalB3lK6119unkd/iWRnyUxj7AYqfbpkekJG9Y7+bi3BqnorBZsa2uNg/1aGKL9DSFDm5WWWo81WFAt0Qug8kalL0+2ron3caPu2bnrUoHVGJc7oKM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652088; c=relaxed/simple; bh=MhY2mOMZdhe+hzFv2dy4g9r/qRqSqsAEIGToA20bzaQ=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=LKcfbE3rTE9oaQP/9aCznytOBUnN7ayQ4iics+7kz13xZeEi+GQV65DcM4dACegJg5BE7o2PjRQG0jUar/PV6f8I1IgEHo1xEmJvAwN6u4HVruiVCwNT/RVhdzrNEWmU3ezQHzphuA11Z7F/QRgpKP00PU14Q+HZpXpGfvUtvTo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=doajr4RJ; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="doajr4RJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744652087; x=1776188087; h=subject:to:cc:from:date:references:in-reply-to: message-id; bh=MhY2mOMZdhe+hzFv2dy4g9r/qRqSqsAEIGToA20bzaQ=; b=doajr4RJGiD66PsEs2iOkIocg4n5+ekBAoyU3gk8DrjGLHIqK8Lkdb5N w9GxxWjyqeeMEdKYQXODhmUlMMTS1BGLe+F+5q+BYxK05Bf+7U9DhDp0f UEGvbGD3xnGa/rpoD5cYEfwuDYa+fw1R0rHDDRTORj1XvHzIoiu90JjzE L0teRqy1yLW1PEFp/YLYmzbwGmhbj9yUpCSktiuzPV5kZqhQqlzenPlAY oVj89RviQR1eZrtU0Uq+tbzeVaLTeNJpCzDf5m5LF2Nwcs2oMs5mNFX+M zg2JsXpJDNecswhizUbFHeTzXENZQELDkU/hdCMPHKplczCsjGvvyL+f2 Q==; X-CSE-ConnectionGUID: 1s8Ph3r5QoeOlyNSH2Iw1w== X-CSE-MsgGUID: VYFEvhseRB6G+teWYbEmoQ== X-IronPort-AV: E=McAfee;i="6700,10204,11403"; a="49790075" X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="49790075" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Apr 2025 10:34:46 -0700 X-CSE-ConnectionGUID: ZvxxU+riRbaX/HERPlNgyw== X-CSE-MsgGUID: Sw8ZxByKQBaegkaXuvpFAQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="129645437" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by orviesa009.jf.intel.com with ESMTP; 14 Apr 2025 10:32:35 -0700 Subject: [PATCH 1/8] x86/mm: Always allocate a whole page for PAE PGDs To: linux-kernel@vger.kernel.org Cc: x86@kernel.org,tglx@linutronix.de,bp@alien8.de,joro@8bytes.org,luto@kernel.org,peterz@infradead.org,kirill.shutemov@linux.intel.com,rick.p.edgecombe@intel.com,jgross@suse.com,Dave Hansen From: Dave Hansen Date: Mon, 14 Apr 2025 10:32:34 -0700 References: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> In-Reply-To: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> Message-Id: <20250414173234.D34F0C3E@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen A hardware PAE PGD is only 32 bytes. A PGD is PAGE_SIZE in the other paging modes. But for reasons*, the kernel _sometimes_ allocates a whole page even though it only ever uses 32 bytes. Make PAE less weird. Just allocate a page like the other paging modes. This was already being done for PTI (and Xen in the past) and nobody screamed that loudly about it so it can't be that bad. * The original reason for PAGE_SIZE allocations for the PAE PGDs was Xen's need to detect page table writes. But 32-bit PTI forced it too for reasons I'm unclear about. Signed-off-by: Dave Hansen --- b/arch/x86/mm/pgtable.c | 62 +++----------------------------------------= ----- 1 file changed, 4 insertions(+), 58 deletions(-) diff -puN arch/x86/mm/pgtable.c~no-pae-kmem_cache arch/x86/mm/pgtable.c --- a/arch/x86/mm/pgtable.c~no-pae-kmem_cache 2025-04-09 11:49:39.531879317= -0700 +++ b/arch/x86/mm/pgtable.c 2025-04-09 11:49:39.534879427 -0700 @@ -318,68 +318,15 @@ static void pgd_prepopulate_user_pmd(str { } #endif -/* - * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also - * assumes that pgd should be in one page. - * - * But kernel with PAE paging that is not running as a Xen domain - * only needs to allocate 32 bytes for pgd instead of one page. - */ -#ifdef CONFIG_X86_PAE - -#include - -#define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t)) -#define PGD_ALIGN 32 - -static struct kmem_cache *pgd_cache; - -void __init pgtable_cache_init(void) -{ - /* - * When PAE kernel is running as a Xen domain, it does not use - * shared kernel pmd. And this requires a whole page for pgd. - */ - if (!SHARED_KERNEL_PMD) - return; - - /* - * when PAE kernel is not running as a Xen domain, it uses - * shared kernel pmd. Shared kernel pmd does not require a whole - * page for pgd. We are able to just allocate a 32-byte for pgd. - * During boot time, we create a 32-byte slab for pgd table allocation. - */ - pgd_cache =3D kmem_cache_create("pgd_cache", PGD_SIZE, PGD_ALIGN, - SLAB_PANIC, NULL); -} =20 static inline pgd_t *_pgd_alloc(struct mm_struct *mm) { /* - * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain. - * We allocate one page for pgd. + * PTI and Xen need a whole page for the PAE PGD + * even though the hardware only needs 32 bytes. + * + * For simplicity, allocate a page for all users. */ - if (!SHARED_KERNEL_PMD) - return __pgd_alloc(mm, PGD_ALLOCATION_ORDER); - - /* - * Now PAE kernel is not running as a Xen domain. We can allocate - * a 32-byte slab for pgd to save memory space. - */ - return kmem_cache_alloc(pgd_cache, GFP_PGTABLE_USER); -} - -static inline void _pgd_free(struct mm_struct *mm, pgd_t *pgd) -{ - if (!SHARED_KERNEL_PMD) - __pgd_free(mm, pgd); - else - kmem_cache_free(pgd_cache, pgd); -} -#else - -static inline pgd_t *_pgd_alloc(struct mm_struct *mm) -{ return __pgd_alloc(mm, PGD_ALLOCATION_ORDER); } =20 @@ -387,7 +334,6 @@ static inline void _pgd_free(struct mm_s { __pgd_free(mm, pgd); } -#endif /* CONFIG_X86_PAE */ =20 pgd_t *pgd_alloc(struct mm_struct *mm) { _ From nobody Fri Dec 19 14:21:18 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 26E2754918 for ; Mon, 14 Apr 2025 17:34:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652089; cv=none; b=T2gvV3Aus5sa19i0cMxlV1mdKU9gv12H8SJp0OtW2iv3L39yWXz51D8ehTdQMXxYOCR/Ebqb1ff1fDdQp3tGiHL3W0KMVlznoXNdMYTfSConvvUSM1kF+ndecsdYGIRXT+bCJhcdGc8Ac3zRCRbrnIP4MiPxvKuj6Dd/THISBGA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652089; c=relaxed/simple; bh=NG+6+MBEFkyIVqB1KbOXKxdm5b+NHjrFNofalTaUw8I=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=lebdVCHmT/CayAgtuLd2/pfQ3UDBjGRJeN+oIxjBjdPnePsXVw1DMgfNS/rfEFZKtmA+0LljQYkS8GqrlWtFG6T7QYZp2LJFr7S+8yAoCwQ+e1mc6OveLKAwaH51kNmqBl0SZidZ4S+NsZlqztIxJvX4s8L2jCqrrigEmbOYo6Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=min7s2X8; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="min7s2X8" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744652088; x=1776188088; h=subject:to:cc:from:date:references:in-reply-to: message-id; bh=NG+6+MBEFkyIVqB1KbOXKxdm5b+NHjrFNofalTaUw8I=; b=min7s2X8lcUIPd81VeH8d6+StCyId6KRANCKHAeF1aUkzU1kV95V3Tec 1s36QV/sAXtVatFJ4j2CS8J6Ct4UIlV0tAcH/T7+5jJ880TE8mqCO/4fF 4I8/R8exrxrQXIiVX03YCOoj1S4AgTchUN/DRekZEJzaBwb9JsIWSlsFo KK8mqDix+/a4lcm3HfAhV9QqGg/gILMF0e6P3B5BC6KY03js7o6zjtNuy 5GFIqFwQhiil8zOfJu76XcZk3MnS1xsTQjEU122x8BwTgpqsxkDYM0s+1 LjFbqvcW/nHkPKO6oLrFBOEORppPXg1NV9yWpY2bGDipmaFKXVhDa+L4/ Q==; X-CSE-ConnectionGUID: 8SbwaV8aSLqY7O4tymlhLw== X-CSE-MsgGUID: q8uwyUTuSGiaUwZIMxq9eQ== X-IronPort-AV: E=McAfee;i="6700,10204,11403"; a="49790082" X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="49790082" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Apr 2025 10:34:47 -0700 X-CSE-ConnectionGUID: 69Zi+r/rTeO+qJ7gE4s5FA== X-CSE-MsgGUID: SQ0Jz3XgTQGiGt8P8bqS+Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="129645440" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by orviesa009.jf.intel.com with ESMTP; 14 Apr 2025 10:32:37 -0700 Subject: [PATCH 2/8] x86/mm: Always "broadcast" PMD setting operations To: linux-kernel@vger.kernel.org Cc: x86@kernel.org,tglx@linutronix.de,bp@alien8.de,joro@8bytes.org,luto@kernel.org,peterz@infradead.org,kirill.shutemov@linux.intel.com,rick.p.edgecombe@intel.com,jgross@suse.com,Dave Hansen From: Dave Hansen Date: Mon, 14 Apr 2025 10:32:35 -0700 References: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> In-Reply-To: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> Message-Id: <20250414173235.F63F50D1@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen Kernel PMDs can either be shared across processes or private to a process. On 64-bit, they are always shared. 32-bit non-PAE hardware does not have PMDs, but the kernel logically squishes them into the PGD and treats them as private. Here are the four cases: 64-bit: Shared 32-bit: non-PAE: Private 32-bit: PAE+ PTI: Private 32-bit: PAE+noPTI: Shared Note that 32-bit is all "Private" except for PAE+noPTI being an oddball. The 32-bit+PAE+noPTI case will be made like the rest of 32-bit shortly. But until that can be done, temporarily treat the 32-bit+PAE+noPTI case as Private. This will do unnecessary walks across pgd_list and unnecessary PTE setting but should be otherwise harmless. Signed-off-by: Dave Hansen --- b/arch/x86/mm/pat/set_memory.c | 4 ++-- b/arch/x86/mm/pgtable.c | 11 +++-------- 2 files changed, 5 insertions(+), 10 deletions(-) diff -puN arch/x86/mm/pat/set_memory.c~always-sync-kernel-mapping-updates a= rch/x86/mm/pat/set_memory.c --- a/arch/x86/mm/pat/set_memory.c~always-sync-kernel-mapping-updates 2025-= 04-09 12:00:17.126319212 -0700 +++ b/arch/x86/mm/pat/set_memory.c 2025-04-09 12:53:28.082212490 -0700 @@ -889,7 +889,7 @@ static void __set_pmd_pte(pte_t *kpte, u /* change init_mm */ set_pte_atomic(kpte, pte); #ifdef CONFIG_X86_32 - if (!SHARED_KERNEL_PMD) { + { struct page *page; =20 list_for_each_entry(page, &pgd_list, lru) { @@ -1293,7 +1293,7 @@ static int collapse_pmd_page(pmd_t *pmd, /* Queue the page table to be freed after TLB flush */ list_add(&page_ptdesc(pmd_page(old_pmd))->pt_list, pgtables); =20 - if (IS_ENABLED(CONFIG_X86_32) && !SHARED_KERNEL_PMD) { + if (IS_ENABLED(CONFIG_X86_32)) { struct page *page; =20 /* Update all PGD tables to use the same large page */ diff -puN arch/x86/mm/pgtable.c~always-sync-kernel-mapping-updates arch/x86= /mm/pgtable.c --- a/arch/x86/mm/pgtable.c~always-sync-kernel-mapping-updates 2025-04-09 1= 2:00:17.128319285 -0700 +++ b/arch/x86/mm/pgtable.c 2025-04-09 12:53:09.217519767 -0700 @@ -97,18 +97,13 @@ static void pgd_ctor(struct mm_struct *m KERNEL_PGD_PTRS); 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d="scan'208";a="129645442" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by orviesa009.jf.intel.com with ESMTP; 14 Apr 2025 10:32:38 -0700 Subject: [PATCH 3/8] x86/mm: Always tell core mm to sync kernel mappings To: linux-kernel@vger.kernel.org Cc: x86@kernel.org,tglx@linutronix.de,bp@alien8.de,joro@8bytes.org,luto@kernel.org,peterz@infradead.org,kirill.shutemov@linux.intel.com,rick.p.edgecombe@intel.com,jgross@suse.com,Dave Hansen From: Dave Hansen Date: Mon, 14 Apr 2025 10:32:37 -0700 References: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> In-Reply-To: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> Message-Id: <20250414173237.EC790E95@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen Each mm_struct has its own copy of the page tables. When core mm code makes changes to a copy of the page tables those changes sometimes need to be synchronized with other mms' copies of the page tables. But when this synchronization actually needs to happen is highly architecture and configuration specific. In cases where kernel PMDs are shared across processes (SHARED_KERNEL_PMD) the core mm does not itself need to do that synchronization for kernel PMD changes. The x86 code communicates this by clearing the PGTBL_PMD_MODIFIED bit cleared in those configs to avoid expensive synchronization. The kernel is moving toward never sharing kernel PMDs on 32-bit. Prepare for that and make 32-bit PAE always set PGTBL_PMD_MODIFIED, even if there is no modification to synchronize. This obviously adds some synchronization overhead in cases where the kernel page tables are being changed. Signed-off-by: Dave Hansen --- b/arch/x86/include/asm/pgtable-3level_types.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff -puN arch/x86/include/asm/pgtable-3level_types.h~always-set-ARCH_PAGE_= TABLE_SYNC_MASK arch/x86/include/asm/pgtable-3level_types.h --- a/arch/x86/include/asm/pgtable-3level_types.h~always-set-ARCH_PAGE_TABL= E_SYNC_MASK 2025-04-09 11:49:40.552916845 -0700 +++ b/arch/x86/include/asm/pgtable-3level_types.h 2025-04-09 11:49:40.55591= 6955 -0700 @@ -29,7 +29,7 @@ typedef union { =20 #define SHARED_KERNEL_PMD (!static_cpu_has(X86_FEATURE_PTI)) =20 -#define ARCH_PAGE_TABLE_SYNC_MASK (SHARED_KERNEL_PMD ? 0 : PGTBL_PMD_MODIF= IED) +#define ARCH_PAGE_TABLE_SYNC_MASK PGTBL_PMD_MODIFIED =20 /* * PGDIR_SHIFT determines what a top-level page table entry can map _ From nobody Fri Dec 19 14:21:18 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F66A288C99 for ; Mon, 14 Apr 2025 17:34:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652090; cv=none; b=cKT8atJdSkam1s7twwUmlPsEBF7lafqPewMnUCyHrjYWRKV0/smxVi0X/Nupl6kyDqkNz/03VUtaZa80MLoFBRs1BVr57X14hAAzTVekg6e+QzYTxjbWNTxodIUitcGodIzFesKMS6m6ELGK1PlUVH1lL5vD1WG2se6uJJLfzBU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652090; c=relaxed/simple; bh=c/R0B5dJhQ+dzMw3hACYb8rmDT+jc7mkH4hbqcKSbYw=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=QIeqx2lgiphpD5/wXtxEoo5GI3OjvwesNqs/NaXSDmLeYIN5g7QYbPmatsMnNPKuP87Hkhrth5j/0AME4O82+ld/cDl6xmdHjIn8LqY3EiFIpgX0CqhUog6csO1eSIBUV3UqSrh66bifqF+KPv4NJ0r57dfzjMmoZk3yVvQhOCo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=aCqUzf/8; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="aCqUzf/8" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744652089; x=1776188089; h=subject:to:cc:from:date:references:in-reply-to: message-id; bh=c/R0B5dJhQ+dzMw3hACYb8rmDT+jc7mkH4hbqcKSbYw=; b=aCqUzf/8d68CjFNcsVbhfR90itNn2GnMp2HrxhJktfIcmRMFQEKmD+a6 GfErO1s7UrHmBzpZwvmSG30eOXc73Ulyq/NsFIXDlII+sdiwWiocsqFFB eJ1Na6KXyRI3Nwh6AEZcpiRt5gmj2U2fBRjjlS+DRoB736JyUYcQAYOjl yo5C+1nePhFpUNlXsN7XcM3FkmJ8RXH9aDD3zM1wGdTzIO/YC2liFV9Zy SqVPEEMHykSADjZoXc1iZKYqKYo7UPdNgLxba4nwLG74tUWxTVSnDWvQ1 Kbioep0Ss3Ii0nSRu0L6yf7aq4JjjTZIesMERQpSQwZTbJP/gO5v4442H Q==; X-CSE-ConnectionGUID: im48bCWvSnqmgqi06MiDFw== X-CSE-MsgGUID: Br6whq8FTW22JtK6V40+AA== X-IronPort-AV: E=McAfee;i="6700,10204,11403"; a="49790096" X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="49790096" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Apr 2025 10:34:47 -0700 X-CSE-ConnectionGUID: GDZwcDA/ROKN2kP2RVHt0w== X-CSE-MsgGUID: FQIyVw/jQ9mXvxmqPdPffA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="129645444" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by orviesa009.jf.intel.com with ESMTP; 14 Apr 2025 10:32:39 -0700 Subject: [PATCH 4/8] x86/mm: Simplify PAE PGD sharing macros To: linux-kernel@vger.kernel.org Cc: x86@kernel.org,tglx@linutronix.de,bp@alien8.de,joro@8bytes.org,luto@kernel.org,peterz@infradead.org,kirill.shutemov@linux.intel.com,rick.p.edgecombe@intel.com,jgross@suse.com,Dave Hansen From: Dave Hansen Date: Mon, 14 Apr 2025 10:32:38 -0700 References: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> In-Reply-To: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> Message-Id: <20250414173238.6E3CDA56@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen There are a few too many levels of abstraction here. First, just expand the PREALLOCATED_PMDS macro in place to make it clear that it is only conditional on PTI. Second, MAX_PREALLOCATED_PMDS is only used in one spot for an on-stack allocation. It has a *maximum* value of 4. Do not bother with the macro MAX() magic. Just set it to 4. Signed-off-by: Dave Hansen --- b/arch/x86/mm/pgtable.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff -puN arch/x86/mm/pgtable.c~simplify-PREALLOCATED_PMDS arch/x86/mm/pgta= ble.c --- a/arch/x86/mm/pgtable.c~simplify-PREALLOCATED_PMDS 2025-04-09 11:49:41.= 053935260 -0700 +++ b/arch/x86/mm/pgtable.c 2025-04-09 11:49:41.056935370 -0700 @@ -68,12 +68,6 @@ static inline void pgd_list_del(pgd_t *p list_del(&ptdesc->pt_list); } =20 -#define UNSHARED_PTRS_PER_PGD \ - (SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD) -#define MAX_UNSHARED_PTRS_PER_PGD \ - MAX_T(size_t, KERNEL_PGD_BOUNDARY, PTRS_PER_PGD) - - static void pgd_set_mm(pgd_t *pgd, struct mm_struct *mm) { virt_to_ptdesc(pgd)->pt_mm =3D mm; @@ -132,8 +126,9 @@ static void pgd_dtor(pgd_t *pgd) * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate * and initialize the kernel pmds here. */ -#define PREALLOCATED_PMDS UNSHARED_PTRS_PER_PGD -#define MAX_PREALLOCATED_PMDS MAX_UNSHARED_PTRS_PER_PGD +#define PREALLOCATED_PMDS (static_cpu_has(X86_FEATURE_PTI) ? \ + PTRS_PER_PGD : KERNEL_PGD_BOUNDARY) +#define MAX_PREALLOCATED_PMDS PTRS_PER_PGD =20 /* * We allocate separate PMDs for the kernel part of the user page-table _ From nobody Fri Dec 19 14:21:18 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A3A8328935A for ; Mon, 14 Apr 2025 17:34:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652091; cv=none; b=gvLAmVaY/o00pH4rHXzXj3Ayn+C0gzQkQNopXc1fbnMrSeZ7FHc6//fQL2Ki0ySCao4o2xbSoacUxfs8fSVZoWpIqD7q38omtCzoFQydna54SFrmkwqswUyc+DYwfe0HqegnSWwGJzoqR5EVrJcgXy/pgd3bhegd4f45/CDGGx4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652091; c=relaxed/simple; bh=Un3+wj5D1S77z0dxCSVifN/wQWe6b7DUudcpizb/ugM=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=E9aCT1hgdHPtev++TKJU3LNRTHODT0vWMfBSLekbgHcUpD/d9FPmGuXxY1ewaqsbEG7hXQ1PujPMTlMcS+XsvlDtuWfQY5DY45injSBG4jFPcUjphEHZu7MBzUZFQA+JTJCq1QOv0e5iVtVHn5GupNBG2QJ20rQY5OAZNUj2Bao= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=F5UZc/y8; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="F5UZc/y8" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744652090; x=1776188090; h=subject:to:cc:from:date:references:in-reply-to: message-id; bh=Un3+wj5D1S77z0dxCSVifN/wQWe6b7DUudcpizb/ugM=; b=F5UZc/y8OPxUNYqBBAIjP6FB1lpc6KhuhXB19Ri5+UF6KTgVINJ7URUd pwBOsnwymD4AAjmueVu4YcAkEbqOc4JzXxM0p0Gd+QEuQVXhBNjL8TT8l OCUUGajwQNkockZ9Ne6r6OWgyucCzJMiOca9WLliQ0PPaBnhs77ecLGKg aydsg05De/XfN+gHK9qcH283L1l1plmxrK7Tep92vffRUrIzd2LG1eLvm lkEzokGdUCGFynJbrsO076oETFq6drlKpkkm/j7QcM4qSyewmV8Xm4X52 7Uo1eZMmYqVr70r6frWu3vi7OwNDW6mT0wCH3xCW6QnYuC10fzKiLM4H8 A==; X-CSE-ConnectionGUID: SInC6PL9TrCnEafWLZlR9Q== X-CSE-MsgGUID: VMpwV8CHQp2I7w5tob/Dig== X-IronPort-AV: E=McAfee;i="6700,10204,11403"; a="49790104" X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="49790104" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Apr 2025 10:34:47 -0700 X-CSE-ConnectionGUID: u+brq7jNRqitUShuJJHwKA== X-CSE-MsgGUID: juDwK0wBSOKEBjl3fNR/4A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="129645446" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by orviesa009.jf.intel.com with ESMTP; 14 Apr 2025 10:32:41 -0700 Subject: [PATCH 5/8] x86/mm: Fix up comments around PMD preallocation To: linux-kernel@vger.kernel.org Cc: x86@kernel.org,tglx@linutronix.de,bp@alien8.de,joro@8bytes.org,luto@kernel.org,peterz@infradead.org,kirill.shutemov@linux.intel.com,rick.p.edgecombe@intel.com,jgross@suse.com,Dave Hansen From: Dave Hansen Date: Mon, 14 Apr 2025 10:32:40 -0700 References: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> In-Reply-To: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> Message-Id: <20250414173240.5B1AB322@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen The "paravirt environment" is no longer in the tree. Axe that part of the comment. Also add a blurb to remind readers that "USER_PMDS" refer to the PTI user *copy* of the page tables, not the user *portion*. Signed-off-by: Dave Hansen --- b/arch/x86/mm/pgtable.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff -puN arch/x86/mm/pgtable.c~simplify-PREALLOCATED_PMDS-2 arch/x86/mm/pg= table.c --- a/arch/x86/mm/pgtable.c~simplify-PREALLOCATED_PMDS-2 2025-04-09 11:49:4= 1.550953527 -0700 +++ b/arch/x86/mm/pgtable.c 2025-04-09 11:49:41.553953638 -0700 @@ -121,16 +121,17 @@ static void pgd_dtor(pgd_t *pgd) * processor notices the update. Since this is expensive, and * all 4 top-level entries are used almost immediately in a * new process's life, we just pre-populate them here. - * - * Also, if we're in a paravirt environment where the kernel pmd is - * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate - * and initialize the kernel pmds here. */ #define PREALLOCATED_PMDS (static_cpu_has(X86_FEATURE_PTI) ? \ PTRS_PER_PGD : KERNEL_PGD_BOUNDARY) #define MAX_PREALLOCATED_PMDS PTRS_PER_PGD =20 /* + * "USER_PMDS" are the PMDs for the user copy of the page tables when + * PTI is enabled. They do not exist when PTI is disabled. Note that + * this is distinct from the user _portion_ of the kernel page tables + * which always exists. + * * We allocate separate PMDs for the kernel part of the user page-table * when PTI is enabled. We need them to map the per-process LDT into the * user-space page-table. _ From nobody Fri Dec 19 14:21:18 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3786128A1E8 for ; Mon, 14 Apr 2025 17:34:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652091; cv=none; b=Zd5GR+pfMNgEu2GzVaZIVRLfguPiI7evNQqTDqnRDZ9ou08oYBgqfzVl8t2VE0K26nn5sNlaVigtXzMphv3COmLT9x+UkHoXhWMWg5DoCS8gi6vZYRCvXh3OIo2GzNwRMNzX0g7GKDQWWSuqbifwKHsqI4WWMhHzkJ+VbGcdxZA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652091; c=relaxed/simple; bh=hDx80Z9fQZj/FMDythfysWbbLq8UW8DDMwA0KfNSaVY=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=CDC0mFRC5hSiHCs2EU9P3vat0L1t/Xj35Cq1KDGnhxOqnqSvd9V2AGIaiHagfroBVp42UknLV8hsqVVAK/ef8WIUAamgzB5dC2lPTt9Z0qzT+0D4u5HjASTpvYnyR1mM3CCqFy5lqgGk0D1J03pQsfCIx5mM7NjT/49sr1obs/A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hbcrZajx; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hbcrZajx" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744652090; x=1776188090; h=subject:to:cc:from:date:references:in-reply-to: message-id; bh=hDx80Z9fQZj/FMDythfysWbbLq8UW8DDMwA0KfNSaVY=; b=hbcrZajxPnBY6BVHy9k9JovgRXc2BEnIfKM93RcMymumEFmoh9kGXmDS XZ5Tfny/evTZ4ygO+lJCSPz89jsSxyfr8fsz49tLDWIBKGapzIgmFjU/I LSmjRquN2IPCpnHZy0HvRXSzZh/LNUfbiRtSOLIp9WDs3QfM4NsqTw7kA aK5S3djTpXcrYn4ZgMiCcPoVo15r7NvZMR82PopF1IOf28QSniMeR1mdZ TrZNcYYsURgd/g5sKPhUKkFDJzMdPaArkrRDRn9ipWSJKkZi04cNdvaPM ed0GPxrvXu9pVYdk4pdNKOHnbjcXLp0dbA4hHg3FRRaSis2TzY4/b2XPE Q==; X-CSE-ConnectionGUID: MbywmX/WR/SuRQhcsQXinQ== X-CSE-MsgGUID: h1EuDP18S4W2m0uCWDxYvQ== X-IronPort-AV: E=McAfee;i="6700,10204,11403"; a="49790112" X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="49790112" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Apr 2025 10:34:47 -0700 X-CSE-ConnectionGUID: F+O9tWDQQqWJydC9U1ahtw== X-CSE-MsgGUID: RLrQdS3+Rgycf6/GCSCxzA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="129645448" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by orviesa009.jf.intel.com with ESMTP; 14 Apr 2025 10:32:42 -0700 Subject: [PATCH 6/8] x86/mm: Preallocate all PAE page tables To: linux-kernel@vger.kernel.org Cc: x86@kernel.org,tglx@linutronix.de,bp@alien8.de,joro@8bytes.org,luto@kernel.org,peterz@infradead.org,kirill.shutemov@linux.intel.com,rick.p.edgecombe@intel.com,jgross@suse.com,Dave Hansen From: Dave Hansen Date: Mon, 14 Apr 2025 10:32:41 -0700 References: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> In-Reply-To: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> Message-Id: <20250414173241.1288CAB4@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen Finally, move away from having PAE kernels share any PMDs across processes. This was already the default on PTI kernels which are the common case. Signed-off-by: Dave Hansen --- b/arch/x86/mm/pgtable.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff -puN arch/x86/mm/pgtable.c~simplify-PREALLOCATED_PMDS-3 arch/x86/mm/pg= table.c --- a/arch/x86/mm/pgtable.c~simplify-PREALLOCATED_PMDS-3 2025-04-09 11:49:4= 2.035971354 -0700 +++ b/arch/x86/mm/pgtable.c 2025-04-09 11:49:42.038971465 -0700 @@ -80,16 +80,11 @@ struct mm_struct *pgd_page_get_mm(struct =20 static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd) { - /* If the pgd points to a shared pagetable level (either the - ptes in non-PAE, or shared PMD in PAE), then just copy the - references from swapper_pg_dir. */ - if (CONFIG_PGTABLE_LEVELS =3D=3D 2 || - (CONFIG_PGTABLE_LEVELS =3D=3D 3 && SHARED_KERNEL_PMD) || - CONFIG_PGTABLE_LEVELS >=3D 4) { + /* PAE preallocates all its PMDs. No cloning needed. */ + if (!IS_ENABLED(CONFIG_X86_PAE)) clone_pgd_range(pgd + KERNEL_PGD_BOUNDARY, swapper_pg_dir + KERNEL_PGD_BOUNDARY, KERNEL_PGD_PTRS); - } =20 /* List used to sync kernel mapping updates */ pgd_set_mm(pgd, mm); @@ -122,8 +117,7 @@ static void pgd_dtor(pgd_t *pgd) * all 4 top-level entries are used almost immediately in a * new process's life, we just pre-populate them here. */ -#define PREALLOCATED_PMDS (static_cpu_has(X86_FEATURE_PTI) ? \ - PTRS_PER_PGD : KERNEL_PGD_BOUNDARY) +#define PREALLOCATED_PMDS PTRS_PER_PGD #define MAX_PREALLOCATED_PMDS PTRS_PER_PGD =20 /* _ From nobody Fri Dec 19 14:21:18 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C484528A1FB for ; Mon, 14 Apr 2025 17:34:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652093; cv=none; b=LhfpXy/E38G5xGdCeAk9BrZv9bht3PlhOAp/z+3o4ZrZyayNk5Ib+CuAgUA8FS4vlACv4yYzJLfkevTSWUNqxXRzceT8s98Ak20FXo6/sH4Us2tV93s8kHLXAwHtLe/I3AzkJVGdEqmuYvb2CWWmhzxA/V6Vl17n4uqY3u0RXfk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652093; c=relaxed/simple; bh=IYdhxZakHmigCV0vshdrC04wSMfHYqJO6uk9KviS6fY=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=RnKTxaMGe8bJ7X2pU5NnLAas5xVeAYTKRR5Lb9UNRBsfaUzvw2ZsPI+9PPU34S+GXGArGv4PtfWoaF9qjCsFqzLxkrjxomAxK7Nd3WEgnEqXaeQOV0yevbOCSKR48rFFcEaBm2DmfXrWVni7ncDcMBpUHiHfFJJwWpWZFITJwT0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=R1Ck6Wh5; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="R1Ck6Wh5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744652091; x=1776188091; h=subject:to:cc:from:date:references:in-reply-to: message-id; bh=IYdhxZakHmigCV0vshdrC04wSMfHYqJO6uk9KviS6fY=; b=R1Ck6Wh5JWdc8aQRAFS+VixvLjjnvq0v3sVHey2LSVyHxjlsV8pkOhSQ VJ17FNymwmxyzg09lcdlBijO1Wh8A0dIYhZsVy0xTC/o4Yt4UBiE9Y7Vh I1MHEW8F8lSVk18eiV/CVo1m7Oxz+VeLPCR350/Fjug1QNbYGYGRWcdui L24SB4lvDtHeMNciMr1QpiEMKS5cd1XcjLZMIXpbFtbA9XmzEvbJSBSU5 9mmqGYd0PrR73uY2rzJh9sfQL9EBtqJse1MqlJL5WGSNhyegXYBNMWDP4 DHd/bi/25zC9YpWVYxa1xawmQa1azwpgoEE5C1ys3jZekLDQo9tforli0 w==; X-CSE-ConnectionGUID: 8ThXy/1GSzmpekShgq6WGw== X-CSE-MsgGUID: l83eV4f+R3y4RIbcTZGfkg== X-IronPort-AV: E=McAfee;i="6700,10204,11403"; a="49790119" X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="49790119" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Apr 2025 10:34:47 -0700 X-CSE-ConnectionGUID: q14wDk67SF+d3ZnsIBK9dQ== X-CSE-MsgGUID: tg+m3yuMQdeBaWytmdsgiw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="129645450" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by orviesa009.jf.intel.com with ESMTP; 14 Apr 2025 10:32:44 -0700 Subject: [PATCH 7/8] x86/mm: Remove duplicated PMD preallocation macro To: linux-kernel@vger.kernel.org Cc: x86@kernel.org,tglx@linutronix.de,bp@alien8.de,joro@8bytes.org,luto@kernel.org,peterz@infradead.org,kirill.shutemov@linux.intel.com,rick.p.edgecombe@intel.com,jgross@suse.com,Dave Hansen From: Dave Hansen Date: Mon, 14 Apr 2025 10:32:42 -0700 References: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> In-Reply-To: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> Message-Id: <20250414173242.5ED13A5B@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen MAX_PREALLOCATED_PMDS and PREALLOCATED_PMDS are now identical. Just use PREALLOCATED_PMDS and remove "MAX". Signed-off-by: Dave Hansen --- b/arch/x86/mm/pgtable.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff -puN arch/x86/mm/pgtable.c~simplify-PREALLOCATED_PMDS-4 arch/x86/mm/pg= table.c --- a/arch/x86/mm/pgtable.c~simplify-PREALLOCATED_PMDS-4 2025-04-09 11:49:4= 2.535989732 -0700 +++ b/arch/x86/mm/pgtable.c 2025-04-09 11:49:42.538989843 -0700 @@ -118,7 +118,6 @@ static void pgd_dtor(pgd_t *pgd) * new process's life, we just pre-populate them here. */ #define PREALLOCATED_PMDS PTRS_PER_PGD -#define MAX_PREALLOCATED_PMDS PTRS_PER_PGD =20 /* * "USER_PMDS" are the PMDs for the user copy of the page tables when @@ -154,7 +153,6 @@ void pud_populate(struct mm_struct *mm, =20 /* No need to prepopulate any pagetable entries in non-PAE modes. */ #define PREALLOCATED_PMDS 0 -#define MAX_PREALLOCATED_PMDS 0 #define PREALLOCATED_USER_PMDS 0 #define MAX_PREALLOCATED_USER_PMDS 0 #endif /* CONFIG_X86_PAE */ @@ -324,7 +322,7 @@ pgd_t *pgd_alloc(struct mm_struct *mm) { pgd_t *pgd; pmd_t *u_pmds[MAX_PREALLOCATED_USER_PMDS]; - pmd_t *pmds[MAX_PREALLOCATED_PMDS]; + pmd_t *pmds[PREALLOCATED_PMDS]; =20 pgd =3D _pgd_alloc(mm); =20 _ From nobody Fri Dec 19 14:21:18 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2CD0A28B4EC for ; Mon, 14 Apr 2025 17:34:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652092; cv=none; b=Qt6ufH0KH8zyj5RJIQ2KMljf3rsEaXZ5/vYJ/9s0M4qrnYFljozrhGYPdVvkv9NZDgWIXiCy4E1JTLdNL6XlqQDBzkKE1IqV/iGegGEcoHulh11lGRhv6NfmFu0adL6e2nS1SnMM8LBtzTG+Jb8/Pi9MyZY/xV4dG6Zqyb5bYYs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744652092; c=relaxed/simple; bh=mk1Mq0ofVM7HE6S6MWX6+7XVF/6EEmeqJgKCfJ87db4=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=pO24IAOgAXfZPj5JLpbeObfRiDDGnobtKHTIbF5ULG20jhUdIs/U31iyb9NJl014sXW+D9xymBvqwEiKur67BK9478pt/mIvUdnLZFmvb3ILAyV19JOtYW9ZZRP4+41PwLf9j3VdoVREGoNaMWewjkdBTzYAAg1AUYH/vR+MduQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Te9tmFv9; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Te9tmFv9" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744652091; x=1776188091; h=subject:to:cc:from:date:references:in-reply-to: message-id; bh=mk1Mq0ofVM7HE6S6MWX6+7XVF/6EEmeqJgKCfJ87db4=; b=Te9tmFv9J9acp5+fw6rGV35maBd1pZeNQFKBk4+x+bukwbHEes/aqnJB AuNUiM2BtUT7/ZHVGm8DKDjsQhwm+oWOA08PeTu5OxIppjHgofOVfGbGg HnMYCnProZjx6XC1uBFnxgGxnCrGB7Z1v9uiGh38rlBA6SkzbDlYOtvId Ie6mj7iIX3uQZnpR28aAzyj+2BP9/fyKZkGyChw6duOpbkaAmRfHYeEwG e4pYwhUhhRXKnrWyDRdyPcdR55LCXXSUyuS7A8YpaLYufW7y9C+04uoOW +9CfTyJ05APPVUw5CwVmTpbj6ib39th91eNg512rux+S18jKMUGJYpLL0 w==; X-CSE-ConnectionGUID: 4FAdvhKGSRilwzWb93hBmA== X-CSE-MsgGUID: yi5OAUoCQ36dsKJG8bvsdg== X-IronPort-AV: E=McAfee;i="6700,10204,11403"; a="49790128" X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="49790128" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Apr 2025 10:34:47 -0700 X-CSE-ConnectionGUID: iG5++4IuSuuziz6rHLTI6w== X-CSE-MsgGUID: sYHMZJSzQWCAqk2qXGLUlA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,212,1739865600"; d="scan'208";a="129645457" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by orviesa009.jf.intel.com with ESMTP; 14 Apr 2025 10:32:45 -0700 Subject: [PATCH 8/8] x86/mm: Remove now unused SHARED_KERNEL_PMD To: linux-kernel@vger.kernel.org Cc: x86@kernel.org,tglx@linutronix.de,bp@alien8.de,joro@8bytes.org,luto@kernel.org,peterz@infradead.org,kirill.shutemov@linux.intel.com,rick.p.edgecombe@intel.com,jgross@suse.com,Dave Hansen From: Dave Hansen Date: Mon, 14 Apr 2025 10:32:44 -0700 References: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> In-Reply-To: <20250414173232.32444FF6@davehans-spike.ostc.intel.com> Message-Id: <20250414173244.1125BEC3@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen All the users of SHARED_KERNEL_PMD are gone. Zap it. Signed-off-by: Dave Hansen --- b/arch/x86/include/asm/pgtable-2level_types.h | 2 -- b/arch/x86/include/asm/pgtable-3level_types.h | 2 -- b/arch/x86/include/asm/pgtable_64_types.h | 2 -- 3 files changed, 6 deletions(-) diff -puN arch/x86/include/asm/pgtable-2level_types.h~zap-SHARED_KERNEL_PMD= arch/x86/include/asm/pgtable-2level_types.h --- a/arch/x86/include/asm/pgtable-2level_types.h~zap-SHARED_KERNEL_PMD 202= 5-04-14 09:00:36.905759325 -0700 +++ b/arch/x86/include/asm/pgtable-2level_types.h 2025-04-14 09:00:36.91275= 9582 -0700 @@ -18,8 +18,6 @@ typedef union { } pte_t; #endif /* !__ASSEMBLER__ */ =20 -#define SHARED_KERNEL_PMD 0 - #define ARCH_PAGE_TABLE_SYNC_MASK PGTBL_PMD_MODIFIED =20 /* diff -puN arch/x86/include/asm/pgtable-3level_types.h~zap-SHARED_KERNEL_PMD= arch/x86/include/asm/pgtable-3level_types.h --- a/arch/x86/include/asm/pgtable-3level_types.h~zap-SHARED_KERNEL_PMD 202= 5-04-14 09:00:36.908759435 -0700 +++ b/arch/x86/include/asm/pgtable-3level_types.h 2025-04-14 09:00:36.91375= 9618 -0700 @@ -27,8 +27,6 @@ typedef union { } pmd_t; #endif /* !__ASSEMBLER__ */ =20 -#define SHARED_KERNEL_PMD (!static_cpu_has(X86_FEATURE_PTI)) - #define ARCH_PAGE_TABLE_SYNC_MASK PGTBL_PMD_MODIFIED =20 /* diff -puN arch/x86/include/asm/pgtable_64_types.h~zap-SHARED_KERNEL_PMD arc= h/x86/include/asm/pgtable_64_types.h --- a/arch/x86/include/asm/pgtable_64_types.h~zap-SHARED_KERNEL_PMD 2025-04= -14 09:00:36.910759508 -0700 +++ b/arch/x86/include/asm/pgtable_64_types.h 2025-04-14 09:00:36.913759618= -0700 @@ -46,8 +46,6 @@ extern unsigned int ptrs_per_p4d; =20 #endif /* !__ASSEMBLER__ */ =20 -#define SHARED_KERNEL_PMD 0 - #ifdef CONFIG_X86_5LEVEL =20 /* _