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([2001:8a0:e602:d900:68a4:1b76:fda:f9fe]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39eae96bf97sm10703259f8f.25.2025.04.14.05.39.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Apr 2025 05:39:08 -0700 (PDT) From: Vitor Soares To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Daniel Baluta Cc: Vitor Soares , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ivitro@gmail.com, Conor Dooley Subject: [PATCH v2 1/2] dt-bindings: arm: fsl: add Toradex SMARC iMX8MP SoM and carrier Date: Mon, 14 Apr 2025 13:38:26 +0100 Message-Id: <20250414123827.428339-2-ivitro@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250414123827.428339-1-ivitro@gmail.com> References: <20250414123827.428339-1-ivitro@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Vitor Soares Add DT compatible strings for Toradex SMARC iMX8MP SoM and Toradex SMARC Development carrier board. Link: https://www.toradex.com/computer-on-modules/smarc-arm-family/nxp-imx-= 8m-plus Link: https://www.toradex.com/products/carrier-board/smarc-development-boar= d-kit Acked-by: Conor Dooley Signed-off-by: Vitor Soares Reviewed-by: Daniel Baluta --- v1 -> v2: - Add Acked-by from Conor Dooley Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 1b90870958a2..daba8ba8c95f 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1176,6 +1176,12 @@ properties: - const: polyhex,imx8mp-debix-som-a # Polyhex Debix SOM A - const: fsl,imx8mp =20 + - description: Toradex Boards with SMARC iMX8M Plus Modules + items: + - const: toradex,smarc-imx8mp-dev # Toradex SMARC iMX8M Plus on = Toradex SMARC Development Board + - const: toradex,smarc-imx8mp # Toradex SMARC iMX8M Plus Mod= ule + - const: fsl,imx8mp + - description: Toradex Boards with Verdin iMX8M Plus Modules items: - enum: --=20 2.34.1 From nobody Sat Feb 7 16:05:51 2026 Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 39EFA2BEC4C; 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([2001:8a0:e602:d900:68a4:1b76:fda:f9fe]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39eae96bf97sm10703259f8f.25.2025.04.14.05.39.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Apr 2025 05:39:10 -0700 (PDT) From: Vitor Soares To: Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daniel Baluta Cc: Vitor Soares , imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ivitro@gmail.com, Hiago De Franco Subject: [PATCH v2 2/2] arm64: dts: freescale: add Toradex SMARC iMX8MP Date: Mon, 14 Apr 2025 13:38:27 +0100 Message-Id: <20250414123827.428339-3-ivitro@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250414123827.428339-1-ivitro@gmail.com> References: <20250414123827.428339-1-ivitro@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Vitor Soares Add DT support for Toradex SMARC iMX8MP SoM and Toradex SMARC Development carrier board. Link: https://www.toradex.com/computer-on-modules/smarc-arm-family/nxp-imx-= 8m-plus Link: https://www.toradex.com/products/carrier-board/smarc-development-boar= d-kit Co-developed-by: Hiago De Franco Signed-off-by: Hiago De Franco Signed-off-by: Vitor Soares Reviewed-by: Daniel Baluta --- v1 -> v2: - Move Makefile rule to the proper place. (Daniel Baluta) - Remove the dsp_reserved node, it is already disabled in imx8mp.dtsi arch/arm64/boot/dts/freescale/Makefile | 1 + .../freescale/imx8mp-toradex-smarc-dev.dts | 297 ++++ .../dts/freescale/imx8mp-toradex-smarc.dtsi | 1284 +++++++++++++++++ 3 files changed, 1582 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc-dev.= dts create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index b6d3fe26d621..2114dc7338e6 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -212,6 +212,7 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx8mp-skov-revb-lt6.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mp-skov-revb-mi1010ait-1cp1.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mp-skov-revc-bd500.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mp-skov-revc-tian-g07017.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8mp-toradex-smarc-dev.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mp-tqma8mpql-mba8mpxl.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mp-tqma8mpql-mba8mp-ras314.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mp-var-som-symphony.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc-dev.dts b/a= rch/arm64/boot/dts/freescale/imx8mp-toradex-smarc-dev.dts new file mode 100644 index 000000000000..581f221323b7 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc-dev.dts @@ -0,0 +1,297 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (C) 2025 Toradex */ + +/dts-v1/; + +#include "imx8mp-toradex-smarc.dtsi" + +/ { + model =3D "Toradex SMARC iMX8M Plus on Toradex SMARC Development Board"; + compatible =3D "toradex,smarc-imx8mp-dev", + "toradex,smarc-imx8mp", + "fsl,imx8mp"; + + hdmi-connector { + compatible =3D "hdmi-connector"; + label =3D "J64"; + type =3D "a"; + + port { + native_hdmi_connector_in: endpoint { + remote-endpoint =3D <&hdmi_tx_out>; + }; + }; + }; + + reg_carrier_1p8v: regulator-carrier-1p8v { + compatible =3D "regulator-fixed"; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; + regulator-name =3D "On-carrier 1V8"; + }; + + sound { + compatible =3D "simple-audio-card"; + simple-audio-card,bitclock-master =3D <&codec_dai>; + simple-audio-card,format =3D "i2s"; + simple-audio-card,frame-master =3D <&codec_dai>; + simple-audio-card,mclk-fs =3D <256>; + simple-audio-card,name =3D "tdx-smarc-wm8904"; + simple-audio-card,routing =3D + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "IN2L", "Line In Jack", + "IN2R", "Line In Jack", + "Microphone Jack", "MICBIAS", + "IN1L", "Microphone Jack"; + simple-audio-card,widgets =3D + "Microphone", "Microphone Jack", + "Headphone", "Headphone Jack", + "Line", "Line In Jack"; + + codec_dai: simple-audio-card,codec { + clocks =3D <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>; + sound-dai =3D <&wm8904_1a>; + }; + + simple-audio-card,cpu { + sound-dai =3D <&sai1>; + }; + }; +}; + +&aud2htx { + status =3D "okay"; +}; + +/* SMARC SPI0 */ +&ecspi1 { + status =3D "okay"; +}; + +/* SMARC GBE0 */ +&eqos { + status =3D "okay"; +}; + +/* SMARC GBE1 */ +&fec { + status =3D "okay"; +}; + +/* SMARC CAN1 */ +&flexcan1 { + status =3D "okay"; +}; + +/* SMARC CAN0 */ +&flexcan2 { + status =3D "okay"; +}; + +&gpio1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio7>, + <&pinctrl_gpio8>, + <&pinctrl_gpio9>, + <&pinctrl_gpio10>, + <&pinctrl_gpio11>, + <&pinctrl_gpio12>, + <&pinctrl_gpio13>; +}; + +&gpio3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lvds_dsi_sel>; +}; + +&gpio4 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio4>, <&pinctrl_gpio6>; +}; + +&hdmi_pvi { + status =3D "okay"; +}; + +/* SMARC HDMI */ +&hdmi_tx { + status =3D "okay"; + + ports { + port@1 { + hdmi_tx_out: endpoint { + remote-endpoint =3D <&native_hdmi_connector_in>; + }; + }; + }; +}; + +&hdmi_tx_phy { + status =3D "okay"; +}; + +/* SMARC I2C_LCD */ +&i2c2 { + status =3D "okay"; + + i2c-mux@70 { + compatible =3D "nxp,pca9543"; + reg =3D <0x70>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* I2C on DSI Connector Pins 4/6 */ + i2c_dsi_0: i2c@0 { + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + /* I2C on DSI Connector Pins 52/54 */ + i2c_dsi_1: i2c@1 { + reg =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; +}; + +/* SMARC I2C_CAM0 */ +&i2c3 { + status =3D "okay"; +}; + +/* SMARC I2C_GP */ +&i2c4 { + /* Audio Codec */ + wm8904_1a: audio-codec@1a { + compatible =3D "wlf,wm8904"; + reg =3D <0x1a>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_sai1>, <&pinctrl_sai1_mclk>; + #sound-dai-cells =3D <0>; + clocks =3D <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>; + clock-names =3D "mclk"; + AVDD-supply =3D <®_carrier_1p8v>; + CPVDD-supply =3D <®_carrier_1p8v>; + DBVDD-supply =3D <®_carrier_1p8v>; + DCVDD-supply =3D <®_carrier_1p8v>; + MICVDD-supply =3D <®_carrier_1p8v>; + }; + + /* On-Carrier Temperature Sensor */ + temperature-sensor@4f { + compatible =3D "ti,tmp1075"; + reg =3D <0x4f>; + }; + + /* On-Carrier EEPROM */ + eeprom@57 { + compatible =3D "st,24c02", "atmel,24c02"; + reg =3D <0x57>; + pagesize =3D <16>; + }; +}; + +/* SMARC I2C_CAM1 */ +&i2c5 { + status =3D "okay"; +}; + +/* SMARC I2C_PM */ +&i2c6 { + clock-frequency =3D <100000>; + status =3D "okay"; + + /* Fan controller */ + fan@18 { + compatible =3D "ti,amc6821"; + reg =3D <0x18>; + }; + + /* Current measurement into module VDD */ + hwmon@40 { + compatible =3D "ti,ina226"; + reg =3D <0x40>; + shunt-resistor =3D <5000>; + }; +}; + +&lcdif3 { + status =3D "okay"; +}; + +/* SMARC PCIE_A, M2 Key B */ +&pcie { + status =3D "okay"; +}; + +&pcie_phy { + status =3D "okay"; +}; + +/* SMARC LCD1_BKLT_PWM */ +&pwm1 { + status =3D "okay"; +}; + +/* SMARC LCD0_BKLT_PWM */ +&pwm2 { + status =3D "okay"; +}; + +/* SMARC I2S0 */ +&sai1 { + assigned-clocks =3D <&clk IMX8MP_CLK_SAI1>; + assigned-clock-parents =3D <&clk IMX8MP_AUDIO_PLL1_OUT>; + assigned-clock-rates =3D <24576000>; + fsl,sai-mclk-direction-output; + status =3D "okay"; +}; + +/* SMARC HDMI Audio */ +&sound_hdmi { + status =3D "okay"; +}; + +/* SMARC SER0, RS485. Optional M.2 KEY E */ +&uart1 { + linux,rs485-enabled-at-boot-time; + rs485-rts-active-low; + rs485-rx-during-tx; + status =3D "okay"; +}; + +/* SMARC SER2 */ +&uart2 { + status =3D "okay"; +}; + +/* SMARC SER1, used as the Linux Console */ +&uart4 { + status =3D "okay"; +}; + +/* SMARC USB0 */ +&usb3_0 { + status =3D "okay"; +}; + +/* SMARC USB1..4 */ +&usb3_1 { + status =3D "okay"; +}; + +&usb3_phy0 { + status =3D "okay"; +}; + +&usb3_phy1 { + status =3D "okay"; +}; + +/* SMARC SDIO */ +&usdhc2 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi b/arch= /arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi new file mode 100644 index 000000000000..0a8b9eee5ed9 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi @@ -0,0 +1,1284 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (C) 2025 Toradex */ + +#include +#include +#include "imx8mp.dtsi" + +/ { + aliases { + can0 =3D &flexcan2; + can1 =3D &flexcan1; + ethernet0 =3D &eqos; + ethernet1 =3D &fec; + mmc0 =3D &usdhc3; + mmc1 =3D &usdhc2; + mmc2 =3D &usdhc1; + rtc0 =3D &rtc_i2c; + rtc1 =3D &snvs_rtc; + serial0 =3D &uart1; + serial1 =3D &uart4; + serial2 =3D &uart2; + serial3 =3D &uart3; + }; + + chosen { + stdout-path =3D &uart4; + }; + + connector { + compatible =3D "gpio-usb-b-connector", "usb-b-connector"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usb0_id>; + id-gpios =3D <&gpio5 2 GPIO_ACTIVE_HIGH>; + label =3D "USB0"; + self-powered; + type =3D "micro"; + vbus-supply =3D <®_usb0_vbus>; + + port { + usb_dr_connector: endpoint { + remote-endpoint =3D <&usb3_0_dwc>; + }; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_sleep>; + + smarc_key_sleep: key-sleep { + gpios =3D <&gpio3 1 GPIO_ACTIVE_LOW>; + label =3D "SMARC_SLEEP#"; + wakeup-source; + linux,code =3D ; + }; + }; + + reg_usb0_vbus: regulator-usb0-vbus { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usb0_en_oc>; + gpios =3D <&gpio1 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name =3D "USB0_EN_OC#"; + }; + + reg_usb1_vbus: regulator-usb1-vbus { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usb1_en_oc>; + gpios =3D <&gpio1 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name =3D "USB2_EN_OC#"; + }; + + reg_usdhc2_vmmc: regulator-usdhc2-vmmc { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usdhc2_pwr_en>; + gpios =3D <&gpio2 19 GPIO_ACTIVE_HIGH>; + enable-active-high; + off-on-delay-us =3D <100000>; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "3V3_SD"; + startup-delay-us =3D <20000>; + }; + + reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc { + compatible =3D "regulator-gpio"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usdhc2_vsel>; + gpios =3D <&gpio1 4 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <1800000>; + states =3D <1800000 0x1>, + <3300000 0x0>; + regulator-name =3D "PMIC_USDHC_VSELECT"; + vin-supply =3D <®_sd_3v3_1v8>; + }; + + reg_wifi_en: regulator-wifi-en { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_wifi_pwr_en>; + gpios =3D <&gpio3 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "CTRL_EN_WIFI"; + startup-delay-us =3D <2000>; + }; + + reserved-memory { + linux,cma { + size =3D <0 0x20000000>; + alloc-ranges =3D <0 0x40000000 0 0x80000000>; + }; + }; + + sound_hdmi: sound-hdmi { + compatible =3D "fsl,imx-audio-hdmi"; + model =3D "audio-hdmi"; + audio-cpu =3D <&aud2htx>; + hdmi-out; + status =3D "disabled"; + }; +}; + +&A53_0 { + cpu-supply =3D <®_vdd_arm>; +}; + +&A53_1 { + cpu-supply =3D <®_vdd_arm>; +}; + +&A53_2 { + cpu-supply =3D <®_vdd_arm>; +}; + +&A53_3 { + cpu-supply =3D <®_vdd_arm>; +}; + +/* SMARC SPI0 */ +&ecspi1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_ecspi1>; + cs-gpios =3D <&gpio5 9 GPIO_ACTIVE_LOW>, <&gpio4 28 GPIO_ACTIVE_LOW>; +}; + +/* SMARC SPI1 */ +&ecspi2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_ecspi2>, <&pinctrl_tpm_cs>; + cs-gpios =3D <&gpio5 13 GPIO_ACTIVE_LOW>, + <&gpio4 3 GPIO_ACTIVE_LOW>, + <&gpio3 6 GPIO_ACTIVE_LOW>; + status =3D "okay"; + + tpm@2 { + compatible =3D "infineon,slb9670", "tcg,tpm_tis-spi"; + reg =3D <2>; + spi-max-frequency =3D <18500000>; + }; +}; + +/* SMARC GBE0 */ +&eqos { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_eqos>, + <&pinctrl_eth_mdio>, + <&pinctrl_eqos_1588_event>; + phy-handle =3D <&eqos_phy>; + phy-mode =3D "rgmii-id"; + snps,force_thresh_dma_mode; + snps,mtl-rx-config =3D <&mtl_rx_setup>; + snps,mtl-tx-config =3D <&mtl_tx_setup>; + + mdio: mdio { + compatible =3D "snps,dwmac-mdio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use =3D <5>; + + queue0 { + snps,dcb-algorithm; + snps,priority =3D <0x1>; + snps,map-to-dma-channel =3D <0>; + }; + + queue1 { + snps,dcb-algorithm; + snps,priority =3D <0x2>; + snps,map-to-dma-channel =3D <1>; + }; + + queue2 { + snps,dcb-algorithm; + snps,priority =3D <0x4>; + snps,map-to-dma-channel =3D <2>; + }; + + queue3 { + snps,dcb-algorithm; + snps,priority =3D <0x8>; + snps,map-to-dma-channel =3D <3>; + }; + + queue4 { + snps,dcb-algorithm; + snps,priority =3D <0xf0>; + snps,map-to-dma-channel =3D <4>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use =3D <5>; + + queue0 { + snps,dcb-algorithm; + snps,priority =3D <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,priority =3D <0x2>; + }; + + queue2 { + snps,dcb-algorithm; + snps,priority =3D <0x4>; + }; + + queue3 { + snps,dcb-algorithm; + snps,priority =3D <0x8>; + }; + + queue4 { + snps,dcb-algorithm; + snps,priority =3D <0xf0>; + }; + }; +}; + +/* SMARC GBE1 */ +&fec { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_fec>, <&pinctrl_fec_1588_event>; + phy-handle =3D <&fec_phy>; + phy-mode =3D "rgmii-id"; + fsl,magic-packet; +}; + +/* SMARC CAN1 */ +&flexcan1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_flexcan1>; +}; + +/* SMARC CAN0 */ +&flexcan2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_flexcan2>; +}; + +&gpio1 { + gpio-line-names =3D "SMARC_GPIO7", /* 0 */ + "SMARC_GPIO8", + "", + "PMIC_INT#", + "PMIC_USDHC_VSELECT", + "SMARC_GPIO9", + "SMARC_GPIO10", + "SMARC_GPIO11", + "SMARC_GPIO12", + "", + "SMARC_GPIO5", /* 10 */ + "", + "SMARC_USB0_EN_OC#", + "SMARC_GPIO13", + "SMARC_USB2_EN_OC#"; +}; + +&gpio2 { + gpio-line-names =3D "", /* 0 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 10 */ + "", + "SMARC_SDIO_CD#", + "", + "", + "", + "", + "", + "", + "SMARC_SDIO_PWR_EN", + "SMARC_SDIO_WP"; /* 20 */ +}; + +&gpio3 { + gpio-line-names =3D "ETH_0_INT#", /* 0 */ + "SLEEP#", + "", + "", + "", + "", + "TPM_CS#", + "LVDS_DSI_SEL", + "MCU_INT#", + "GPIO_EX_INT#", + "", /* 10 */ + "", + "", + "", + "", + "", + "SMARC_SMB_ALERT#", + "", + "", + "", + "SMARC_I2C_PM_DAT", /* 20 */ + "", + "", + "", + "", + "", + "", + "", + "SMARC_I2C_PM_CK"; + + lvds_dsi_mux_hog: lvds-dsi-mux-hog { + gpio-hog; + gpios =3D <7 GPIO_ACTIVE_HIGH>; + line-name =3D "LVDS_DSI_SEL"; + /* LVDS_DSI_SEL as DSI */ + output-low; + }; +}; + +&gpio4 { + gpio-line-names =3D "SMARC_PCIE_WAKE#", /* 0 */ + "", + "", + "SMARC_SPI1_CS1#", + "", + "", + "", + "", + "", + "", + "", /* 10 */ + "", + "", + "", + "", + "", + "", + "", + "SMARC_GPIO4", + "SMARC_PCIE_A_RST#", + "", /* 20 */ + "", + "", + "", + "", + "", + "", + "", + "SMARC_SPI0_CS1#", + "SMARC_GPIO6"; +}; + +&gpio5 { + gpio-line-names =3D "", /* 0 */ + "", + "SMARC_USB0_OTG_ID", + "SMARC_I2C_CAM1_CK", + "SMARC_I2C_CAM1_DAT", + "", + "", + "", + "", + "SMARC_SPI0_CS0#", + "", /* 10 */ + "", + "", + "SMARC_SPI1_CS0#", + "CTRL_I2C_SCL", + "CTRL_I2C_SDA", + "SMARC_I2C_LCD_CK", + "SMARC_I2C_LCD_DAT", + "SMARC_I2C_CAM0_CK", + "SMARC_I2C_CAM0_DAT", + "SMARC_I2C_GP_CK", /* 20 */ + "SMARC_I2C_GP_DAT"; +}; + +/* SMARC HDMI */ +&hdmi_tx { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_hdmi>; +}; + +/* On-module I2C */ +&i2c1 { + pinctrl-names =3D "default", "gpio"; + pinctrl-0 =3D <&pinctrl_i2c1>; + pinctrl-1 =3D <&pinctrl_i2c1_gpio>; + clock-frequency =3D <400000>; + scl-gpios =3D <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + single-master; + status =3D "okay"; + + som_gpio_expander: gpio-expander@21 { + compatible =3D "nxp,pcal6408"; + reg =3D <0x21>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pcal6408>; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupt-parent =3D <&gpio3>; + interrupts =3D <9 IRQ_TYPE_LEVEL_LOW>; + #gpio-cells =3D <2>; + gpio-controller; + gpio-line-names =3D + "SMARC_GPIO0", + "SMARC_GPIO1", + "SMARC_GPIO2", + "SMARC_GPIO3", + "SMARC_LCD0_VDD_EN", + "SMARC_LCD0_BKLT_EN", + "SMARC_LCD1_VDD_EN", + "SMARC_LCD1_BKLT_EN"; + }; + + pca9450: pmic@25 { + compatible =3D "nxp,pca9450c"; + reg =3D <0x25>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pmic>; + interrupt-parent =3D <&gpio1>; + interrupts =3D <3 IRQ_TYPE_LEVEL_LOW>; + + regulators { + BUCK1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1000000>; + regulator-min-microvolt =3D <805000>; + regulator-name =3D "+VDD_SOC (PMIC BUCK1)"; + regulator-ramp-delay =3D <3125>; + }; + + reg_vdd_arm: BUCK2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1000000>; + regulator-min-microvolt =3D <805000>; + regulator-name =3D "+VDD_ARM (PMIC BUCK2)"; + regulator-ramp-delay =3D <3125>; + nxp,dvs-run-voltage =3D <950000>; + nxp,dvs-standby-voltage =3D <850000>; + }; + + reg_3v3: BUCK4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "+V3.3 (PMIC BUCK4)"; + }; + + reg_1v8: BUCK5 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; + regulator-name =3D "+V1.8 (PMIC BUCK5)"; + }; + + BUCK6 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1155000>; + regulator-min-microvolt =3D <1045000>; + regulator-name =3D "+VDD_DDR (PMIC BUCK6)"; + }; + + LDO1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1950000>; + regulator-min-microvolt =3D <1710000>; + regulator-name =3D "+V1.8_SNVS (PMIC LDO1)"; + }; + + LDO3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; + regulator-name =3D "+V1.8A (PMIC LDO3)"; + }; + + LDO4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "+V3.3_ADC (PMIC LDO4)"; + }; + + reg_sd_3v3_1v8: LDO5 { + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <1800000>; + regulator-name =3D "+V3.3_1.8_SD (PMIC LDO5)"; + }; + }; + }; + + rtc_i2c: rtc@32 { + compatible =3D "epson,rx8130"; + reg =3D <0x32>; + }; + + temperature-sensor@48 { + compatible =3D "ti,tmp1075"; + reg =3D <0x48>; + }; + + eeprom@50 { + compatible =3D "st,24c02", "atmel,24c02"; + reg =3D <0x50>; + pagesize =3D <16>; + }; +}; + +/* SMARC I2C_LCD */ +&i2c2 { + pinctrl-names =3D "default", "gpio"; + pinctrl-0 =3D <&pinctrl_i2c2>; + pinctrl-1 =3D <&pinctrl_i2c2_gpio>; + clock-frequency =3D <100000>; + scl-gpios =3D <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + single-master; +}; + +/* SMARC I2C_CAM0 */ +&i2c3 { + pinctrl-names =3D "default", "gpio"; + pinctrl-0 =3D <&pinctrl_i2c3>; + pinctrl-1 =3D <&pinctrl_i2c3_gpio>; + clock-frequency =3D <400000>; + scl-gpios =3D <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + single-master; +}; + +/* SMARC I2C_GP */ +&i2c4 { + pinctrl-names =3D "default", "gpio"; + pinctrl-0 =3D <&pinctrl_i2c4>; + pinctrl-1 =3D <&pinctrl_i2c4_gpio>; + clock-frequency =3D <400000>; + scl-gpios =3D <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + single-master; + status =3D "okay"; + + eeprom@50 { + compatible =3D "st,24c32", "atmel,24c32"; + reg =3D <0x50>; + pagesize =3D <32>; + }; +}; + +/* SMARC I2C_CAM1 */ +&i2c5 { + pinctrl-names =3D "default", "gpio"; + pinctrl-0 =3D <&pinctrl_i2c5>; + pinctrl-1 =3D <&pinctrl_i2c5_gpio>; + clock-frequency =3D <400000>; + scl-gpios =3D <&gpio5 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio5 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + single-master; +}; + +/* SMARC I2C_PM */ +&i2c6 { + pinctrl-names =3D "default", "gpio"; + pinctrl-0 =3D <&pinctrl_i2c6>; + pinctrl-1 =3D <&pinctrl_i2c6_gpio>; + clock-frequency =3D <400000>; + scl-gpios =3D <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio3 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + single-master; +}; + +&mdio { + eqos_phy: ethernet-phy@1 { + reg =3D <1>; + interrupt-parent =3D <&gpio3>; + interrupts =3D <0 IRQ_TYPE_LEVEL_LOW>; + ti,rx-internal-delay =3D ; + ti,tx-internal-delay =3D ; + }; + + fec_phy: ethernet-phy@2 { + reg =3D <2>; + interrupt-parent =3D <&gpio3>; + interrupts =3D <0 IRQ_TYPE_LEVEL_LOW>; + ti,rx-internal-delay =3D ; + ti,tx-internal-delay =3D ; + }; +}; + +/* SMARC PCIE_A */ +&pcie { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pcie>; + reset-gpios =3D <&gpio4 19 GPIO_ACTIVE_LOW>; +}; + +&pcie_phy { + clocks =3D <&hsio_blk_ctrl>; + clock-names =3D "ref"; + fsl,clkreq-unsupported; + fsl,refclk-pad-mode =3D ; +}; + +/* SMARC LCD1_BKLT_PWM */ +&pwm1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lcd1_bklt_pwm1>; +}; + +/* SMARC LCD0_BKLT_PWM */ +&pwm2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lcd0_bklt_pwm2>; +}; + +/* SMARC GPIO5 as PWM */ +&pwm3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio5_pwm>; +}; + +&snvs_pwrkey { + status =3D "okay"; +}; + +/* SMARC SER0 */ +&uart1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_uart1>; + uart-has-rtscts; +}; + +/* SMARC SER2 */ +&uart2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_uart2>; + uart-has-rtscts; +}; + +/* On-module Bluetooth, optional SMARC SER3 */ +&uart3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_bt_uart>; + uart-has-rtscts; + status =3D "okay"; + + som_bt: bluetooth { + compatible =3D "mrvl,88w8997"; + max-speed =3D <921600>; + }; +}; + +/* SMARC SER1, used as the Linux Console */ +&uart4 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_uart4>; +}; + +/* SMARC USB0 */ +&usb3_0 { + fsl,disable-port-power-control; +}; + +/* SMARC USB1..4 */ +&usb3_1 { + fsl,disable-port-power-control; +}; + +&usb3_phy1 { + vbus-supply =3D <®_usb1_vbus>; +}; + +&usb_dwc3_0 { + adp-disable; + dr_mode =3D "otg"; + hnp-disable; + maximum-speed =3D "high-speed"; + srp-disable; + usb-role-switch; + + port { + usb3_0_dwc: endpoint { + remote-endpoint =3D <&usb_dr_connector>; + }; + }; +}; + +&usb_dwc3_1 { + dr_mode =3D "host"; +}; + +/* On-module Wi-Fi */ +&usdhc1 { + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + pinctrl-0 =3D <&pinctrl_usdhc1>; + pinctrl-1 =3D <&pinctrl_usdhc1_100mhz>; + pinctrl-2 =3D <&pinctrl_usdhc1_200mhz>; + keep-power-in-suspend; + non-removable; + vmmc-supply =3D <®_wifi_en>; + status =3D "okay"; +}; + +/* SMARC SDIO */ +&usdhc2 { + pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; + pinctrl-0 =3D <&pinctrl_usdhc2>, + <&pinctrl_usdhc2_cd>, + <&pinctrl_usdhc2_wp>; + pinctrl-1 =3D <&pinctrl_usdhc2_100mhz>, + <&pinctrl_usdhc2_cd>, + <&pinctrl_usdhc2_wp>; + pinctrl-2 =3D <&pinctrl_usdhc2_200mhz>, + <&pinctrl_usdhc2_cd>, + <&pinctrl_usdhc2_wp>; + pinctrl-3 =3D <&pinctrl_usdhc2_sleep>, + <&pinctrl_usdhc2_cd_sleep>, + <&pinctrl_usdhc2_wp>; + assigned-clocks =3D <&clk IMX8MP_CLK_USDHC2>; + assigned-clock-rates =3D <400000000>; + cd-gpios =3D <&gpio2 12 GPIO_ACTIVE_LOW>; + vmmc-supply =3D <®_usdhc2_vmmc>; + vqmmc-supply =3D <®_usdhc2_vqmmc>; + wp-gpios =3D <&gpio2 20 GPIO_ACTIVE_HIGH>; +}; + +/* On-module eMMC */ +&usdhc3 { + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + pinctrl-0 =3D <&pinctrl_usdhc3>; + pinctrl-1 =3D <&pinctrl_usdhc3_100mhz>; + pinctrl-2 =3D <&pinctrl_usdhc3_200mhz>; + assigned-clocks =3D <&clk IMX8MP_CLK_USDHC3_ROOT>; + assigned-clock-rates =3D <400000000>; + bus-width =3D <8>; + non-removable; + status =3D "okay"; +}; + +&wdog1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_wdog>; + fsl,ext-reset-output; + status =3D "okay"; +}; + +&iomuxc { + /* On-module Bluetooth */ + pinctrl_bt_uart: btuartgrp { + fsl,pins =3D , /* WiFi_UART_= TXD */ + , /* WiFi_UART_RXD */ + , /* WiFi_UART_RTS */ + ; /* WiFi_UART_CTS */ + }; + + /* SMARC CAM_MCK */ + pinctrl_csi_mclk: csimclkgrp { + fsl,pins =3D ; /* SMARC S6 - CA= M_MCK */ + }; + + /* SMARC SPI0 */ + pinctrl_ecspi1: ecspi1grp { + fsl,pins =3D , /* SMARC P45= - SPI0_DIN */ + , /* SMARC P46 - SPI0_D= O */ + , /* SMARC P44 - SPI0_C= K */ + , /* SMARC P43 - SPI0_CS= 0# */ + ; /* SMARC P31 - SPI0_CS1= # */ + }; + + /* SMARC SPI1 */ + pinctrl_ecspi2: ecspi2grp { + fsl,pins =3D , /* SMARC P56= - SPI1_DIN */ + , /* SMARC P57 - SPI1_D= O */ + , /* SMARC P58 - SPI1_C= K */ + , /* SMARC P54 - SPI1_CS= 0# */ + ; /* SMARC P55 - SPI1_CS1= # */ + }; + + /* ETH_0 RGMII (On-module PHY) */ + pinctrl_eqos: eqosgrp { + fsl,pins =3D , /* ETH0= _RGMII_RXD0 */ + , /* ETH0_RGMII_RX= D1 */ + , /* ETH0_RGMII_RX= D2 */ + , /* ETH0_RGMII_RX= D3 */ + , /*= ETH0_RGMII_RXC */ + , /* ETH0_RGM= II_RX_CTL */ + , /* ETH0_RGMII_TX= D0 */ + , /* ETH0_RGMII_TX= D1 */ + , /* ETH0_RGMII_TX= D2 */ + , /* ETH0_RGMII_TX= D3 */ + , /* ETH0_RGM= II_TX_CTL */ + ; /*= ETH0_RGMII_TXC */ + }; + + /* SMARC GBE0_SDP */ + pinctrl_eqos_1588_event: eqos1588eventgrp { + fsl,pins =3D ; /*= SMARC P6 - GBE0_SDP */ + }; + + /* ETH_0_MDIO and ETH_0_INT# shared between ETH_PHY0 and ETH_PHY1 */ + pinctrl_eth_mdio: ethmdiogrp { + fsl,pins =3D , /* ETH_0_MDC */ + , /* ETH_0_MDIO */ + ; /* ETH_0_INT# */ + }; + + /* ETH_1 RGMII (On-module PHY) */ + pinctrl_fec: fecgrp { + fsl,pins =3D , /* ETH1_RGM= II_RXD0 */ + , /* ETH1_RGMII_RXD1 */ + , /* ETH1_RGMII_RXD2 */ + , /* ETH1_RGMII_RXD3 */ + , /* ETH1_RGMII_RXC */ + , /* ETH1_RGMII_RX_= CTL */ + , /* ETH1_RGMII_TXD0 */ + , /* ETH1_RGMII_TXD1 */ + , /* ETH1_RGMII_TXD2 */ + , /* ETH1_RGMII_TXD3 */ + , /* ETH1_RGMII_TX_= CTL */ + ; /* ETH1_RGMII_TXC */ + }; + + /* SMARC GBE1_SDP */ + pinctrl_fec_1588_event: fec1588eventgrp { + fsl,pins =3D ; /* SMAR= C P5 - GBE1_SDP */ + }; + + /* SMARC CAN1 */ + pinctrl_flexcan1: flexcan1grp { + fsl,pins =3D , /* SMARC P146 - CAN= 1_RX */ + ; /* SMARC P145 - CAN1_TX */ + }; + + /* SMARC CAN0 */ + pinctrl_flexcan2: flexcan2grp { + fsl,pins =3D , /* SMARC P144 - CA= N0_RX */ + ; /* SMARC P143 - CAN0_TX */ + }; + + /* SMARC GPIO4 */ + pinctrl_gpio4: gpio4grp { + fsl,pins =3D ; /* SMARC P112 -= GPIO4 */ + }; + + /* SMARC GPIO5 */ + pinctrl_gpio5: gpio5grp { + fsl,pins =3D ; /* SMARC P113 = - GPIO5 */ + }; + + /* SMARC GPIO5 as PWM */ + pinctrl_gpio5_pwm: gpio5pwmgrp { + fsl,pins =3D ; /* SMARC P113 - P= WM_OUT */ + }; + + /* SMARC GPIO6 */ + pinctrl_gpio6: gpio6grp { + fsl,pins =3D ; /* SMARC P114 - = GPIO6 */ + }; + + /* SMARC GPIO7 */ + pinctrl_gpio7: gpio7grp { + fsl,pins =3D ; /* SMARC P115 = - GPIO7 */ + }; + + /* SMARC GPIO8 */ + pinctrl_gpio8: gpio8grp { + fsl,pins =3D ; /* SMARC P116 = - GPIO8 */ + }; + + /* SMARC GPIO9 */ + pinctrl_gpio9: gpio9grp { + fsl,pins =3D ; /* SMARC P117 = - GPIO9 */ + }; + + /* SMARC GPIO10 */ + pinctrl_gpio10: gpio10grp { + fsl,pins =3D ; /* SMARC P118 = - GPIO10 */ + }; + + /* SMARC GPIO11 */ + pinctrl_gpio11: gpio11grp { + fsl,pins =3D ; /* SMARC P119 = - GPIO11 */ + }; + + /* SMARC GPIO12 */ + pinctrl_gpio12: gpio12grp { + fsl,pins =3D ; /* SMARC S142 = - GPIO12 */ + }; + + /* SMARC GPIO13 */ + pinctrl_gpio13: gpio13grp { + fsl,pins =3D ; /* SMARC S123 = - GPIO13 */ + }; + + /* SMARC HDMI */ + pinctrl_hdmi: hdmigrp { + fsl,pins =3D , /= * SMARC P105 - HDMI_CTRL_CK */ + , /* SMARC P= 106 - HDMI_CTRL_DAT */ + ; /* SMARC P104 = - HDMI_HPD */ + }; + + /* On-module I2C */ + pinctrl_i2c1: i2c1grp { + fsl,pins =3D , /* CTRL_I2C_S= CL */ + ; /* CTRL_I2C_SDA */ + }; + + /* On-module I2C as GPIOs */ + pinctrl_i2c1_gpio: i2c1gpiogrp { + fsl,pins =3D , /* CTRL_I2C= _SCL */ + ; /* CTRL_I2C_SDA */ + }; + + /* SMARC I2C_LCD */ + pinctrl_i2c2: i2c2grp { + fsl,pins =3D , /* SMARC S139= - I2C_LCD_CK */ + ; /* SMARC S140 - I2C_LC= D_DAT */ + }; + + /* SMARC I2C_LCD as GPIOs */ + pinctrl_i2c2_gpio: i2c2gpiogrp { + fsl,pins =3D , /* SMARC S1= 39 - I2C_LCD_CK */ + ; /* SMARC S140 - I2C_= LCD_DAT */ + }; + + /* SMARC I2C_CAM0 */ + pinctrl_i2c3: i2c3grp { + fsl,pins =3D , /* SMARC S5 -= I2C_CAM0_CK */ + ; /* SMARC S7 - I2C_CAM0= _DAT */ + }; + + /* SMARC I2C_CAM0 as GPIOs */ + pinctrl_i2c3_gpio: i2c3gpiogrp { + fsl,pins =3D , /* SMARC S5= - I2C_CAM0_CK */ + ; /* SMARC S7 - I2C_CA= M0_DAT */ + }; + + /* SMARC I2C_GP */ + pinctrl_i2c4: i2c4grp { + fsl,pins =3D , /* SMARC S48 = - I2C_GP_CK */ + ; /* SMARC S49 - I2C_GP_= DAT */ + }; + + /* SMARC I2C_GP as GPIOs */ + pinctrl_i2c4_gpio: i2c4gpiogrp { + fsl,pins =3D , /* SMARC S4= 8 - I2C_GP_CK */ + ; /* SMARC S49 - I2C_G= P_DAT */ + }; + + /* SMARC I2C_CAM1 */ + pinctrl_i2c5: i2c5grp { + fsl,pins =3D , /* SMARC S2 -= I2C_CAM1_DAT */ + ; /* SMARC S1 - I2C_CAM1= _CK */ + }; + + /* SMARC I2C_CAM1 as GPIOs */ + pinctrl_i2c5_gpio: i2c5gpiogrp { + fsl,pins =3D , /* SMARC S2= - I2C_CAM1_DAT */ + ; /* SMARC S1 - I2C_CA= M1_CK */ + }; + + /* SMARC I2C_PM */ + pinctrl_i2c6: i2c6grp { + fsl,pins =3D , /* SMARC P121= - I2C_PM_CK */ + ; /* SMARC P122 - I2C_PM= _DAT */ + }; + + /* SMARC I2C_PM as GPIOs */ + pinctrl_i2c6_gpio: i2c6gpiogrp { + fsl,pins =3D , /* SMARC P1= 21 - I2C_PM_CK */ + ; /* SMARC P122 - I2C_= PM_DAT */ + }; + + pinctrl_lvds_dsi_sel: lvdsdsiselgrp { + fsl,pins =3D ; /* LVDS_DSI_S= EL */ + }; + + pinctrl_mcu_int: mcuintgrp { + fsl,pins =3D ; /* MCU_INT# */ + }; + + /* SMARC LCD1_BKLT_PWM */ + pinctrl_lcd1_bklt_pwm1: pwm1grp { + fsl,pins =3D ; /* SMARC S122 = - LCD1_BKLT_PWM */ + }; + + /* SMARC LCD0_BKLT_PWM */ + pinctrl_lcd0_bklt_pwm2: pwm2grp { + fsl,pins =3D ; /* SMARC S141 - L= CD0_BKLT_PWM */ + }; + + /* PCAL6408 Interrupt */ + pinctrl_pcal6408: pcal6408intgrp { + fsl,pins =3D ; /* GPIO_EX_IN= T# */ + }; + + /* SMARC PCIE_A */ + pinctrl_pcie: pciegrp { + fsl,pins =3D , /* SMARC S146 -= PCIE_WAKE# */ + ; /* SMARC P75 - PCIE_A_RS= T# */ + }; + + /* PMIC Interrupt */ + pinctrl_pmic: pmicintgrp { + fsl,pins =3D ; /* PMIC_INT# */ + }; + + /* SMARC I2S0 */ + pinctrl_sai1: sai1grp { + fsl,pins =3D , /* SM= ARC S42 - I2S0_CK */ + , /* SMARC S39 -= I2S0_LRCLK */ + , /* SMARC S41= - I2S0_SDIN */ + ; /* SMARC S40= - I2S0_SDOUT */ + }; + + /* SMARC AUDIO_MCK */ + pinctrl_sai1_mclk: sai1mclkgrp { + fsl,pins =3D ; /* SMARC= S38 - AUDIO_MCK */ + }; + + /* SMARC I2S2 */ + pinctrl_sai3: sai3grp { + fsl,pins =3D , /* S= MARC S52 - I2S2_SDIN */ + , /* SMARC S53 - = I2S2_CK */ + , /* SMARC S51 = - I2S2_SDOUT */ + ; /* SMARC S50 -= I2S2_LRCLK */ + }; + + /* SMARC SLEEP# */ + pinctrl_sleep: sleepgrp { + fsl,pins =3D ; /* SMARC S149 = - SLEEP# */ + }; + + /* SMARC SMB_ALERT# */ + pinctrl_smb_alert: smbalertgrp { + fsl,pins =3D ; /* SMARC P1 = - SMB_ALERT# */ + }; + + /* TPM_CS# */ + pinctrl_tpm_cs: tpmcsgrp { + fsl,pins =3D ; /* TPM_CS# */ + }; + + /* WIFI_BT_WKUP_HOST/TPM_INT# */ + pinctrl_tpm_irq_wifi_bt_wkup: tpmirq-wifibtwkupgrp { + fsl,pins =3D ; /* WIFI_BT_WKUP_= HOST/TPM_INT# */ + }; + + /* SMARC SER0 */ + pinctrl_uart1: uart1grp { + fsl,pins =3D , /* SMARC P13= 2 - SER2_CTS */ + , /* SMARC P131 - SER2_= RTS */ + , /* SMARC P130 - SER2_R= X */ + ; /* SMARC P139 - SER2_T= X */ + }; + + /* SMARC SER2 */ + pinctrl_uart2: uart2grp { + fsl,pins =3D , /* SMARC P13= 9 - SER2_CTS */ + , /* SMARC P138 - SER2_= RTS */ + , /* SMARC P137 - SER2_R= X */ + ; /* SMARC P136 - SER2_T= X */ + }; + + /* SMARC SER3 */ + pinctrl_uart3: uart3grp { + fsl,pins =3D , /* SMARC P141= - SER3_RX */ + ; /* SMARC P140 - SER3_T= X */ + }; + + /* SMARC SER1 */ + pinctrl_uart4: uart4grp { + fsl,pins =3D , /* SMARC P135= - SER1_RX */ + ; /* SMARC P134 - SER1_T= X */ + }; + + /* SMARC USB0_OTG_ID */ + pinctrl_usb0_id: usb0idgrp { + fsl,pins =3D ; /* SMARC P64 - = USB0_OTG_ID */ + }; + + /* SMARC USB0_EN_OC# */ + pinctrl_usb0_en_oc: usb0enocgrp { + fsl,pins =3D ; /* SMARC P62 - = USB0_EN_OC# */ + }; + + /* On module USB Hub VBUS, or SMARC USB2_EN_OC# depending on assembling */ + pinctrl_usb1_en_oc: usb1enocgrp { + fsl,pins =3D ; /* SMARC P71 - = USB2_EN_OC# */ + }; + + /* On-module Wi-Fi */ + pinctrl_usdhc1: usdhc1grp { + fsl,pins =3D , /* WiFi_SDIO_CLK= */ + , /* WiFi_SDIO_CMD */ + , /* WiFi_SDIO_DATA0 */ + , /* WiFi_SDIO_DATA1 */ + , /* WiFi_SDIO_DATA2 */ + ; /* WiFi_SDIO_DATA3 */ + }; + + /* On-module Wi-Fi */ + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins =3D , /* WiFi_SDIO_CLK= */ + , /* WiFi_SDIO_CMD */ + , /* WiFi_SDIO_DATA0 */ + , /* WiFi_SDIO_DATA1 */ + , /* WiFi_SDIO_DATA2 */ + ; /* WiFi_SDIO_DATA3 */ + }; + + /* On-module Wi-Fi */ + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins =3D , /* WiFi_SDIO_CLK= */ + , /* WiFi_SDIO_CMD */ + , /* WiFi_SDIO_DATA0 */ + , /* WiFi_SDIO_DATA1 */ + , /* WiFi_SDIO_DATA2 */ + ; /* WiFi_SDIO_DATA3 */ + }; + + /* SMARC SDIO */ + pinctrl_usdhc2: usdhc2grp { + fsl,pins =3D , /* SMARC P36 - S= DIO_CK */ + , /* SMARC P34 - SDIO_CMD */ + , /* SMARC P39 - SDIO_DO= */ + , /* SMARC P40 - SDIO_D1= */ + , /* SMARC P41 - SDIO_D2= */ + ; /* SMARC P42 - SDIO_D3= */ + }; + + /* SMARC SDIO 100MHz */ + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins =3D , /* SMARC P36 - S= DIO_CK */ + , /* SMARC P34 - SDIO_CMD */ + , /* SMARC P39 - SDIO_DO= */ + , /* SMARC P40 - SDIO_D1= */ + , /* SMARC P41 - SDIO_D2= */ + ; /* SMARC P42 - SDIO_D3= */ + }; + + /* SMARC SDIO 200MHz */ + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins =3D , /* SMARC P36 - S= DIO_CK */ + , /* SMARC P34 - SDIO_CMD */ + , /* SMARC P39 - SDIO_DO= */ + , /* SMARC P40 - SDIO_D1= */ + , /* SMARC P41 - SDIO_D2= */ + ; /* SMARC P42 - SDIO_D3= */ + }; + + /* SMARC SDIO_CD# */ + pinctrl_usdhc2_cd: usdhc2cdgrp { + fsl,pins =3D ; /* SMARC P35 - S= DIO_CD# */ + }; + + /* SMARC SDIO_CD# */ + pinctrl_usdhc2_cd_sleep: usdhc2cdslpgrp { + fsl,pins =3D ; /* SMARC P35 - SDI= O_CD# */ + }; + + /* SMARC SDIO_PWR_EN */ + pinctrl_usdhc2_pwr_en: usdhc2pwrengrp { + fsl,pins =3D ; /* SMARC P37 = - SDIO_PWR_EN */ + }; + + /* SMARC SDIO Sleep - Avoid backfeeding with removed card power */ + pinctrl_usdhc2_sleep: usdhc2slpgrp { + fsl,pins =3D , /* SMARC P36 - S= DIO_CK */ + , /* SMARC P34 - SDIO_CMD */ + , /* SMARC P39 - SDIO_DO= */ + , /* SMARC P39 - SDIO_D1= */ + , /* SMARC P39 - SDIO_D2= */ + ; /* SMARC P39 - SDIO_D3= */ + }; + + pinctrl_usdhc2_vsel: usdhc2vselgrp { + fsl,pins =3D ; /* PMIC_USDHC_VS= ELECT */ + }; + + /* SMARC SDIO_WP */ + pinctrl_usdhc2_wp: usdhc2wpgrp { + fsl,pins =3D ; /* SMARC P33 - SDI= O_WP */ + }; + + /* On-module eMMC */ + pinctrl_usdhc3: usdhc3grp { + fsl,pins =3D , /* eMMC_STR= OBE */ + , /* eMMC_DATA5 */ + , /* eMMC_DATA6 */ + , /* eMMC_DATA7 */ + , /* eMMC_DATA0 */ + , /* eMMC_DATA1 */ + , /* eMMC_DATA2 */ + , /* eMMC_DATA3 */ + , /* eMMC_DATA4 */ + , /* eMMC_CLK */ + ; /* eMMC_CMD */ + }; + + /* On-module eMMC */ + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { + fsl,pins =3D , /* eMMC_STR= OBE */ + , /* eMMC_DATA5 */ + , /* eMMC_DATA6 */ + , /* eMMC_DATA7 */ + , /* eMMC_DATA0 */ + , /* eMMC_DATA1 */ + , /* eMMC_DATA2 */ + , /* eMMC_DATA3 */ + , /* eMMC_DATA4 */ + , /* eMMC_CLK */ + ; /* eMMC_CMD */ + }; + + /* On-module eMMC */ + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { + fsl,pins =3D , /* eMMC_STR= OBE */ + , /* eMMC_DATA5 */ + , /* eMMC_DATA6 */ + , /* eMMC_DATA7 */ + , /* eMMC_DATA0 */ + , /* eMMC_DATA1 */ + , /* eMMC_DATA2 */ + , /* eMMC_DATA3 */ + , /* eMMC_DATA4 */ + , /* eMMC_CLK */ + ; /* eMMC_CMD */ + }; + + /* SoC Watchdog */ + pinctrl_wdog: wdoggrp { + fsl,pins =3D ; /* CTRL_SOC_WD= OG */ + }; + + /* On-module Wi-Fi power enable */ + pinctrl_wifi_pwr_en: wifipwrengrp { + fsl,pins =3D ; /* CTRL_EN_WIFI = */ + }; +}; --=20 2.34.1