From nobody Fri Dec 19 10:56:26 2025 Received: from mxout1.routing.net (mxout1.routing.net [134.0.28.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F14BA4A18; Sun, 13 Apr 2025 09:07:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=134.0.28.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744535235; cv=none; b=bUelXnw9FIPben7O9rvvNgEhYDn+WTCfLwH+MlSdpjpPELsBsHnXytCFO4dKmPCkqwPtoQA6RcF4YBdBvoGvvRfaddQmIH0IKjjqgpsqQ+N5Rfw+I/3O97KAFbOvt5RPX8mywnXUM8c9Q9vEXJiQHrJwdReCjkuyNEcp3jPf44c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744535235; c=relaxed/simple; bh=F74LX8pwmJpUJ1WcbB/uKtET0VL3fvaTNZy443SfgXc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ol2I1n5avJY9p4Knfe1H7hBsuEHIsVvdF2TyvIACq4rCli+OF2JhloEspfkQM5QoA7VUPUC7T8FQJLovNf1abVxTq3sFk5rN5b2NKrT5QGDV83UPuLmgHGJuA/ZjxgCN2xKZVS8VCzrkr8Q4ClOrhQuNr5ChX/T+FABqX3GiCt8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de; spf=pass smtp.mailfrom=fw-web.de; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b=nGFaGpEZ; arc=none smtp.client-ip=134.0.28.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fw-web.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="nGFaGpEZ" Received: from mxbox1.masterlogin.de (unknown [192.168.10.88]) by mxout1.routing.net (Postfix) with ESMTP id CC4AD3FDF4; Sun, 13 Apr 2025 08:58:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1744534693; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PKUZ1+4YVFc7xv72f1Tv2gQXBQdFJKtnqIffuvfuqJg=; b=nGFaGpEZr5p5AvddB7kdYZ+4ZXePpkmtqF3yJ0SJ2t5Rc+yB6CFVV+ZOGxyl0SRDRvdai/ mW/NNHGhXvIO76jk112wzjXh35RLhve+Y+TCU8kC+n0q8J4kY2jbc3RXOjH4KvQUh8qsmT I/87eKRiBMIQzgSG5KhcJtn5TBWDCCo= Received: from frank-u24.. (fttx-pool-194.15.86.153.bambit.de [194.15.86.153]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id EB87140089; Sun, 13 Apr 2025 08:58:11 +0000 (UTC) From: Frank Wunderlich To: Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , Daniel Golle , Sam Shih , MandyJH Liu , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC 1/5] dt-bindings: phy: mtk-xs-phy: Add mt7988 compatible Date: Sun, 13 Apr 2025 10:58:01 +0200 Message-ID: <20250413085806.8544-2-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250413085806.8544-1-linux@fw-web.de> References: <20250413085806.8544-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mail-ID: ce383be7-dddc-4262-94ec-9650b3b27f4f Content-Type: text/plain; charset="utf-8" From: Frank Wunderlich Add compatible for xs-phy on mt7988. Signed-off-by: Frank Wunderlich --- Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Do= cumentation/devicetree/bindings/phy/mediatek,xsphy.yaml index a9e3139fd421..3b5253659e6f 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml @@ -49,6 +49,7 @@ properties: - enum: - mediatek,mt3611-xsphy - mediatek,mt3612-xsphy + - mediatek,mt7988-xsphy - const: mediatek,xsphy =20 reg: --=20 2.43.0 From nobody Fri Dec 19 10:56:26 2025 Received: from mxout4.routing.net (mxout4.routing.net [134.0.28.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A364418DB1E; Sun, 13 Apr 2025 09:08:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=134.0.28.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744535285; cv=none; b=jNWdjYJjylRULunMHeFNlUTz9S5ToVf0Dd0F+6/GwFNA6r1xr2UAAvZyixoacjPAGIqF5CVwz90enS9UVRm+CTxJRiD3tecECmr7MYdf2s18aegbu7Hq/WcrpxVW9bbxKIAx598IpclvW4ynCsBie1nW9AeQ2TNfMCAWzcmkVgk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744535285; c=relaxed/simple; bh=eSLMz35AjEzSf8TLTQG8UVrKNvYDGRG7qwmV+iw77AY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=iXG0z5d9LzVBKns4ENkbyd1P+Zqh/dyiPipg0qExK4vL8AUAW2/9bekaluoW6U9dkBpGzhuZy18AIaVfDkUqIryLmcVhCZacAHZKMKfeJlFsyXZyXlIQ3hM2wRAxuD+l1EZOXZOM6MiYAzaeg5pV5Qyo/AAsC2Z5e+uwqhFpq3c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de; spf=pass smtp.mailfrom=fw-web.de; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b=g8PR66PE; arc=none smtp.client-ip=134.0.28.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fw-web.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="g8PR66PE" Received: from mxbox1.masterlogin.de (unknown [192.168.10.88]) by mxout4.routing.net (Postfix) with ESMTP id 9D2E11000DE; Sun, 13 Apr 2025 08:58:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1744534693; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=W28WfcAJpST8Dtovpq8Ep5E0UnnAP29jza5E8k0zwUc=; b=g8PR66PEcKXygMIAAD/6t9416lGPgK0YiQiT1lftZJct9EmT40dbwrcbJxVpa0O2wSvmYx rjtkJpbfqdLE2Qz+VbwWR6E34ycKsz4stgR3uWXnA3fTRgn4pjQFokikcQWx3QaxtAPUa1 u6iefurH9/HxO56PMPeGvkyT/R8lcbE= Received: from frank-u24.. (fttx-pool-194.15.86.153.bambit.de [194.15.86.153]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id B7EE84006C; Sun, 13 Apr 2025 08:58:12 +0000 (UTC) From: Frank Wunderlich To: Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , Daniel Golle , Sam Shih , MandyJH Liu , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC 2/5] dt-bindings: phy: mtk-xs-phy: support type switch by pericfg Date: Sun, 13 Apr 2025 10:58:02 +0200 Message-ID: <20250413085806.8544-3-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250413085806.8544-1-linux@fw-web.de> References: <20250413085806.8544-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mail-ID: 79785311-ffeb-47ff-b83e-a442f86500dc Content-Type: text/plain; charset="utf-8" From: Frank Wunderlich Add support for type switch by pericfg register between USB3, PCIe, ... Signed-off-by: Frank Wunderlich --- .../devicetree/bindings/phy/mediatek,xsphy.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Do= cumentation/devicetree/bindings/phy/mediatek,xsphy.yaml index 3b5253659e6f..5033d77c1239 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml @@ -151,6 +151,22 @@ patternProperties: minimum: 1 maximum: 31 =20 + mediatek,syscon-type: + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 1 + description: + A phandle to syscon used to access the register of type switch, + the field should always be 3 cells long. + items: + items: + - description: + The first cell represents a phandle to syscon + - description: + The second cell represents the register offset + - description: + The third cell represents the index of config segment + enum: [0, 1, 2, 3] + required: - reg - clocks --=20 2.43.0 From nobody Fri Dec 19 10:56:26 2025 Received: from mxout3.routing.net (mxout3.routing.net [134.0.28.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A55B16CD33; Sun, 13 Apr 2025 09:04:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=134.0.28.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744535068; cv=none; b=HRfNuJQ8+NgTiIh4M1p51ak01MmzpiHnwRCDT3Xz5o57fyUSJPKToa4LJ8Z25aXe/l5Q5zyfPQN9qY0z8A/qzs3cVQBMh1KA/A5SmWyqqSlwIznA9+cj7ioOAFPyAtHUsIHhti6eh5PpLoBXt+3ICLIVwxFxVivkmLnvR2tWV5U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744535068; c=relaxed/simple; bh=m/xG/jfFeu0ykB2GVPn6x1/feKRxP0Iq8oiokxpxlIU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nUlEyrujmKj2huaHEXjmbM6tnao1LuXi0Yu7+FMpXSsf1FXMeMD+i73aYYAYx06EWfbnTmYj2Vl5/XmDRmVC49ZBKdcHaMaOOw7Glp+GVK6dFcVGsOpqJSF3AD43mmdH5ZiP+i/XRP3ucnmehoHUGwUH47It8iF5HrslixLb334= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de; spf=pass smtp.mailfrom=fw-web.de; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b=pCzmcJ1B; arc=none smtp.client-ip=134.0.28.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fw-web.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="pCzmcJ1B" Received: from mxbox1.masterlogin.de (unknown [192.168.10.88]) by mxout3.routing.net (Postfix) with ESMTP id 7FD6460533; Sun, 13 Apr 2025 08:58:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1744534694; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0bfhYzFpGn1B5RnzNyN51+I0POHsgnSqYypq5zUupqA=; b=pCzmcJ1BcwSaDmCCw1UdgyY2Tn8jvDcYynkIZRXOv3KEw2hvW1Jvz42jNDdlX/zuTTcI8F 6LEXt/pxULn95Qzr2TZpIN9xnRsb6wYmOY/6Bcu1H14wO/bOSM4B4fT53vF5PTpPmWWZOC T87WS5vWaPzwJRijvKHymcZtqUMkaWc= Received: from frank-u24.. (fttx-pool-194.15.86.153.bambit.de [194.15.86.153]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id 7FE4E40089; Sun, 13 Apr 2025 08:58:13 +0000 (UTC) From: Frank Wunderlich To: Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , Daniel Golle , Sam Shih , MandyJH Liu , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC 3/5] dt-bindings: power: Add binding for MediaTek MT7988 topmisc power controller Date: Sun, 13 Apr 2025 10:58:03 +0200 Message-ID: <20250413085806.8544-4-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250413085806.8544-1-linux@fw-web.de> References: <20250413085806.8544-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mail-ID: 9abf532c-77b9-424f-a697-dc702d13d513 Content-Type: text/plain; charset="utf-8" From: Frank Wunderlich Topmisc is a systemcontroller used for xs-phy and ethernet on mt7988. Add binding for it. Signed-off-by: Frank Wunderlich --- .../power/mediatek,power-controller.yaml | 35 +++++++++++++------ 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/power/mediatek,power-control= ler.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controlle= r.yaml index 591a080ca3ff..60d2fc7963e5 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -22,17 +22,27 @@ properties: pattern: '^power-controller(@[0-9a-f]+)?$' =20 compatible: - enum: - - mediatek,mt6735-power-controller - - mediatek,mt6795-power-controller - - mediatek,mt8167-power-controller - - mediatek,mt8173-power-controller - - mediatek,mt8183-power-controller - - mediatek,mt8186-power-controller - - mediatek,mt8188-power-controller - - mediatek,mt8192-power-controller - - mediatek,mt8195-power-controller - - mediatek,mt8365-power-controller + oneOf: + - items: + - enum: + - mediatek,mt6735-power-controller + - mediatek,mt6795-power-controller + - mediatek,mt8167-power-controller + - mediatek,mt8173-power-controller + - mediatek,mt8183-power-controller + - mediatek,mt8186-power-controller + - mediatek,mt8188-power-controller + - mediatek,mt8192-power-controller + - mediatek,mt8195-power-controller + - mediatek,mt8365-power-controller + - items: + - enum: + - mediatek,mt7988-topmisc + - const: syscon + - const: mediatek,mt7988-power-controller + + reg: + maxItems: 1 =20 '#power-domain-cells': const: 1 @@ -43,6 +53,9 @@ properties: '#size-cells': const: 0 =20 + '#clock-cells': + const: 1 + patternProperties: "^power-domain@[0-9a-f]+$": $ref: "#/$defs/power-domain-node" --=20 2.43.0 From nobody Fri Dec 19 10:56:26 2025 Received: from mxout4.routing.net (mxout4.routing.net [134.0.28.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A35F818DB1A; Sun, 13 Apr 2025 09:08:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=134.0.28.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744535285; cv=none; b=tikRoJvkpMKLecTEv3/tx1amHN69be3wOUdyePp/857cXjT5Y+unviBMabiavMqIWiDvuHztD9fTS0GnlXbBW+uTK4CVIbCYnopD0bLl9RrW5P5oLFNvywayYNaqbWXV4+DXhpvbWqY7NY054kaSs0Y/QDbiPc2iOoPVSvN5RVI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744535285; c=relaxed/simple; bh=lw2J3rDsFRflVycd5/Obpm10DfH+/mPUhQtjUa3WdqU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cDxPT8XF6RXvc//1meRsEokqIMYOoIjWkpJJlhLdZzOZeYWo5T9wGaGJFxDbpPXFKsN3OIUKj0bFyH0cWGFF8bCj0FXxse+Ur7xotrB51YF+2beNVnVmpCvuEHLaFOtVB2wINVLDocWaW0MOWcOBkcUR9aNVaThR/Fdh2ikQ6LQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de; spf=pass smtp.mailfrom=fw-web.de; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b=UmZtL6jg; arc=none smtp.client-ip=134.0.28.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fw-web.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="UmZtL6jg" Received: from mxbox1.masterlogin.de (unknown [192.168.10.88]) by mxout4.routing.net (Postfix) with ESMTP id 48A2B1004D0; Sun, 13 Apr 2025 08:58:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1744534695; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ib+KhWCrUSc+adJVmrX0XIz7ASiUmHJbOHL7A4bL+YA=; b=UmZtL6jgI0cyBG7f71Ee/uZxE5PK2Aj4cICeBnSmw2bChWLWVpZqIVq7lh+k7mYtdNgDuJ Cs+2MIvkgE/TKpaEW3DWkcPs1i9oU//GkVuNQtl8ROCEsDK+F9B22o+t3skCy+HyOyQv4N WIkYjWr//pftCpbYr1pa6U2DQSgG9vM= Received: from frank-u24.. (fttx-pool-194.15.86.153.bambit.de [194.15.86.153]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id 67BC94006C; Sun, 13 Apr 2025 08:58:14 +0000 (UTC) From: Frank Wunderlich To: Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , Daniel Golle , Sam Shih , MandyJH Liu , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC 4/5] phy: mediatek: xsphy: support type switch by pericfg Date: Sun, 13 Apr 2025 10:58:04 +0200 Message-ID: <20250413085806.8544-5-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250413085806.8544-1-linux@fw-web.de> References: <20250413085806.8544-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mail-ID: 69e800a6-6e8a-4e39-b54f-7c2364b9dec1 Content-Type: text/plain; charset="utf-8" From: Daniel Golle Patch from Sam Shih found in MediaTek SDK released under GPL. Get syscon and use it to set the PHY type. Extend support to PCIe and SGMII mode in addition to USB2 and USB3. Signed-off-by: Daniel Golle --- drivers/phy/mediatek/phy-mtk-xsphy.c | 85 +++++++++++++++++++++++++++- 1 file changed, 84 insertions(+), 1 deletion(-) diff --git a/drivers/phy/mediatek/phy-mtk-xsphy.c b/drivers/phy/mediatek/ph= y-mtk-xsphy.c index 7c248f5cfca5..c0ddb9273cc3 100644 --- a/drivers/phy/mediatek/phy-mtk-xsphy.c +++ b/drivers/phy/mediatek/phy-mtk-xsphy.c @@ -11,10 +11,12 @@ #include #include #include +#include #include #include #include #include +#include =20 #include "phy-mtk-io.h" =20 @@ -81,12 +83,22 @@ #define XSP_SR_COEF_DIVISOR 1000 #define XSP_FM_DET_CYCLE_CNT 1024 =20 +/* PHY switch between pcie/usb3/sgmii */ +#define USB_PHY_SWITCH_CTRL 0x0 +#define RG_PHY_SW_TYPE GENMASK(3, 0) +#define RG_PHY_SW_PCIE 0x0 +#define RG_PHY_SW_USB3 0x1 +#define RG_PHY_SW_SGMII 0x2 + struct xsphy_instance { struct phy *phy; void __iomem *port_base; struct clk *ref_clk; /* reference clock of anolog phy */ u32 index; u32 type; + struct regmap *type_sw; + u32 type_sw_reg; + u32 type_sw_index; /* only for HQA test */ int efuse_intr; int efuse_tx_imp; @@ -259,6 +271,10 @@ static void phy_parse_property(struct mtk_xsphy *xsphy, inst->efuse_intr, inst->efuse_tx_imp, inst->efuse_rx_imp); break; + case PHY_TYPE_PCIE: + case PHY_TYPE_SGMII: + /* nothing to do */ + break; default: dev_err(xsphy->dev, "incompatible phy type\n"); return; @@ -305,6 +321,62 @@ static void u3_phy_props_set(struct mtk_xsphy *xsphy, RG_XTP_LN0_RX_IMPSEL, inst->efuse_rx_imp); } =20 +/* type switch for usb3/pcie/sgmii */ +static int phy_type_syscon_get(struct xsphy_instance *instance, + struct device_node *dn) +{ + struct of_phandle_args args; + int ret; + + /* type switch function is optional */ + if (!of_property_present(dn, "mediatek,syscon-type")) + return 0; + + ret =3D of_parse_phandle_with_fixed_args(dn, "mediatek,syscon-type", + 2, 0, &args); + if (ret) + return ret; + + instance->type_sw_reg =3D args.args[0]; + instance->type_sw_index =3D args.args[1] & 0x3; /* <=3D3 */ + instance->type_sw =3D syscon_node_to_regmap(args.np); + of_node_put(args.np); + dev_info(&instance->phy->dev, "type_sw - reg %#x, index %d\n", + instance->type_sw_reg, instance->type_sw_index); + + return PTR_ERR_OR_ZERO(instance->type_sw); +} + +static int phy_type_set(struct xsphy_instance *instance) +{ + int type; + u32 offset; + + if (!instance->type_sw) + return 0; + + switch (instance->type) { + case PHY_TYPE_USB3: + type =3D RG_PHY_SW_USB3; + break; + case PHY_TYPE_PCIE: + type =3D RG_PHY_SW_PCIE; + break; + case PHY_TYPE_SGMII: + type =3D RG_PHY_SW_SGMII; + break; + case PHY_TYPE_USB2: + default: + return 0; + } + + offset =3D instance->type_sw_index * BITS_PER_BYTE; + regmap_update_bits(instance->type_sw, instance->type_sw_reg, + RG_PHY_SW_TYPE << offset, type << offset); + + return 0; +} + static int mtk_phy_init(struct phy *phy) { struct xsphy_instance *inst =3D phy_get_drvdata(phy); @@ -325,6 +397,10 @@ static int mtk_phy_init(struct phy *phy) case PHY_TYPE_USB3: u3_phy_props_set(xsphy, inst); break; + case PHY_TYPE_PCIE: + case PHY_TYPE_SGMII: + /* nothing to do, only used to set type */ + break; default: dev_err(xsphy->dev, "incompatible phy type\n"); clk_disable_unprepare(inst->ref_clk); @@ -403,12 +479,15 @@ static struct phy *mtk_phy_xlate(struct device *dev, =20 inst->type =3D args->args[0]; if (!(inst->type =3D=3D PHY_TYPE_USB2 || - inst->type =3D=3D PHY_TYPE_USB3)) { + inst->type =3D=3D PHY_TYPE_USB3 || + inst->type =3D=3D PHY_TYPE_PCIE || + inst->type =3D=3D PHY_TYPE_SGMII)) { dev_err(dev, "unsupported phy type: %d\n", inst->type); return ERR_PTR(-EINVAL); } =20 phy_parse_property(xsphy, inst); + phy_type_set(inst); =20 return inst->phy; } @@ -510,6 +589,10 @@ static int mtk_xsphy_probe(struct platform_device *pde= v) dev_err(dev, "failed to get ref_clk(id-%d)\n", port); return PTR_ERR(inst->ref_clk); } + + retval =3D phy_type_syscon_get(inst, child_np); + if (retval) + return retval; } =20 provider =3D devm_of_phy_provider_register(dev, mtk_phy_xlate); --=20 2.43.0 From nobody Fri Dec 19 10:56:26 2025 Received: from mxout3.routing.net (mxout3.routing.net [134.0.28.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A50863CB; 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(fttx-pool-194.15.86.153.bambit.de [194.15.86.153]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id 2D57940089; Sun, 13 Apr 2025 08:58:15 +0000 (UTC) From: Frank Wunderlich To: Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , Daniel Golle , Sam Shih , MandyJH Liu , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC 5/5] arm64: dts: mediatek: mt7988: Add xsphy for ssusb0/pcie2 Date: Sun, 13 Apr 2025 10:58:05 +0200 Message-ID: <20250413085806.8544-6-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250413085806.8544-1-linux@fw-web.de> References: <20250413085806.8544-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mail-ID: bf08c37c-044c-4f9f-90b3-b87e6ed8eae5 Content-Type: text/plain; charset="utf-8" From: Frank Wunderlich First usb and third pcie controller on mt7988 need a xs-phy to work properly. Signed-off-by: Frank Wunderlich --- arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 39 +++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dt= s/mediatek/mt7988a.dtsi index 88b56a24efca..10525d977007 100644 --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi @@ -334,6 +334,8 @@ usb@11190000 { <&infracfg CLK_INFRA_133M_USB_HCK>, <&infracfg CLK_INFRA_USB_XHCI>; clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; + phys =3D <&xphyu2port0 PHY_TYPE_USB2>, + <&xphyu3port0 PHY_TYPE_USB3>; status =3D "disabled"; }; =20 @@ -398,6 +400,9 @@ pcie2: pcie@11280000 { pinctrl-0 =3D <&pcie2_pins>; status =3D "disabled"; =20 + phys =3D <&xphyu3port0 PHY_TYPE_PCIE>; + phy-names =3D "pcie-phy"; + #interrupt-cells =3D <1>; interrupt-map-mask =3D <0 0 0 0x7>; interrupt-map =3D <0 0 0 1 &pcie_intc2 0>, @@ -548,6 +553,40 @@ tphyu3port0: usb-phy@11c50700 { }; }; =20 + topmisc: power-controller@11d10000 { + compatible =3D "mediatek,mt7988-topmisc", "syscon", + "mediatek,mt7988-power-controller"; + reg =3D <0 0x11d10000 0 0x10000>; + #clock-cells =3D <1>; + #power-domain-cells =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + xs-phy@11e10000 { + compatible =3D "mediatek,mt7988-xsphy", + "mediatek,xsphy"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + status =3D "disabled"; + + xphyu2port0: usb-phy@11e10000 { + reg =3D <0 0x11e10000 0 0x400>; + clocks =3D <&infracfg CLK_INFRA_USB_UTMI>; + clock-names =3D "ref"; + #phy-cells =3D <1>; + }; + + xphyu3port0: usb-phy@11e13000 { + reg =3D <0 0x11e13400 0 0x500>; + clocks =3D <&infracfg CLK_INFRA_USB_PIPE>; + clock-names =3D "ref"; + #phy-cells =3D <1>; + mediatek,syscon-type =3D <&topmisc 0x218 0>; + }; + }; + clock-controller@11f40000 { compatible =3D "mediatek,mt7988-xfi-pll"; reg =3D <0 0x11f40000 0 0x1000>; --=20 2.43.0