From nobody Fri Dec 19 20:16:36 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D09D6221296; Fri, 11 Apr 2025 10:52:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744368730; cv=none; b=EB6SldeWBTkXoLa6X/ttmSznqmVky9CCisTE97jWMTQydIw6JUmXaUxcb+jSBCfD69PvAKFfYWQT7h9sRlsSAJ1Q00EFAWiLypn+8DpeBiFrEmt+uZibHhYrDAvZ5agql3qVHh+5DugMX9odpVIdeSixOay9z3oPC9InLG8FfW8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744368730; c=relaxed/simple; bh=RBPgsueLRkyOa3jZNAyvvK1FJaTClD9NklGtz/fac9A=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=fAJbXlvTa0ObvJ3kRm4OD+F7gKNSUZbfjXJxcCzYW5Rn0BnXp7zR+lVu/Z3mSy1prOprR91ehv6E1fln7za4u7krZjzV5k82Uz5S8zfL3JtFGIlLMHQZYzSogiJQi/sclpob/dguuCnAFEsdmeUxablQnm8w/Ar12hVQqF7r1b8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=GJMF0Clj; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="GJMF0Clj" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 53BAq3Ve2052615 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 11 Apr 2025 05:52:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1744368723; bh=g2nMURUa7JgdZ3bdo++c1SoNor21usREaOEOIg1G8S0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=GJMF0Cljc+uxkxJN0rQpdZcmeRs2lqrWqLSxJ+aW4DYuiRmHxBOGYOLWXOzXWDoq2 mFspaq0VP7KYwMDSHuKaokgf2wOUsy1tJTrTfXa9iDRc7MqPLCj9koeeBjXk3mnFDZ OUuSVQXuNlR/+12Y2DyIhVeDUYOZHAfjjDE5jmCs= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 53BAq3AW110925 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 11 Apr 2025 05:52:03 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 11 Apr 2025 05:52:02 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 11 Apr 2025 05:52:02 -0500 Received: from localhost (jayesh-hp-z2-tower-g5-workstation.dhcp.ti.com [10.24.72.182]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53BAq1ar046536; Fri, 11 Apr 2025 05:52:02 -0500 From: Jayesh Choudhary To: , , , , CC: , , , , , , Subject: [PATCH 3/7] arm64: dts: ti: k3-j721s2-main: add DSI & DSI PHY Date: Fri, 11 Apr 2025 16:21:51 +0530 Message-ID: <20250411105155.303657-4-j-choudhary@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250411105155.303657-1-j-choudhary@ti.com> References: <20250411105155.303657-1-j-choudhary@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" From: Rahul T R Add DT nodes for DPI to DSI Bridge and DSI Phy. The DSI bridge is Cadence DSI and the PHY is a Cadence DPHY with TI wrapper. Signed-off-by: Rahul T R [j-choudhary@ti.com: disable dsi and dphy nodes, rename dphy node] Signed-off-by: Jayesh Choudhary --- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/d= ts/ti/k3-j721s2-main.dtsi index 92bf48fdbeba..b91943349024 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -1790,6 +1790,43 @@ main_spi7: spi@2170000 { status =3D "disabled"; }; =20 + dphy_tx0: phy@4480000 { + compatible =3D "ti,j721e-dphy"; + reg =3D <0x0 0x04480000 0x0 0x1000>; + clocks =3D <&k3_clks 363 8>, <&k3_clks 363 14>; + clock-names =3D "psm", "pll_ref"; + #phy-cells =3D <0>; + power-domains =3D <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 363 14>; + assigned-clock-parents =3D <&k3_clks 363 15>; + assigned-clock-rates =3D <19200000>; + status =3D "disabled"; + }; + + dsi0: dsi@4800000 { + compatible =3D "ti,j721e-dsi"; + reg =3D <0x0 0x04800000 0x0 0x100000>, <0x0 0x04710000 0x0 0x100>; + clocks =3D <&k3_clks 154 4>, <&k3_clks 154 1>; + clock-names =3D "dsi_p_clk", "dsi_sys_clk"; + power-domains =3D <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + interrupt-parent =3D <&gic500>; + interrupts =3D ; + phys =3D <&dphy_tx0>; + phy-names =3D "dphy"; + status =3D "disabled"; + + dsi0_ports: ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + port@0 { + reg =3D <0>; + }; + port@1 { + reg =3D <1>; + }; + }; + }; + dss: dss@4a00000 { compatible =3D "ti,j721e-dss"; reg =3D <0x00 0x04a00000 0x00 0x10000>, /* common_m */ --=20 2.34.1