From nobody Fri Dec 19 15:46:33 2025 Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6985E280CF2 for ; Fri, 11 Apr 2025 05:44:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.156.1 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744350269; cv=none; b=pn6gNrTgGg+09N/qT1qh47R/Sd1bxE1It4Y/vbNs54qcVOZ8ZoWRZefu+yPeQVtVR45b/zBKvEai9FQhNN5x517P0H2N7KniEfZhKm2wvG+WhD+Jg8u68hOSGiDmiHIx/6wpHR/7J0bwfpC7uVu/4PRAuksAsXtbd2s/ICRTvYA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744350269; c=relaxed/simple; bh=xCSGXc3svdFlEUGElSaZzEYQ1PKTaFgP4yoUY/N3MQE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SM6gulo6qMNdl+Y/UNLAJPdchzXvN9fn0eyRdTp+7Q7i76PMZUNJ4/W4AVzbVFH54WVFwF1uRtQktgR9JYTwgeI5k918atqpXrQusrztA0o2R9XfG3LBQKqxoJ6bd6RXmnd+T9IJPWolQYvDmLY2UR4oq1k+AtUgOJFk+i7GIHE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com; spf=pass smtp.mailfrom=linux.ibm.com; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b=cpzi7jHn; arc=none smtp.client-ip=148.163.156.1 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.ibm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b="cpzi7jHn" Received: from pps.filterd (m0356517.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 53AMLidX010582; Fri, 11 Apr 2025 05:44:07 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=RRgLMuW9FBdfsLDbO 418TaZTwPRgtX9fnAGKx+FMhHo=; b=cpzi7jHnFwlI5AGEiIGn1MZSZ1Z00RIvP gsU+nUo4gbYl2tppaWXB6VpJYbrx8nFGmRxIJ5R5OsxMNxhqShlFQVEdrlkjkcPh d/hP8+hfnQGGjcaUQoDR9/EUN4/z8vfLCdUbSqMqrhzmzVaqc829PS3OwXaM19BE X4WpP6aScb+rhA1R6LCW07mcAGjvmN+lGO0mjWPrn8cgjzH8/EzLkEut0TuuNjVN N82HD9V4WjQbnzc0ZU+DOOxkDJWU2xu1Upypz4D6GMcN65lIYB0NWxBmZXPIvd8E Cw6lcun+NnjXn0xZEje2a6DAHUCUn61Cpkd1NpmDHVNVK573qPH+A== Received: from ppma13.dal12v.mail.ibm.com (dd.9e.1632.ip4.static.sl-reverse.com [50.22.158.221]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 45xfdqkxwt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 11 Apr 2025 05:44:07 +0000 (GMT) Received: from pps.filterd (ppma13.dal12v.mail.ibm.com [127.0.0.1]) by ppma13.dal12v.mail.ibm.com (8.18.1.2/8.18.1.2) with ESMTP id 53B1qKSq017447; Fri, 11 Apr 2025 05:44:05 GMT Received: from smtprelay02.fra02v.mail.ibm.com ([9.218.2.226]) by ppma13.dal12v.mail.ibm.com (PPS) with ESMTPS id 45uh2m1cvh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 11 Apr 2025 05:44:05 +0000 Received: from smtpav06.fra02v.mail.ibm.com (smtpav06.fra02v.mail.ibm.com [10.20.54.105]) by smtprelay02.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 53B5i4vw30015838 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 11 Apr 2025 05:44:04 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EE42520040; Fri, 11 Apr 2025 05:44:03 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2528D20049; Fri, 11 Apr 2025 05:44:03 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.63.197.14]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 11 Apr 2025 05:44:03 +0000 (GMT) Received: from jarvis.ozlabs.ibm.com (haven.au.ibm.com [9.63.198.114]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 81C9760AC7; Fri, 11 Apr 2025 15:43:57 +1000 (AEST) From: Andrew Donnellan To: linuxppc-dev@lists.ozlabs.org Cc: x86@kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, pasha.tatashin@soleen.com, sweettea-kernel@dorminy.me, christophe.leroy@csgroup.eu Subject: [PATCH v14 09/11] powerpc: mm: Implement *_user_accessible_page() for ptes Date: Fri, 11 Apr 2025 15:43:52 +1000 Message-ID: <20250411054354.511145-10-ajd@linux.ibm.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250411054354.511145-1-ajd@linux.ibm.com> References: <20250411054354.511145-1-ajd@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 8yWxrfJXEc3Tb8NWcx8LNkIxPXBoO1vS X-Proofpoint-ORIG-GUID: 8yWxrfJXEc3Tb8NWcx8LNkIxPXBoO1vS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-11_01,2025-04-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 mlxscore=0 priorityscore=1501 adultscore=0 phishscore=0 mlxlogscore=597 impostorscore=0 bulkscore=0 clxscore=1015 lowpriorityscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504110038 Content-Type: text/plain; charset="utf-8" From: Rohan McLure Page table checking depends on architectures providing an implementation of p{te,md,ud}_user_accessible_page. With refactorisations made on powerpc/mm, the pte_access_permitted() and similar methods verify whether a userland page is accessible with the required permissions. Since page table checking is the only user of p{te,md,ud}_user_accessible_page(), implement these for all platforms, using some of the same preliminary checks taken by pte_access_permitted() on that platform. Since commit 8e9bd41e4ce1 ("powerpc/nohash: Replace pte_user() by pte_read(= )") pte_user() is no longer required to be present on all platforms as it may be equivalent to or implied by pte_read(). Hence implementations of pte_user_accessible_page() are specialised. Signed-off-by: Rohan McLure Reviewed-by: Pasha Tatashin [ajd: rebase and fix commit message] Signed-off-by: Andrew Donnellan --- arch/powerpc/include/asm/book3s/32/pgtable.h | 5 +++++ arch/powerpc/include/asm/book3s/64/pgtable.h | 17 +++++++++++++++++ arch/powerpc/include/asm/nohash/pgtable.h | 5 +++++ arch/powerpc/include/asm/pgtable.h | 8 ++++++++ 4 files changed, 35 insertions(+) diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/in= clude/asm/book3s/32/pgtable.h index 42c3af90d1f0..a2305d850fc9 100644 --- a/arch/powerpc/include/asm/book3s/32/pgtable.h +++ b/arch/powerpc/include/asm/book3s/32/pgtable.h @@ -437,6 +437,11 @@ static inline bool pte_access_permitted(pte_t pte, boo= l write) return true; } =20 +static inline bool pte_user_accessible_page(pte_t pte, unsigned long addr) +{ + return pte_present(pte) && !is_kernel_addr(addr); +} + /* Conversion functions: convert a page and protection to a page entry, * and a page entry and page directory to the page they refer to. * diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/in= clude/asm/book3s/64/pgtable.h index 6d98e6f08d4d..754d4d525f0e 100644 --- a/arch/powerpc/include/asm/book3s/64/pgtable.h +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h @@ -540,6 +540,11 @@ static inline bool pte_access_permitted(pte_t pte, boo= l write) return arch_pte_access_permitted(pte_val(pte), write, 0); } =20 +static inline bool pte_user_accessible_page(pte_t pte, unsigned long addr) +{ + return pte_present(pte) && pte_user(pte); +} + /* * Conversion functions: convert a page and protection to a page entry, * and a page entry and page directory to the page they refer to. @@ -1431,5 +1436,17 @@ static inline bool is_pte_rw_upgrade(unsigned long o= ld_val, unsigned long new_va return false; } =20 +#define pmd_user_accessible_page pmd_user_accessible_page +static inline bool pmd_user_accessible_page(pmd_t pmd, unsigned long addr) +{ + return pmd_leaf(pmd) && pte_user_accessible_page(pmd_pte(pmd), addr); +} + +#define pud_user_accessible_page pud_user_accessible_page +static inline bool pud_user_accessible_page(pud_t pud, unsigned long addr) +{ + return pud_leaf(pud) && pte_user_accessible_page(pud_pte(pud), addr); +} + #endif /* __ASSEMBLY__ */ #endif /* _ASM_POWERPC_BOOK3S_64_PGTABLE_H_ */ diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/inclu= de/asm/nohash/pgtable.h index 8d1f0b7062eb..1c3dfe2d6cc1 100644 --- a/arch/powerpc/include/asm/nohash/pgtable.h +++ b/arch/powerpc/include/asm/nohash/pgtable.h @@ -243,6 +243,11 @@ static inline bool pte_access_permitted(pte_t pte, boo= l write) return true; } =20 +static inline bool pte_user_accessible_page(pte_t pte, unsigned long addr) +{ + return pte_present(pte) && !is_kernel_addr(addr); +} + /* Conversion functions: convert a page and protection to a page entry, * and a page entry and page directory to the page they refer to. * diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/= pgtable.h index bb43e4f46367..3cae32c74fed 100644 --- a/arch/powerpc/include/asm/pgtable.h +++ b/arch/powerpc/include/asm/pgtable.h @@ -224,6 +224,14 @@ static inline int pud_pfn(pud_t pud) } #endif =20 +#ifndef pmd_user_accessible_page +#define pmd_user_accessible_page(pmd, addr) false +#endif + +#ifndef pud_user_accessible_page +#define pud_user_accessible_page(pud, addr) false +#endif + #endif /* __ASSEMBLY__ */ =20 #endif /* _ASM_POWERPC_PGTABLE_H */ --=20 2.49.0