From nobody Mon Feb 9 03:55:44 2026 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF989433C4; Wed, 9 Apr 2025 13:42:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206123; cv=none; b=S8yn+2335zXCXBghEj3ZAalwKeuwJrs/8sdBX+aPWcjXJOAD83PDYY+y+6ZqaYchAMG8iUDnnmgs7qloKOB5s4EJU+rVT8PUp0OobYx0bKCM4L0UxpC6PS2I0WOePvdYroFv04G00zfDC2XhNaE31N3us6VwtRvcIwZpkMaQLVk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206123; c=relaxed/simple; bh=sc03qgNwUeswmJ6AElAimo9D5XLqYV9zhUgCVpiBamY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=AEVs9+08pPLGtVQ9DsLavRM4ug/QNSMszS/3zhTbBKesZfjRd7FzDBWzvyZqyeEF57C4FMi591EGJo+EvxUkUxJB/OjHeNTYNkwyZwPqSdsAZCPv6CYF5DCc4mlmgxG5oiBR6t9TbTcQiEBjp8vYKk9Z9IGxwpARicKgRXJ56pY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=pWXloubA; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="pWXloubA" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 539Dfk1h989089 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 9 Apr 2025 08:41:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1744206106; bh=PKhhvBMBgSOpuoEhY0QoFQBscdm8Xe9Ge1PX5/SSajQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=pWXloubAT2raYML4keYvKgZICpU7ylcVk78BBscXLi/Rua5/AVeSY8zrmvLzqCA00 6wqJmfcQjn3e6VMxfmgyLx0pAsQM/C6l+aiSXHkOrqCxIX/h8ECKPArsUtOj81X1Fx QQpZzvNd10VIfhJDvxMJPcGoFNlpU69V3w32PU3Q= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 539DfksG124935 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Apr 2025 08:41:46 -0500 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 9 Apr 2025 08:41:45 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Apr 2025 08:41:45 -0500 Received: from abhilash-HP.dhcp.ti.com (abhilash-hp.dhcp.ti.com [172.24.227.115]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 539DfZvn122297; Wed, 9 Apr 2025 08:41:41 -0500 From: Yemike Abhilash Chandra To: , CC: , , , , , , , , , , , Yemike Abhilash Chandra , Subject: [PATCH v2 1/7] arm64: dts: ti: j721e-sk: Add DT nodes for power regulators Date: Wed, 9 Apr 2025 19:11:22 +0530 Message-ID: <20250409134128.2098195-2-y-abhilashchandra@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250409134128.2098195-1-y-abhilashchandra@ti.com> References: <20250409134128.2098195-1-y-abhilashchandra@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Add device tree nodes for two power regulators on the J721E SK board. vsys_5v0: A fixed regulator representing the 5V supply output from the LM61460 and vdd_sd_dv: A GPIO-controlled TLV71033 regulator. J721E-SK schematics: https://www.ti.com/lit/zip/sprr438 Fixes: 1bfda92a3a36 ("arm64: dts: ti: Add support for J721E SK") Cc: stable@vger.kernel.org Signed-off-by: Yemike Abhilash Chandra Reviewed-by: Neha Malcom Francis --- arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 31 ++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/t= i/k3-j721e-sk.dts index 440ef57be294..4965957e6545 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -184,6 +184,17 @@ vsys_3v3: fixedregulator-vsys3v3 { regulator-boot-on; }; =20 + vsys_5v0: fixedregulator-vsys5v0 { + /* Output of LM61460 */ + compatible =3D "regulator-fixed"; + regulator-name =3D "vsys_5v0"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vusb_main>; + regulator-always-on; + regulator-boot-on; + }; + vdd_mmc1: fixedregulator-sd { compatible =3D "regulator-fixed"; pinctrl-names =3D "default"; @@ -211,6 +222,20 @@ vdd_sd_dv_alt: gpio-regulator-tps659411 { <3300000 0x1>; }; =20 + vdd_sd_dv: gpio-regulator-TLV71033 { + compatible =3D "regulator-gpio"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vdd_sd_dv_pins_default>; + regulator-name =3D "tlv71033"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + vin-supply =3D <&vsys_5v0>; + gpios =3D <&main_gpio0 118 GPIO_ACTIVE_HIGH>; + states =3D <1800000 0x0>, + <3300000 0x1>; + }; + transceiver1: can-phy1 { compatible =3D "ti,tcan1042"; #phy-cells =3D <0>; @@ -613,6 +638,12 @@ J721E_WKUP_IOPAD(0xd4, PIN_OUTPUT, 7) /* (G26) WKUP_GP= IO0_9 */ >; }; =20 + vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { + pinctrl-single,pins =3D < + J721E_IOPAD(0x1dc, PIN_INPUT, 7) /* (Y1) SPI1_CLK.GPIO0_118 */ + >; + }; + wkup_uart0_pins_default: wkup-uart0-default-pins { pinctrl-single,pins =3D < J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */ --=20 2.34.1 From nobody Mon Feb 9 03:55:44 2026 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDF30264A85; Wed, 9 Apr 2025 13:42:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206126; cv=none; b=bLKCLcQFcms34OjNCyDovw7s73ZGZcLhJMKjXyWFvXY+kr/afppqsmcOG9L/fl1GVJw9yxnfBSbPjmaeAT7lBQUlL5/Wvz65UZX2YC42hRPqOL8Zc4fd3EaGskM2JGvyV272A41ps46FIUIQoiJd63fSSYw4t3j7vI5ZLf3BFZY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206126; c=relaxed/simple; bh=jp+9YNGbzTgNkExR/MLw1Hc7Wx7azVb2j/fMbRVrUBU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=C/bW+4ZT89d44JxBBduyBmORUZbEzLDUTUFsB2zH8f0tNKF8RI/TQGbAR5HnO0Z98iYTFjOTIEauEnisDZe3ScsXa5hgHoa6ieXQ/6IQylTB4jSkU8VXeS5C6JToliHClTv9ac3qQQX5ivVnESNAqdOnjvbNwP029RKPNB3Q4C8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=wDlXNcgV; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="wDlXNcgV" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 539Dfpwm989117 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 9 Apr 2025 08:41:51 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1744206111; bh=MBecbQAkNkpqOWAGI4P9wm+IZ+VzlnlKKcql7AkwjQQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=wDlXNcgVONs+Gxf5J8mED0QfyywnWHmqsdaZqDf27yBkz2fUFQA/+suy691bJ5Ssa G+K5uFsX87WJqHkOz7iX9Q76vlfQUWbGwzIZKE/JRHhIQvxYCC8uTCNgXhcbmcOlwp 5EXs9quwXvuwIAd9Mmj1Yf2XE/FfhHPwNEtS77S0= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 539DfpP2020955 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Apr 2025 08:41:51 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 9 Apr 2025 08:41:51 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Apr 2025 08:41:51 -0500 Received: from abhilash-HP.dhcp.ti.com (abhilash-hp.dhcp.ti.com [172.24.227.115]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 539DfZvo122297; Wed, 9 Apr 2025 08:41:47 -0500 From: Yemike Abhilash Chandra To: , CC: , , , , , , , , , , , Yemike Abhilash Chandra , Subject: [PATCH v2 2/7] arm64: dts: ti: am68-sk: Fix regulator hierarchy Date: Wed, 9 Apr 2025 19:11:23 +0530 Message-ID: <20250409134128.2098195-3-y-abhilashchandra@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250409134128.2098195-1-y-abhilashchandra@ti.com> References: <20250409134128.2098195-1-y-abhilashchandra@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Update the vin-supply of the TLV71033 regulator from LM5141 (vsys_3v3) to LM61460 (vsys_5v0) to match the schematics. Add a fixed regulator node for the LM61460 5V supply to support this change. AM68-SK schematics: https://www.ti.com/lit/zip/sprr463 Fixes: a266c180b398 ("arm64: dts: ti: k3-am68-sk: Add support for AM68 SK b= ase board") Cc: stable@vger.kernel.org Signed-off-by: Yemike Abhilash Chandra Reviewed-by: Neha Malcom Francis Reviewed-by: Udit Kumar --- arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/= boot/dts/ti/k3-am68-sk-base-board.dts index 11522b36e0ce..5fa70a874d7b 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts @@ -44,6 +44,17 @@ vusb_main: regulator-vusb-main5v0 { regulator-boot-on; }; =20 + vsys_5v0: regulator-vsys5v0 { + /* Output of LM61460 */ + compatible =3D "regulator-fixed"; + regulator-name =3D "vsys_5v0"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vusb_main>; + regulator-always-on; + regulator-boot-on; + }; + vsys_3v3: regulator-vsys3v3 { /* Output of LM5141 */ compatible =3D "regulator-fixed"; @@ -76,7 +87,7 @@ vdd_sd_dv: regulator-tlv71033 { regulator-min-microvolt =3D <1800000>; regulator-max-microvolt =3D <3300000>; regulator-boot-on; - vin-supply =3D <&vsys_3v3>; + vin-supply =3D <&vsys_5v0>; gpios =3D <&main_gpio0 49 GPIO_ACTIVE_HIGH>; states =3D <1800000 0x0>, <3300000 0x1>; --=20 2.34.1 From nobody Mon Feb 9 03:55:44 2026 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A41A263C84; Wed, 9 Apr 2025 13:42:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206133; cv=none; b=Ryyby5ql2G5vgDcOg9YOGCeJ2yGhIl54izuv6GSigZg9UoIE/EzPRo/EMNOgz8qo5R+x5mNklKuu0QnRMojMM/K3lO4Yw1x9bans5eOL8q0elSA0TWwbEdNgwBvSjFfela6NU+O246YbqxCSAza4zYlc99vIl2SiTSrxz/iwmZ4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206133; c=relaxed/simple; bh=qIqTc2pX37YEHhKr8GvHOTc+DImLUDia4ncQiBjv8bA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=M2zodbgTdd52tt+TFNGIEZM7KN8AUNcjPM9lYNBjekLC2MORop2yDHXCR37Lv4XoXA1dBLX0/Y8//gSDe4POXZQjz0kxt3hGUxnL8PxtndCGDjXLiKh3+OM0KehwIvDwBKaNXXxQtRPyM+ZnQiRsw9+GjbrbSnTa0cN5lk+RclE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=wWR9ckaJ; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="wWR9ckaJ" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 539DfxuB843218 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 9 Apr 2025 08:41:59 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1744206119; bh=gVjFecItKNWFFobYFX7yYpuO62tztUlkJHRoDC3XroI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=wWR9ckaJKlqiFb0XxA+C2lWHHmLkMu4yvxbd1wK9+xrDTqIrz+QXVgLV6nMa3oNFH 4Y7pkK7n7yXIHqMZJ80CcD2y//calmv0fOBm0SARclFB9SboQP8ZOfNeZJm2VbGHKS RXIpHAneVEItGiSe36js18MUmlwGUYdOE2Z0wWms= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 539Dfx0b020998 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Apr 2025 08:41:59 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 9 Apr 2025 08:41:58 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Apr 2025 08:41:59 -0500 Received: from abhilash-HP.dhcp.ti.com (abhilash-hp.dhcp.ti.com [172.24.227.115]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 539DfZvp122297; Wed, 9 Apr 2025 08:41:55 -0500 From: Yemike Abhilash Chandra To: , CC: , , , , , , , , , , , Yemike Abhilash Chandra , Subject: [PATCH v2 3/7] arm64: dts: ti: k3-j721e-sk: Remove clock-names property from IMX219 overlay Date: Wed, 9 Apr 2025 19:11:24 +0530 Message-ID: <20250409134128.2098195-4-y-abhilashchandra@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250409134128.2098195-1-y-abhilashchandra@ti.com> References: <20250409134128.2098195-1-y-abhilashchandra@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The IMX219 sensor device tree bindings do not include a clock-names property. Remove the incorrectly added clock-names entry to avoid dtbs_check warnings. Fixes: f767eb918096 ("arm64: dts: ti: k3-j721e-sk: Add overlay for IMX219") Cc: stable@vger.kernel.org Signed-off-by: Yemike Abhilash Chandra Reviewed-by: Jai Luthra Reviewed-by: Neha Malcom Francis --- arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso b/arc= h/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso index 47bb5480b5b0..4a395d1209c8 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso @@ -34,7 +34,6 @@ imx219_0: imx219-0@10 { reg =3D <0x10>; =20 clocks =3D <&clk_imx219_fixed>; - clock-names =3D "xclk"; =20 port { csi2_cam0: endpoint { @@ -56,7 +55,6 @@ imx219_1: imx219-1@10 { reg =3D <0x10>; =20 clocks =3D <&clk_imx219_fixed>; - clock-names =3D "xclk"; =20 port { csi2_cam1: endpoint { --=20 2.34.1 From nobody Mon Feb 9 03:55:44 2026 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC46D25EF85; Wed, 9 Apr 2025 13:42:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206139; cv=none; b=J16WRhOo8eGXY2T8e3DLdRzJ88Z4kPpnYDKhTsul2Mg8jTorkJlwH0G2gwUa7ZqGoYW6d60g7U3deUqCFrsxRhorSqPCF5sZiYgOe36LRbYJZOCm3ryVoctUevBNteX3NI9ErDkW4TgI1atKU5MiV072yONwgB4j2Igv54KScqI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206139; c=relaxed/simple; bh=QOWNFoWF3AbFrM+DyhOHEna0d63DD69NFhUjTP9PF/w=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=f8sajRREFs/KI61cpIhv2xhm2XVv0cwpiyLSYuytQ5LSiqpO1YU1dUQLp9ObEc1zwglO7cmxMWQEPScTi3MVJuGNJ3eMQTVqtJeWyN2k7QF7lNH+H0czeKI4lN80mOIYFRzIWaFSe5n2EknVucT0JskHMNCYMUe0ecg6NBq5lak= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=bUc0eiQZ; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="bUc0eiQZ" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 539Dg50s1478468 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 9 Apr 2025 08:42:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1744206125; bh=zahvQbeK63L0HM8iOOuzTAhLBRQW34Zwnq3+zRVjXmY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=bUc0eiQZ2QpLGmu9ggcWN28+LewzRc/9NS14eQsIg/wJPUiUQd1+BxRSXvvUDJFIm GEKgslKv3ts2zYO58CuLhYCfmCwZdl+Fsdv/xhRCXzgC/BVUZ84PZ/GkFVHSUtd9mP 8C05koBXHj/kmoey/PRaOMBbIAvHl/i58O1aPTK8= Received: from DFLE110.ent.ti.com (dfle110.ent.ti.com [10.64.6.31]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 539Dg53m021315 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Apr 2025 08:42:05 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 9 Apr 2025 08:42:05 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Apr 2025 08:42:04 -0500 Received: from abhilash-HP.dhcp.ti.com (abhilash-hp.dhcp.ti.com [172.24.227.115]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 539DfZvq122297; Wed, 9 Apr 2025 08:42:00 -0500 From: Yemike Abhilash Chandra To: , CC: , , , , , , , , , , , Yemike Abhilash Chandra , Subject: [PATCH v2 4/7] arm64: dts: ti: k3-j721e-sk: Add requiried voltage supplies for IMX219 Date: Wed, 9 Apr 2025 19:11:25 +0530 Message-ID: <20250409134128.2098195-5-y-abhilashchandra@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250409134128.2098195-1-y-abhilashchandra@ti.com> References: <20250409134128.2098195-1-y-abhilashchandra@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The device tree overlay for the IMX219 sensor requires three voltage supplies to be defined: VANA (analog), VDIG (digital core), and VDDL (digital I/O). Add the corresponding voltage supply definitions to avoid dtbs_check warnings. Fixes: f767eb918096 ("arm64: dts: ti: k3-j721e-sk: Add overlay for IMX219") Cc: stable@vger.kernel.org Signed-off-by: Yemike Abhilash Chandra --- .../dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso b/arc= h/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso index 4a395d1209c8..4eb3cffab032 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso @@ -19,6 +19,33 @@ clk_imx219_fixed: imx219-xclk { #clock-cells =3D <0>; clock-frequency =3D <24000000>; }; + + reg_2p8v: regulator-2p8v { + compatible =3D "regulator-fixed"; + regulator-name =3D "2P8V"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + vin-supply =3D <&vdd_sd_dv>; + regulator-always-on; + }; + + reg_1p8v: regulator-1p8v { + compatible =3D "regulator-fixed"; + regulator-name =3D "1P8V"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vdd_sd_dv>; + regulator-always-on; + }; + + reg_1p2v: regulator-1p2v { + compatible =3D "regulator-fixed"; + regulator-name =3D "1P2V"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + vin-supply =3D <&vdd_sd_dv>; + regulator-always-on; + }; }; =20 &csi_mux { @@ -34,6 +61,9 @@ imx219_0: imx219-0@10 { reg =3D <0x10>; =20 clocks =3D <&clk_imx219_fixed>; + VANA-supply =3D <®_2p8v>; + VDIG-supply =3D <®_1p8v>; + VDDL-supply =3D <®_1p2v>; =20 port { csi2_cam0: endpoint { @@ -55,6 +85,9 @@ imx219_1: imx219-1@10 { reg =3D <0x10>; =20 clocks =3D <&clk_imx219_fixed>; + VANA-supply =3D <®_2p8v>; + VDIG-supply =3D <®_1p8v>; + VDDL-supply =3D <®_1p2v>; =20 port { csi2_cam1: endpoint { --=20 2.34.1 From nobody Mon Feb 9 03:55:44 2026 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 526A425EFB7; Wed, 9 Apr 2025 13:42:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206147; cv=none; b=E/zA1jMdnVJ0IBJgZ6N6dKGrW9xzKgpKAqXme9aYnVQSh5Mj3bAAO2TBZ4rjflszKsNZ+P5tWTQ+zxjDZDKdPhWZ18j5C3N4yCbw+8iCTmZfPfN2b2aoJkGJ735pIXbenpfDeXAnZ3qdDyKTcjtAODAVvH9o2c9UhEK5n0aHzm8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206147; c=relaxed/simple; bh=ct+xIbzbtI/EsW2LAOk8cLqMgpcrt0aox4O6HAU9MeA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Y9JOvWbtZM7kH0P9FbIChK4jULtTPq4Ovv68l1IMoGf9/LRw+JuH1SB9R5f5COP3eWkXST0nXKRA2Z5kKieXkwDgdCl3DrznSmbf1fNAUkVFYcGsYq1iYNYAGY24OPNeYfhzJma5bCYfxbksm7fpxOlRqYPtl9CZF9+DdRbA/sA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=LuC2+ZJZ; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="LuC2+ZJZ" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 539DgDpb1478492 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 9 Apr 2025 08:42:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1744206133; bh=AMIpnqumUaVhU4eozv0g1aGxA97jgGS0LwH18OroUYw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=LuC2+ZJZWfcAg92hXddR0jHSr3oj+Qo3st/EKz3VgOiUZfNBbPV+DxgqdS9/qq4FU C14ksVgpk/nb+Vxc3z/qKb798WBdkyRIPZvEmi04AfMKiVztxUyTdk2Q874FJPmiDN P1z0WxRoBF71NK37pklhC8R/qyUoQNtC4ixelY2A= Received: from DLEE111.ent.ti.com (dlee111.ent.ti.com [157.170.170.22]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 539DgDrM125280 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Apr 2025 08:42:13 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 9 Apr 2025 08:42:12 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Apr 2025 08:42:12 -0500 Received: from abhilash-HP.dhcp.ti.com (abhilash-hp.dhcp.ti.com [172.24.227.115]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 539DfZvr122297; Wed, 9 Apr 2025 08:42:08 -0500 From: Yemike Abhilash Chandra To: , CC: , , , , , , , , , , , Yemike Abhilash Chandra , Subject: [PATCH v2 5/7] arm64: dts: ti: k3-am62x: Remove clock-names property from IMX219 overlay Date: Wed, 9 Apr 2025 19:11:26 +0530 Message-ID: <20250409134128.2098195-6-y-abhilashchandra@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250409134128.2098195-1-y-abhilashchandra@ti.com> References: <20250409134128.2098195-1-y-abhilashchandra@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The IMX219 sensor device tree bindings do not include a clock-names property. Remove the incorrectly added clock-names entry to avoid dtbs_check warnings. Fixes: 4111db03dc05 ("arm64: dts: ti: k3-am62x: Add overlay for IMX219") Cc: stable@vger.kernel.org Signed-off-by: Yemike Abhilash Chandra Reviewed-by: Jai Luthra Reviewed-by: Neha Malcom Francis --- arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso b/arch/arm= 64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso index 76ca02127f95..7a0d35eb04d3 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso @@ -39,7 +39,6 @@ ov5640: camera@10 { reg =3D <0x10>; =20 clocks =3D <&clk_imx219_fixed>; - clock-names =3D "xclk"; =20 reset-gpios =3D <&exp1 13 GPIO_ACTIVE_HIGH>; =20 --=20 2.34.1 From nobody Mon Feb 9 03:55:44 2026 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B58DE25EFB7; Wed, 9 Apr 2025 13:42:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206153; cv=none; b=QXFYtgRhJ48ZPLc5BpShYLIgmu4MLeR4j/KPKC8xhsyw7hmDZXByzuAD28gmzaFO+o2DNuPwc0F0Q2ro0Z4gAiUFQk2Mntetyjc0dY80NZ2dkxS6Zflo5aQeYUZY73XkUDSVhC5Js9Wi4YxUwA1KqnX42ZM7hLFKCUSwb0iDFiM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206153; c=relaxed/simple; bh=/9KtFaGqmBQ/HF89yDugj2RX7Wg1lEfiRrLmsZyAG4E=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=uPYSgBsunG8kiwhMOT1ps5xJliCkQwt3RQF25uZE+nZACvZniH35+N1ziiHKjyn3/tGdw1I/j18gDe5D/yUP8uBW/2Agh0rG9xfAs506qBQOFcQnYrzdsWONIBIPKlS9QCedDMjFWRBD8vM/IJVvKynwlJqseqFrNJuRjnTHdTI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=XoXLlnzV; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="XoXLlnzV" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 539DgJXm843569 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 9 Apr 2025 08:42:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1744206139; bh=0TIDLuiEOJadSq9UAocGOgimTnMWyC/tjW6yt8Iynfs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=XoXLlnzVCHjSXht/0VqRKYWo1ls3hd3wEl7ocsWbLmSizBH0Qit0VlLycXK7e0R2b 4FNFtN/VxtIJ95MZXZx+9ZV4QY2TUhQ1P9ONbGWjK8NAT3YbDwPqvoiA3K/IIOAij+ W2v8eNZBnrRUgHqezQMu/KYDNwyxTzTTACBT1h2E= Received: from DLEE111.ent.ti.com (dlee111.ent.ti.com [157.170.170.22]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 539DgIIj021441 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Apr 2025 08:42:19 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 9 Apr 2025 08:42:18 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Apr 2025 08:42:18 -0500 Received: from abhilash-HP.dhcp.ti.com (abhilash-hp.dhcp.ti.com [172.24.227.115]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 539DfZvs122297; Wed, 9 Apr 2025 08:42:14 -0500 From: Yemike Abhilash Chandra To: , CC: , , , , , , , , , , , Yemike Abhilash Chandra , Subject: [PATCH v2 6/7] arm64: dts: ti: k3-am62x: Rename I2C switch to I2C mux in IMX219 overlay Date: Wed, 9 Apr 2025 19:11:27 +0530 Message-ID: <20250409134128.2098195-7-y-abhilashchandra@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250409134128.2098195-1-y-abhilashchandra@ti.com> References: <20250409134128.2098195-1-y-abhilashchandra@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The IMX219 device tree overlay incorrectly defined an I2C switch instead of an I2C mux. According to the DT bindings, the correct terminology and node definition should use "i2c-mux" instead of "i2c-switch". Hence, update the same to avoid dtbs_check warnings. Fixes: 4111db03dc05 ("arm64: dts: ti: k3-am62x: Add overlay for IMX219") Cc: stable@vger.kernel.org Signed-off-by: Yemike Abhilash Chandra Reviewed-by: Jai Luthra Reviewed-by: Neha Malcom Francis --- arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso b/arch/arm= 64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso index 7a0d35eb04d3..dd090813a32d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso @@ -22,7 +22,7 @@ &main_i2c2 { #size-cells =3D <0>; status =3D "okay"; =20 - i2c-switch@71 { + i2c-mux@71 { compatible =3D "nxp,pca9543"; #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.34.1 From nobody Mon Feb 9 03:55:44 2026 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3AC05265613; Wed, 9 Apr 2025 13:42:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206161; cv=none; b=TnswMMBDUMgCwOb3o0JcjXerdjgDWR64am0mcHayvKOqhIrE9wOnWLzj2uvoup4G2U61KpoYNPCGXyqM1BKtNFGE0UWe0BrpdhnCFdHps4UVxDSnk6aoYw/o1imZ45/EtIYEW/jVRTCvY3d0Xr4wybYg2yDH0ApfW8JHej8zlaw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744206161; c=relaxed/simple; bh=SbmIfA5pH+hW4F6YNCZhg9bPIQAu+HswRCASMjXW470=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=tAuJKik+x1sWfURFUkxyU2OUQhmL2yvmKOOtneALuLaIDbqAxwkkSjI1XCc60cZMc54L9ji2TZ5BxOG13GHDNO0wvGtLwI5XB5FbD5Y3LYz9pY2Caauenl6fRsev2upPxQaLTsuy0db7W/5BsZQ/VkrcRjQVuNxFBbC1IUSyBBc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=k2rxdcqQ; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="k2rxdcqQ" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 539DgOhb843577 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 9 Apr 2025 08:42:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1744206144; bh=sM6plPBWAZIFYns+UdwR7yCI3bmNKDmbRwLMz5wetM0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=k2rxdcqQOD+x3sBIAqmwBGUQ5MQV++JHLYefjqBUZgyKn/dtaRffij8gXQPxvYBfb mzem86dP7HxbUn1fKhB/9c1Qje5BASc/IsLue44faC5sHnTh/OV24SNIwlxWWSx4TN Z1p9pq5u6LXhb2jA/XeBtOpQf7+VDpz0ZTW87JNs= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 539DgO9U018884 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Apr 2025 08:42:24 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 9 Apr 2025 08:42:24 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Apr 2025 08:42:23 -0500 Received: from abhilash-HP.dhcp.ti.com (abhilash-hp.dhcp.ti.com [172.24.227.115]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 539DfZvt122297; Wed, 9 Apr 2025 08:42:20 -0500 From: Yemike Abhilash Chandra To: , CC: , , , , , , , , , , , Yemike Abhilash Chandra , Subject: [PATCH v2 7/7] arm64: dts: ti: k3-am62x: Rename I2C switch to I2C mux in OV5640 overlay Date: Wed, 9 Apr 2025 19:11:28 +0530 Message-ID: <20250409134128.2098195-8-y-abhilashchandra@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250409134128.2098195-1-y-abhilashchandra@ti.com> References: <20250409134128.2098195-1-y-abhilashchandra@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The OV5640 device tree overlay incorrectly defined an I2C switch instead of an I2C mux. According to the DT bindings, the correct terminology and node definition should use "i2c-mux" instead of "i2c-switch". Hence, update the same to avoid dtbs_check warnings. Fixes: 635ed9715194 ("arm64: dts: ti: k3-am62x: Add overlays for OV5640") Cc: stable@vger.kernel.org Signed-off-by: Yemike Abhilash Chandra Reviewed-by: Jai Luthra Reviewed-by: Neha Malcom Francis --- arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso | 2 +- arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso b/arch/arm= 64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso index ccc7f5e43184..7fc7c95f5cd5 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso @@ -22,7 +22,7 @@ &main_i2c2 { #size-cells =3D <0>; status =3D "okay"; =20 - i2c-switch@71 { + i2c-mux@71 { compatible =3D "nxp,pca9543"; #address-cells =3D <1>; #size-cells =3D <0>; diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso b/arc= h/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso index 4eaf9d757dd0..b6bfdfbbdd98 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso @@ -22,7 +22,7 @@ &main_i2c2 { #size-cells =3D <0>; status =3D "okay"; =20 - i2c-switch@71 { + i2c-mux@71 { compatible =3D "nxp,pca9543"; #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.34.1