From nobody Mon Feb 9 19:09:34 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6746826A1AA; Wed, 9 Apr 2025 13:13:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744204439; cv=none; b=m9G5Mzz9ZXZZWudd88X9JItCQqkfsikn/icK0v7scVDDp8d79eo2QNxWmw4wNtzFamY7NG7c1aSUyJ2Yu9Mlu70fXt6wzATF8XJxtYXjt8aNaNQSK/C+L7SMFWqGEEW0IBcEFsB13cJu5ywh0Mtl+IkbT1RLlgqb+cXW5jndIng= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744204439; c=relaxed/simple; bh=DKHnuRJUAlwbyjb9uAzOm4punRBoYy3B724QNk1kbrY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XenBaCn2Et4LnqVkjyJzHOc5hgvtlTM9W3myE1mjzysk+gI4ZdzfpovcLNkuAEvo2RZ6mI1FJm5qFPlCAYyp/lbjAEYZ6TQohEhGhdLF9a+DpQhWRzUfOa/JilviAoqHmQNiDV/J9jAvY6AUMZV1jAcBoJ7kjT6kujuEsgHAIX8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=VVipOdbK; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="VVipOdbK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1744204435; bh=DKHnuRJUAlwbyjb9uAzOm4punRBoYy3B724QNk1kbrY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VVipOdbKUmMhQIySNhEd0CUVwPtOYUdcnlexEPeTggjvDfwU6YGvEozEn7V/c/Kd8 EnPE56oFJmYHJgtnmC0nh9C4nUBUCYVbef9Kl7qgQ3Z/agkB345VHBtqkB4EPO3sp3 dvdwkINv1Z0OPOp5Qd5irXX1Ojly1FdV1eD0kAywJXjOYNn2CL6oaS1ty/nZzz7LtA y0P07liH6LeAaezRduPuyxh7T36hYOFBpgYketGMwtMVy+KqY9aQjWZxTvqWOOd/SU M39l37K9LN4bwJhrqbiPPEw4H7Em4+0boSMm2a0VMLTlDZWZNoOxe9eM34sGOc5SzP geCI9IBDLuvsw== Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by bali.collaboradmins.com (Postfix) with ESMTPSA id 2F39E17E0809; Wed, 9 Apr 2025 15:13:54 +0200 (CEST) From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, ck.hu@mediatek.com, jitao.shi@mediatek.com, jie.qiu@mediatek.com, junzhi.zhao@mediatek.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, dmitry.baryshkov@linaro.org, lewis.liao@mediatek.com, ives.chenjh@mediatek.com, tommyyl.chen@mediatek.com, jason-jh.lin@mediatek.com Subject: [PATCH v8 20/23] drm/mediatek: mtk_hdmi_common: Add var to enable interlaced modes Date: Wed, 9 Apr 2025 15:13:15 +0200 Message-ID: <20250409131318.108690-21-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250409131318.108690-1-angelogioacchino.delregno@collabora.com> References: <20250409131318.108690-1-angelogioacchino.delregno@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add an interlace_allowed bool member to struct mtk_hdmi_ver_conf which will be used to signal whether interlaced modes are supported by the bridge (in our case, the HDMI IP), and enable it for HDMIv2. Reviewed-by: CK Hu Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_hdmi_common.c | 1 + drivers/gpu/drm/mediatek/mtk_hdmi_common.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c b/drivers/gpu/drm/m= ediatek/mtk_hdmi_common.c index d58752b772e8..9d1b29ddfb8d 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.c @@ -419,6 +419,7 @@ struct mtk_hdmi *mtk_hdmi_common_probe(struct platform_= device *pdev) hdmi->bridge.ddc =3D hdmi->ddc_adpt; hdmi->bridge.vendor =3D "MediaTek"; hdmi->bridge.product =3D "On-Chip HDMI"; + hdmi->bridge.interlace_allowed =3D ver_conf->interlace_allowed; =20 ret =3D devm_drm_bridge_add(dev, &hdmi->bridge); if (ret) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h b/drivers/gpu/drm/m= ediatek/mtk_hdmi_common.h index d3de8afff40f..38d1bdf4c77e 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.h @@ -131,6 +131,7 @@ struct mtk_hdmi_ver_conf { const struct hdmi_codec_ops *codec_ops; const char * const *mtk_hdmi_clock_names; int num_clocks; + bool interlace_allowed; }; =20 struct mtk_hdmi_conf { --=20 2.49.0