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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:29 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:22 +0100 Subject: [PATCH v4 01/32] dt-bindings: mfd: samsung,s2mps11: add s2mpg10 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-1-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 The Samsung S2MPG10 PMIC is similar to the existing PMICs supported by this binding. It is a Power Management IC for mobile applications with buck converters, various LDOs, power meters, RTC, clock outputs, and additional GPIOs interfaces. Unlike other Samsung PMICs, communication is not via I2C, but via the Samsung ACPM firmware, it therefore doesn't need a 'reg' property but needs to be a child of the ACPM firmware node instead. S2MPG10 can also act as a system power controller allowing implementation of a true cold-reset of the system. Support for the other components like regulators and power meters will be added in subsequent future patches. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- v3: * keep 'regulators' subnode required even for s2mpg10 (Krzysztof) v2: * drop ACPM phandle 'exynos,acpm-ipc', and expect this to be a child node of ACPM directly instead * allow, but still don't enforce, regulators subnode, to ease adding it in the future * deny 'reg' property, it's incorrect to optionally have it for S2MPG10 * enforce 'interrupts' or 'interrupts-extended' property. S2MPG10 can not work without. Note this is done as-is using the oneOf, because dtschema's fixups.py doesn't handle this nesting itself --- .../devicetree/bindings/mfd/samsung,s2mps11.yaml | 26 ++++++++++++++++++= +++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml b/D= ocumentation/devicetree/bindings/mfd/samsung,s2mps11.yaml index ac5d0c149796b6a4034b5d4245bfa8be0433cfab..d6b9e29147965b6d8eef786b0fb= 5b5f198ab69ab 100644 --- a/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml +++ b/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml @@ -20,6 +20,7 @@ description: | properties: compatible: enum: + - samsung,s2mpg10-pmic - samsung,s2mps11-pmic - samsung,s2mps13-pmic - samsung,s2mps14-pmic @@ -58,16 +59,39 @@ properties: reset (setting buck voltages to default values). type: boolean =20 + system-power-controller: true + wakeup-source: true =20 required: - compatible - - reg - regulators =20 additionalProperties: false =20 allOf: + - if: + properties: + compatible: + contains: + const: samsung,s2mpg10-pmic + then: + properties: + reg: false + samsung,s2mps11-acokb-ground: false + samsung,s2mps11-wrstbi-ground: false + + oneOf: + - required: [interrupts] + - required: [interrupts-extended] + + else: + properties: + system-power-controller: false + + required: + - reg + - if: properties: compatible: --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ej1-f46.google.com (mail-ej1-f46.google.com [209.85.218.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 648172116F5 for ; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:30 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:23 +0100 Subject: [PATCH v4 02/32] dt-bindings: clock: samsung,s2mps11: add s2mpg10 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-2-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 The Samsung S2MPG10 clock controller is similar to the existing clock controllers supported by this binding. Register offsets / layout are slightly different, so it needs its own compatible. Acked-by: Stephen Boyd Acked-by: Rob Herring (Arm) Signed-off-by: Andr=C3=A9 Draszik --- Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml b= /Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml index d5296e6053a1881650b8e8ff2524ea01689b7395..91d455155a606a60ed2006e5770= 9466ae8d72664 100644 --- a/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml @@ -25,6 +25,7 @@ description: | properties: compatible: enum: + - samsung,s2mpg10-clk - samsung,s2mps11-clk - samsung,s2mps13-clk # S2MPS13 and S2MPS15 - samsung,s2mps14-clk --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ed1-f48.google.com (mail-ed1-f48.google.com [209.85.208.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D4C5C211476 for ; Wed, 9 Apr 2025 20:37:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744231055; cv=none; b=RCnk94F1YXMMYuVVXyplARYtq3c0kPQSfOBwPO4iu71X7e3JYesyI1umKU29soC0I1X4aqGDaNwWEsM5wUcaYFZysVvF8K2pwbcqhtObCY3nyXSv40QxgEj8g1NarisMfsmJujc5GZpiXV5lZDyxhd2joYdWKcHDpDBVji17+Gg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744231055; c=relaxed/simple; bh=oRSZ5ZfkKagzsJyi1Pj0UTKqxcsDGiMKoSYBL2YzZv8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IhGnG2WacswmFPlhxO0zJZMz0eMifLtZzTrS64UeZQ9VlK04+5Fe9vnL2hLPV0RiTz4jhfCep9VGHAmGq3xC2YyYrWJ7qSrQcwLcHw2z+Z4hV01wdf3s47QyUhRVzw7X4zs8f1ltX7MY7ia7FE2qViw3kJKF77po+/QGkkClZos= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=lkI+cqGh; arc=none smtp.client-ip=209.85.208.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="lkI+cqGh" Received: by mail-ed1-f48.google.com with SMTP id 4fb4d7f45d1cf-5e5deb6482cso2257182a12.1 for ; Wed, 09 Apr 2025 13:37:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1744231051; x=1744835851; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=VVnUcLf7rUkhmKcblE8DIPr7Qf/4SKbPpJHYfQM91kU=; b=lkI+cqGho9Bt5fsCYesRDmr15Rx5N4+v9GsyzCGRqVUO0Y6vQHaJC/6NOzjEq/vWR1 7e6XoIBEunx107xEgsEK/iYVGAgAxHwvuMY2ocdaHZCBbpHMnApY8w5S3MgOXdjhSNjn kzKqnX8U5HJ6cjSbQSIbhk9JZmcezgrK6fSxfWiW9aszYAbvKanIdyszCQn5Qj/L8aBA kJTEb6Nf4c/Mpqzqb67qIRmBeedJ2an/0Ij83QTU/zFwvQO1lxj3gPrLq3jPCXC2cnOC uSQ7ebjfDEHXPvFf2kR1wdiKbNH1lKhbOZdjLVjLp7YRkP5nWzCI63Iemj2QgbreO3g+ FOtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744231051; x=1744835851; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VVnUcLf7rUkhmKcblE8DIPr7Qf/4SKbPpJHYfQM91kU=; b=n0DqFfCev1YCY5P+tPPVlOotO2UQrXfG1wEcTGAjYQO81dK97PhmjLbvz53FlQyDBA jJ7mDwUGh1iiFaNGiAGD2MS6RG1pqoCG2rOGDvUBSR7ZY7XJgErcsxB0J7vfTyLYbco9 VgFZfsWhNcVGINC46mTM42mOQ6CLw6i5mg/QVzZIei15z/j5FxQm/8AeERMTYAaaPkIE S3yi/+3RlDq0St22Ssck5D2IaX4p/hzj+75JDF/psljp40TQdP1Slrpy98CCxlvja1we w1iaN9OYU3sPfVocUhvMrPyRLTWDcpnCtLdnMW51oC0wgZilac9s2a4SkyL00gK+yeVd j/mA== X-Forwarded-Encrypted: i=1; AJvYcCXG8bmjPjGuhb7u3IGzIxBZPBMR7vmZk2wvwfqoEM6cRNsb1HuM9cM58DJxHyp8ITd0q2FClK+55A/joRU=@vger.kernel.org X-Gm-Message-State: AOJu0YxGUXfAimwS5THMiPQuqeXvmLOz7dCa+CUUfWeFT1s4GCU9456J 2zNiTNOxYLxjggEJTHHVRod5vL273K4KH+nKgQgOV5R7O2V4zq3u+HDqzAEsjPg= X-Gm-Gg: ASbGncvNuFvTDdF35W6itFTKRMo0uPyiDxyqaP+wT0B5oO1+BsQTtm8DS6G9TvDl+qo ZfBWJzVDY+jFkDxycKzr5CrbdcgMZkIe6j+8kSUsr1dA9DAfRpmYssko+qpVHX+Oz8uveQ2PPhI S9riJNurPFhNtcx+bYi7FoX8Rq0X0m1CqAdEJZ8Oqwif/K+ICpv3o0/0mW7waCQF012gV7yDkqy doc95QXtJeq3z3pAfNp7lyzI9ks+ka3cNf6l8ZFTvjw9cnk8PvFgucuOE+Te/O0vQ9YZtXvdkD8 gQcQFrcs8tl40ROrbmY+MojzMGb7ecovXaKv32M2884sTSQI/zt0jHojT6Y7t7zb7hijc+yld9d e4P9/gui/Z4rG3mtKlgpyJFiHWqQ= X-Google-Smtp-Source: AGHT+IEjKjbyVX1trxn6vhWMEq8SjYl6s0uvLlNF7RYWo3JUaldcMy8toq0oDQoK52nrthEFmj8Kqw== X-Received: by 2002:a17:907:7e8e:b0:ac3:8895:2775 with SMTP id a640c23a62f3a-acabd36b337mr8219466b.13.1744231051032; Wed, 09 Apr 2025 13:37:31 -0700 (PDT) Received: from puffmais.c.googlers.com (40.162.204.35.bc.googleusercontent.com. [35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:30 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:24 +0100 Subject: [PATCH v4 03/32] dt-bindings: firmware: google,gs101-acpm-ipc: add PMIC child node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-3-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 The PMIC is supposed to be a child of ACPM, add it here to describe the connection. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- v3: - drop '$ref' and 'unevaluatedProperties' from pmic subnode, use 'additionalProperties' instead (Krzysztof) - add some regulators to examples since s2mpg10 requires them as of v3 --- .../bindings/firmware/google,gs101-acpm-ipc.yaml | 35 ++++++++++++++++++= ++++ 1 file changed, 35 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-i= pc.yaml b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.= yaml index 2cdad1bbae73bb1795eccf47e1a58e270acd022c..9785aac3b5f34955bbfe2718eec= 48581d050954f 100644 --- a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml +++ b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml @@ -27,6 +27,15 @@ properties: mboxes: maxItems: 1 =20 + pmic: + description: Child node describing the main PMIC. + type: object + additionalProperties: true + + properties: + compatible: + const: samsung,s2mpg10-pmic + shmem: description: List of phandle pointing to the shared memory (SHM) area. The memory @@ -43,8 +52,34 @@ additionalProperties: false =20 examples: - | + #include + power-management { compatible =3D "google,gs101-acpm-ipc"; mboxes =3D <&ap2apm_mailbox>; shmem =3D <&apm_sram>; + + pmic { + compatible =3D "samsung,s2mpg10-pmic"; + interrupts-extended =3D <&gpa0 6 IRQ_TYPE_LEVEL_LOW>; + + regulators { + LDO1 { + regulator-name =3D "vdd_ldo1"; + regulator-min-microvolt =3D <700000>; + regulator-max-microvolt =3D <1300000>; + regulator-always-on; + }; + + // ... + + BUCK1 { + regulator-name =3D "vdd_mif"; + regulator-min-microvolt =3D <450000>; + regulator-max-microvolt =3D <1300000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; }; --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ej1-f42.google.com (mail-ej1-f42.google.com [209.85.218.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 48822211491 for ; Wed, 9 Apr 2025 20:37:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744231056; cv=none; b=HZSwBOxWNsEns9XlJY78rTFqRU7qitt0Rq9xbUY11bzEZFYDZLE0a1L/xVeMGCi2FtzAo+YRhESvtDbepxfXbbHOWkHn5TF96ADf/1+HWzYP2Arb8BHanX7rukgLJrV7wjaBl+NjnAEiQj/hIvvK7T8ulls1nBZqHXTSthDqUGg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744231056; c=relaxed/simple; bh=3e9/UfR1mJvZZf9g38Aa3kwt2igeAl1jk0oAMPkKz/Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hHJfRTMf6izXiDz82KPcYMUtqXbqU1UP+C0I3MZ/sW6tUf887S4UerGEiV2mydyzyDBr3HNdVeqHxY4Ic8a2Olflbph6r9yoHGP7gKNwntdZ1rr/fTaa3Lm8EhQDCOL3Ojm1ncGOWwMtrWv23K74+lbYPVrvJwjr/wlP435fqp4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=Se5rR4KD; arc=none smtp.client-ip=209.85.218.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Se5rR4KD" Received: by mail-ej1-f42.google.com with SMTP id a640c23a62f3a-ac2ab99e16eso26349966b.0 for ; Wed, 09 Apr 2025 13:37:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1744231051; x=1744835851; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=RLmgb19AbWrd/UJeKJUHWxq/eTD9hl5bKw4d7syAvGk=; b=Se5rR4KDuZ+RaRijeUzq96U19GGhw3U4QryetzbJxQrBmGlhP28oQgTEOkOkOGvt56 7i9fvECyqyoDZ1DQDp7Dp6KWtky2tv7QruOhuzycCfvr2m5moBwu6KkB0ZC1oEixlitj AH8DZ5EOssP2uy9C2hD6hRibirf1RsB4D8LDyHE+W3bIk7wPyzTs/atdGwkmdwhdwC5N qKVgRLOjYJji8LuLu2jZkxBSf02/POEHeg43Hb19EmweSGKmLsS/2iMRwr6TJxkBneeR z19Z5dxHvcUvTJJIGE7X0p3o+V2aN5bBv85k5k9C+GJPLl5Td0FysZMbaI1pyCr+hpv5 tpAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744231051; x=1744835851; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RLmgb19AbWrd/UJeKJUHWxq/eTD9hl5bKw4d7syAvGk=; b=jTpoKytKvVGYIEOTXVUMcWPdwO9emyO0L23fA/YPuYgAR9j7TB8ZCA22pQ3kyzyRU1 99iwl8qsWSaf+d0hmqYqF1fX7e0BX29jfhzjMzV2XH3RzAbffcV3mfyMToXFb8qxoBrs aK9+RbTpFNoF5U69wFtmxWDmxN40pUMoEmFaXvIR/n1KIzf75BNT5LCBbn1vxSt+wrDP FtbRfHq4Z2tafgxMBetARlTU45pFONQAxgbesTn2/COpOl+pkMcTHzmdix7PZgRGt8J7 R+vD9LABEgVLKVrSjQ8HxW2ikvtuVJxbpzvc2G9MxlCXcxwlUqvqFztZTQRoapo5mAFd ylaw== X-Forwarded-Encrypted: i=1; AJvYcCU7CuNVgxxQa45KiyrjZhcpz+1w32FG7+zk44OL0vUJ1ZnxVPGJqsvgx9cmrqR49Fewjcf+zXbomKoi+RA=@vger.kernel.org X-Gm-Message-State: AOJu0YzWDgUJLQVpEE+HdUzAuH+yo/+CupOXcxr66FUQOOVc6Qey77FN lynFhApZKPZzyg/68LShckYgJl02H4myjvll3BoNvn7xKlz9jRxDfInWz+fZKL8= X-Gm-Gg: ASbGnctV9GBCrnfe28pX9Fy3sAG2KsjVFSmln1sIyFbuABUfL+1lB+2YH9rs+zKDspY a/SpR0m+VAphTIioi0blZDPJITRJ+rweS7hmiQcdubxDvym2OzNAnborzp4KKQ4j8IDE0yFNp/d TE5VZ5dU4sMqhPkd25BbaoF8/l+ApGDmBhU/cj22Onz9ReFR4/NHmMDjVTbFb/QZavKQzatY/VZ Dt3IXAxlw/8idSVJp8tmTPTaIsn4QC9UJRA89dltebMwFuNWfsiFMdog9sWVb29PN2rkrPeehgo R4UtjPnVfx+M2VojK4iXnnqAlmi2JEGCwpvK6xx8bUKC6vo1PHPr8gakkpnIUHNiiwCVxSWnlwh VjQepW/bH+Vqutrxbrl3eGwOPi0g1wB3LE/5fIw== X-Google-Smtp-Source: AGHT+IH0zvKNuRDAGqLs83RwWCcDR6aym1X5YrwLki7lH6aKqe66Jq6ZWK7rMjqREavabKtC1MlIlw== X-Received: by 2002:a17:907:3d87:b0:ac3:c59a:413e with SMTP id a640c23a62f3a-acabd4dc96dmr8505266b.55.1744231051490; Wed, 09 Apr 2025 13:37:31 -0700 (PDT) Received: from puffmais.c.googlers.com (40.162.204.35.bc.googleusercontent.com. [35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:31 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:25 +0100 Subject: [PATCH v4 04/32] mfd: sec-core: Drop non-existing forward declarations Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-4-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 sec_irq_resume() was removed in commit 6445b84abf91 ("mfd: Add s2mps11 irq driver") and sec_irq_exit() in commit 3dc6f4aaafbe ("mfd: sec: Use devm_mfd_add_devices and devm_regmap_add_irq_chip") while the prototypes were left. They should be removed. Do so. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- include/linux/mfd/samsung/core.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/c= ore.h index f35314458fd22e43fa13034439406bea17a155c9..b7008b50392ab857751b89e0a05= d2c27f6306906 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h @@ -72,8 +72,6 @@ struct sec_pmic_dev { }; =20 int sec_irq_init(struct sec_pmic_dev *sec_pmic); -void sec_irq_exit(struct sec_pmic_dev *sec_pmic); -int sec_irq_resume(struct sec_pmic_dev *sec_pmic); =20 struct sec_platform_data { struct sec_regulator_data *regulators; --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ej1-f47.google.com (mail-ej1-f47.google.com [209.85.218.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDB7E21324E for ; Wed, 9 Apr 2025 20:37:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744231056; cv=none; b=olmqprqOXN6EFOujC2sAPsNtZ28ybh0PqLkxN/ZKmGIW+ahUA0KfhiV9hm511qQDErS+sQl2lQIGaMToiL8HR4is3LrQVXItWZBCnrIAy4q1IQVKFrN8Nphw7pWqgJooHEwCGQE/LaudrHpbWHbeqQB/5X2WZzwz5267VzbnECk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744231056; c=relaxed/simple; bh=G2QuqVnFMg8y2zTjZxdmMu/QnwXErcjNOQU4yV6iUVc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hZCiPx/iSYwJAuf4Pma5ApU/gRfXgOYx7i629KDyCWGtNYFAt1IvfcWj9HkonGu7htg/JSyRZqHgHgOFPn28Vz9HeeQnlzaIeWbmttDw6OBF/K6NtaTxf4Z7uyotCW7GXnApner6VeVEPlsuTB2swFbhNjf+2R0iECMo8aAx0kg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=Q097XvRD; arc=none smtp.client-ip=209.85.218.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Q097XvRD" Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-abbb12bea54so19152166b.0 for ; Wed, 09 Apr 2025 13:37:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1744231052; x=1744835852; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ZJ5xfpPt+Udr2klxgQkLdnjiXALVAMMpe1APzqbpdGM=; b=Q097XvRDDYtMidEVtgtFNl797DkTTk+NQ00daETce3y5PCoVWKI+muJw+lo+4teqyY 1KUrI0+BcePBu66lz0iOkYYbCWmTdAcBtYUinYOtvjIGenbQDd73lntPoFBrq+bzFK9a 2U/nhzV9MLpYhysPPpSWOzZRugSnoG0HkH4utVEOHjiiddrlWI+8qjH8LTDVtw8psZ6H noDfZpIKmyK9wZD+4aDazqwDjDESTI04Dkqn0YR3PcB16T1QJVvE0KTsQqPa71hVOvvI mxIT5ONJ5SX65+kMFTdaPuC69UknBCqfveqV4BTYTOxemX3J2n5HyO75np0j0Zb6eoe5 WMZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744231052; x=1744835852; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZJ5xfpPt+Udr2klxgQkLdnjiXALVAMMpe1APzqbpdGM=; b=Taf4+ymTJ8hALBv/kUaVo3VCmNzAi+IrT8GyzKbc1p9Q/NwwQw0FhqjMZsuR5QziLa 8TJay3ES/F2416pDaCT/ANof0WdhS+sRqLhECrXVRP6lKgwIV7TJlsXgvfG4XLP85+VA RyJLReWPqZBpTiw0N+4zJcD5PlntArtlrFltt0Bmhxz3vkufQnjFatG3q08jhi+Nd1DT NzBomYa7LKaE+ly/QFJ7C9YPvBSerHq7nxWPEevK1xb2IJDCYN1/yxu19ZhHAxOML8tk /s8XsxUWSAC4g6y5xWRVjfTekMM0kcvaeT2ElF2TPZl2/kG7exAwbKezzxNd7ew8hFG/ o95g== X-Forwarded-Encrypted: i=1; AJvYcCUW/3FkR8sb0xx4no25ZeuX4gLC0/YbkEQOk2SHHFp1bJ2Io4a+TiZRlWYRqmoRDnLN2stpFGbCibwprlY=@vger.kernel.org X-Gm-Message-State: AOJu0Yy8K1UHwPGJ0VDmCzJ+eZxac9vvVkdtpiZAUlyvjn8PTR//3liX kheHLWyxtKuBcjYa6GbaI8ZQIKXkh9p+qLDoTGTBQYKauYrUYhK97s57wXOiVX4= X-Gm-Gg: ASbGncvvG2IRWFFEmrIIijqU/pgbadfhpmfVeBDNwsHslHbcr/M73qfqMLFlcSKUXeV nmum7WAbu2S1ierROtNuSDc7NjzNq6MFtScTSGAmn3EJ1dsS1XwCvRcmUciNRcc3PCfbHHuPtDm Gw3wfrYW2Lv+iL+jBrrGH27aUI3vSO/59hNY6FXRxsn4dv31oxGyRElzztsRjZA6yZ9SG93Rowt TAsk64pu4fn/KaGzNzUGDQjo3UihnSZUqsp+UIMjnbZDZHjlEyXrJDBU2pDv993POnI7O7JqMy0 UnGtmPeQztQITt3yC33rLiWxaG8lu863nuZn8m8uVMpKGyS7SxARodCO7pPCn5GH0x5kZE5N01D VVOneGD9H6op+Yd78dr0g6di+PYg= X-Google-Smtp-Source: AGHT+IHjirWHIybtv9mCOYpNHyYmTU6KD1TdSj+7K0HHxN3o9SAgZZYxV6t8b5P0L2dTzB7k1zUW7w== X-Received: by 2002:a17:906:f595:b0:ac2:7cf9:71a0 with SMTP id a640c23a62f3a-acabd3bbf77mr8344766b.48.1744231051972; Wed, 09 Apr 2025 13:37:31 -0700 (PDT) Received: from puffmais.c.googlers.com (40.162.204.35.bc.googleusercontent.com. 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Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- drivers/mfd/sec-core.c | 14 +++++++------- drivers/mfd/sec-irq.c | 5 ++--- 2 files changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c index 3e9b65c988a7f08bf16d3703004a3d60cfcb1c75..e31b3a6fbc8922e04a8bfcb78c8= 5b6dbaf395e37 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-core.c @@ -3,16 +3,10 @@ // Copyright (c) 2012 Samsung Electronics Co., Ltd // http://www.samsung.com =20 -#include -#include -#include #include -#include #include -#include +#include #include -#include -#include #include #include #include @@ -23,7 +17,13 @@ #include #include #include +#include +#include +#include +#include +#include #include +#include =20 static const struct mfd_cell s5m8767_devs[] =3D { { .name =3D "s5m8767-pmic", }, diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 047fc065fcf17f5bde84143d77a46749111ea5b8..5c0d949aa1a20f5538d8baf7a8a= efc1160ffa14c 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -6,9 +6,6 @@ #include #include #include -#include -#include - #include #include #include @@ -16,6 +13,8 @@ #include #include #include +#include +#include =20 static const struct regmap_irq s2mps11_irqs[] =3D { [S2MPS11_IRQ_PWRONF] =3D { --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ej1-f52.google.com (mail-ej1-f52.google.com [209.85.218.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 863DA213E6A for ; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:32 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:27 +0100 Subject: [PATCH v4 06/32] mfd: sec: Update includes to add missing and remove superfluous ones Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-6-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 This driver misses to include some of the respective headers of some of the APIs used. It also includes headers that aren't needed (e.g. due to previous driver rework where includes weren't updated). It is good practice to directly include all headers used, which avoids implicit dependencies and spurious build breakage if someone rearranged headers, as this could cause the implicit includes to be dropped. Include the relevant headers explicitly and drop superfluous ones. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- drivers/mfd/sec-core.c | 7 +++---- drivers/mfd/sec-irq.c | 5 ++++- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c index e31b3a6fbc8922e04a8bfcb78c85b6dbaf395e37..b12020c416aa8bf552f3d3b7829= f6a38a773f674 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-core.c @@ -3,9 +3,9 @@ // Copyright (c) 2012 Samsung Electronics Co., Ltd // http://www.samsung.com =20 +#include #include #include -#include #include #include #include @@ -17,13 +17,12 @@ #include #include #include +#include #include -#include -#include #include +#include #include #include -#include =20 static const struct mfd_cell s5m8767_devs[] =3D { { .name =3D "s5m8767-pmic", }, diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 5c0d949aa1a20f5538d8baf7a8aefc1160ffa14c..3ed2902c3a2634a6ea656d890ec= ea934053bd192 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -3,7 +3,10 @@ // Copyright (c) 2011-2014 Samsung Electronics Co., Ltd // http://www.samsung.com =20 -#include +#include +#include +#include +#include #include #include #include --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ej1-f54.google.com (mail-ej1-f54.google.com [209.85.218.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 62583213E81 for ; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:32 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:28 +0100 Subject: [PATCH v4 07/32] mfd: sec: Move private internal API to internal header Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-7-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 sec_irq_init() is an internal API for the core driver, and doesn't belong into the public header. Due to an upcoming split of the driver into a core and i2c driver, we'll also be adding more internal APIs, which again shouldn't be in the public header. Move it into a new internal include. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- MAINTAINERS | 2 +- drivers/mfd/sec-core.c | 1 + drivers/mfd/sec-core.h | 15 +++++++++++++++ drivers/mfd/sec-irq.c | 1 + include/linux/mfd/samsung/core.h | 2 -- 5 files changed, 18 insertions(+), 3 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 322ee00547f6e494a96d2495092f72148da22bd0..d4d577b54d798938b7a8ff0c2bd= bd0b61f87650f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21407,7 +21407,7 @@ F: Documentation/devicetree/bindings/mfd/samsung,s5= m*.yaml F: Documentation/devicetree/bindings/regulator/samsung,s2m*.yaml F: Documentation/devicetree/bindings/regulator/samsung,s5m*.yaml F: drivers/clk/clk-s2mps11.c -F: drivers/mfd/sec*.c +F: drivers/mfd/sec*.[ch] F: drivers/regulator/s2m*.c F: drivers/regulator/s5m*.c F: drivers/rtc/rtc-s5m.c diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c index b12020c416aa8bf552f3d3b7829f6a38a773f674..83693686567df61b5e09f7129dc= 6b01d69156ff3 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-core.c @@ -23,6 +23,7 @@ #include #include #include +#include "sec-core.h" =20 static const struct mfd_cell s5m8767_devs[] =3D { { .name =3D "s5m8767-pmic", }, diff --git a/drivers/mfd/sec-core.h b/drivers/mfd/sec-core.h new file mode 100644 index 0000000000000000000000000000000000000000..b3fded5f02a0ddc09a9508fd49a= 5d335f7ad0ee7 --- /dev/null +++ b/drivers/mfd/sec-core.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2012 Samsung Electronics Co., Ltd + * http://www.samsung.com + * Copyright 2025 Linaro Ltd. + * + * Samsung SxM core driver internal data + */ + +#ifndef __SEC_CORE_INT_H +#define __SEC_CORE_INT_H + +int sec_irq_init(struct sec_pmic_dev *sec_pmic); + +#endif /* __SEC_CORE_INT_H */ diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 3ed2902c3a2634a6ea656d890ecea934053bd192..4d49bb42bd0d109263f485c8b58= e88cdd8d598d9 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -18,6 +18,7 @@ #include #include #include +#include "sec-core.h" =20 static const struct regmap_irq s2mps11_irqs[] =3D { [S2MPS11_IRQ_PWRONF] =3D { diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/c= ore.h index b7008b50392ab857751b89e0a05d2c27f6306906..8a4e660854bbc955b812b4d61d4= a52a0fc2f2899 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h @@ -71,8 +71,6 @@ struct sec_pmic_dev { struct regmap_irq_chip_data *irq_data; }; =20 -int sec_irq_init(struct sec_pmic_dev *sec_pmic); - struct sec_platform_data { struct sec_regulator_data *regulators; struct sec_opmode_data *opmode; --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ej1-f49.google.com (mail-ej1-f49.google.com [209.85.218.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C2C9121421A for ; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:33 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:29 +0100 Subject: [PATCH v4 08/32] mfd: sec: Split into core and transport (i2c) drivers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-8-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 As a preparation for adding support for Samsung's S2MPG10, which is connected via SPEEDY / ACPM rather than I2C, split out (move) all I2C-specific driver code into its own kernel module, sec-i2c, and make the existing sec-core module be just the transport-agnostic core driver kernel module. At the same time, update all defconfigs that reference the old kconfig symbol name. While at it, also update file header comments and module description(s) to drop references to 'mfd', and update comments to be C-style, not C++. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- Note: checkpatch complains about missing help for MFD_SEC_I2C here, but that's a false-positive due to patch context. It also suggests to update MAINTAINERS, but the new file is covered already due to using a wildcard. v2: * split MODULE_AUTHOR update out of this patch (Krzysztof) * keep DT parsing in core, not in transport driver (sec_pmic_i2c_parse_dt_pdata / sec_pmic_parse_dt_pdata) * merge defconfig updates into this patch (Krzysztof) --- arch/arm/configs/exynos_defconfig | 2 +- arch/arm/configs/multi_v7_defconfig | 2 +- arch/arm/configs/pxa_defconfig | 2 +- arch/arm64/configs/defconfig | 2 +- drivers/mfd/Kconfig | 18 ++- drivers/mfd/Makefile | 1 + drivers/mfd/sec-core.c | 247 +++++---------------------------= ---- drivers/mfd/sec-core.h | 9 ++ drivers/mfd/sec-i2c.c | 231 +++++++++++++++++++++++++++++++++ 9 files changed, 287 insertions(+), 227 deletions(-) diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_de= fconfig index 7ad48fdda1dac69a4a9612eabb573729bed7b3a6..251f45be6c14af59263373f21b2= 7b15f42ec7f61 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -167,7 +167,7 @@ CONFIG_MFD_MAX77686=3Dy CONFIG_MFD_MAX77693=3Dy CONFIG_MFD_MAX8997=3Dy CONFIG_MFD_MAX8998=3Dy -CONFIG_MFD_SEC_CORE=3Dy +CONFIG_MFD_SEC_I2C=3Dy CONFIG_MFD_STMPE=3Dy CONFIG_STMPE_I2C=3Dy CONFIG_MFD_TPS65090=3Dy diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v= 7_defconfig index ad037c175fdb0ec8601c9b3607aca0c0e5f3c145..7d06ac5369b1a2f325462f2cf5b= 54fe22061ca77 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -612,7 +612,7 @@ CONFIG_MFD_QCOM_RPM=3Dy CONFIG_MFD_SPMI_PMIC=3Dy CONFIG_MFD_RK8XX_I2C=3Dy CONFIG_MFD_RN5T618=3Dy -CONFIG_MFD_SEC_CORE=3Dy +CONFIG_MFD_SEC_I2C=3Dy CONFIG_MFD_STMPE=3Dy CONFIG_MFD_PALMAS=3Dy CONFIG_MFD_TPS65090=3Dy diff --git a/arch/arm/configs/pxa_defconfig b/arch/arm/configs/pxa_defconfig index de0ac8f521d7612704ce327e9ac16ab9e999f3d3..064e79baf20da809c9ab1f1fa18= 282aaba11a41f 100644 --- a/arch/arm/configs/pxa_defconfig +++ b/arch/arm/configs/pxa_defconfig @@ -335,7 +335,7 @@ CONFIG_MFD_MAX77693=3Dy CONFIG_MFD_MAX8907=3Dm CONFIG_EZX_PCAP=3Dy CONFIG_UCB1400_CORE=3Dm -CONFIG_MFD_SEC_CORE=3Dy +CONFIG_MFD_SEC_I2C=3Dy CONFIG_MFD_PALMAS=3Dy CONFIG_MFD_TPS65090=3Dy CONFIG_MFD_TPS6586X=3Dy diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 5bb8f09422a22116781169611482179b10798c14..f021fb29683be1a10720d7e6415= daea771647879 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -769,7 +769,7 @@ CONFIG_MFD_MT6397=3Dy CONFIG_MFD_SPMI_PMIC=3Dy CONFIG_MFD_RK8XX_I2C=3Dy CONFIG_MFD_RK8XX_SPI=3Dy -CONFIG_MFD_SEC_CORE=3Dy +CONFIG_MFD_SEC_I2C=3Dy CONFIG_MFD_SL28CPLD=3Dy CONFIG_RZ_MTU3=3Dy CONFIG_MFD_TI_AM335X_TSCADC=3Dm diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 22b93631003943c393d9fe704748bc23f1905397..62565dc89ec6d58611bbc1f31c6= 5f757343b6453 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1292,21 +1292,25 @@ config MFD_RN5T618 functionality of the device. =20 config MFD_SEC_CORE - tristate "Samsung Electronics PMIC Series Support" + tristate + select MFD_CORE + select REGMAP_IRQ + +config MFD_SEC_I2C + tristate "Samsung Electronics S2MPA/S2MPS1X/S2MPU/S5M series PMICs" depends on I2C=3Dy depends on OF - select MFD_CORE + select MFD_SEC_CORE select REGMAP_I2C - select REGMAP_IRQ help - Support for the Samsung Electronics PMIC devices coming - usually along with Samsung Exynos SoC chipset. + Support for the Samsung Electronics PMIC devices with I2C interface + coming usually along with Samsung Exynos SoC chipset. This driver provides common support for accessing the device, additional drivers must be enabled in order to use the functionality - of the device + of the device. =20 To compile this driver as a module, choose M here: the - module will be called sec-core. + module will be called sec-i2c. Have in mind that important core drivers (like regulators) depend on this driver so building this as a module might require proper initial ramdisk or might not boot up as well in certain scenarios. diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 948cbdf42a18b22a826f0b17fb8d5796a7ec8ba6..ab6c4b17a391946d4c88f52ccbf= ee5424b4fb2d2 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -229,6 +229,7 @@ obj-$(CONFIG_MFD_RK8XX_I2C) +=3D rk8xx-i2c.o obj-$(CONFIG_MFD_RK8XX_SPI) +=3D rk8xx-spi.o obj-$(CONFIG_MFD_RN5T618) +=3D rn5t618.o obj-$(CONFIG_MFD_SEC_CORE) +=3D sec-core.o sec-irq.o +obj-$(CONFIG_MFD_SEC_I2C) +=3D sec-i2c.o obj-$(CONFIG_MFD_SYSCON) +=3D syscon.o obj-$(CONFIG_MFD_LM3533) +=3D lm3533-core.o lm3533-ctrlbank.o obj-$(CONFIG_MFD_VEXPRESS_SYSREG) +=3D vexpress-sysreg.o diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c index 83693686567df61b5e09f7129dc6b01d69156ff3..bb664e052bf5198f2fc83a86bd6= e1e72364fb8df 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-core.c @@ -1,23 +1,21 @@ // SPDX-License-Identifier: GPL-2.0+ -// -// Copyright (c) 2012 Samsung Electronics Co., Ltd -// http://www.samsung.com +/* + * Copyright 2012 Samsung Electronics Co., Ltd + * http://www.samsung.com + * Copyright 2025 Linaro Ltd. + * + * Samsung SxM core driver + */ =20 #include #include -#include +#include #include #include #include #include -#include #include #include -#include -#include -#include -#include -#include #include #include #include @@ -88,144 +86,6 @@ static const struct mfd_cell s2mpu05_devs[] =3D { { .name =3D "s2mps15-rtc", }, }; =20 -static const struct of_device_id sec_dt_match[] =3D { - { - .compatible =3D "samsung,s5m8767-pmic", - .data =3D (void *)S5M8767X, - }, { - .compatible =3D "samsung,s2dos05", - .data =3D (void *)S2DOS05, - }, { - .compatible =3D "samsung,s2mps11-pmic", - .data =3D (void *)S2MPS11X, - }, { - .compatible =3D "samsung,s2mps13-pmic", - .data =3D (void *)S2MPS13X, - }, { - .compatible =3D "samsung,s2mps14-pmic", - .data =3D (void *)S2MPS14X, - }, { - .compatible =3D "samsung,s2mps15-pmic", - .data =3D (void *)S2MPS15X, - }, { - .compatible =3D "samsung,s2mpa01-pmic", - .data =3D (void *)S2MPA01, - }, { - .compatible =3D "samsung,s2mpu02-pmic", - .data =3D (void *)S2MPU02, - }, { - .compatible =3D "samsung,s2mpu05-pmic", - .data =3D (void *)S2MPU05, - }, { - /* Sentinel */ - }, -}; -MODULE_DEVICE_TABLE(of, sec_dt_match); - -static bool s2mpa01_volatile(struct device *dev, unsigned int reg) -{ - switch (reg) { - case S2MPA01_REG_INT1M: - case S2MPA01_REG_INT2M: - case S2MPA01_REG_INT3M: - return false; - default: - return true; - } -} - -static bool s2mps11_volatile(struct device *dev, unsigned int reg) -{ - switch (reg) { - case S2MPS11_REG_INT1M: - case S2MPS11_REG_INT2M: - case S2MPS11_REG_INT3M: - return false; - default: - return true; - } -} - -static bool s2mpu02_volatile(struct device *dev, unsigned int reg) -{ - switch (reg) { - case S2MPU02_REG_INT1M: - case S2MPU02_REG_INT2M: - case S2MPU02_REG_INT3M: - return false; - default: - return true; - } -} - -static const struct regmap_config sec_regmap_config =3D { - .reg_bits =3D 8, - .val_bits =3D 8, -}; - -static const struct regmap_config s2mpa01_regmap_config =3D { - .reg_bits =3D 8, - .val_bits =3D 8, - - .max_register =3D S2MPA01_REG_LDO_OVCB4, - .volatile_reg =3D s2mpa01_volatile, - .cache_type =3D REGCACHE_FLAT, -}; - -static const struct regmap_config s2mps11_regmap_config =3D { - .reg_bits =3D 8, - .val_bits =3D 8, - - .max_register =3D S2MPS11_REG_L38CTRL, - .volatile_reg =3D s2mps11_volatile, - .cache_type =3D REGCACHE_FLAT, -}; - -static const struct regmap_config s2mps13_regmap_config =3D { - .reg_bits =3D 8, - .val_bits =3D 8, - - .max_register =3D S2MPS13_REG_LDODSCH5, - .volatile_reg =3D s2mps11_volatile, - .cache_type =3D REGCACHE_FLAT, -}; - -static const struct regmap_config s2mps14_regmap_config =3D { - .reg_bits =3D 8, - .val_bits =3D 8, - - .max_register =3D S2MPS14_REG_LDODSCH3, - .volatile_reg =3D s2mps11_volatile, - .cache_type =3D REGCACHE_FLAT, -}; - -static const struct regmap_config s2mps15_regmap_config =3D { - .reg_bits =3D 8, - .val_bits =3D 8, - - .max_register =3D S2MPS15_REG_LDODSCH4, - .volatile_reg =3D s2mps11_volatile, - .cache_type =3D REGCACHE_FLAT, -}; - -static const struct regmap_config s2mpu02_regmap_config =3D { - .reg_bits =3D 8, - .val_bits =3D 8, - - .max_register =3D S2MPU02_REG_DVSDATA, - .volatile_reg =3D s2mpu02_volatile, - .cache_type =3D REGCACHE_FLAT, -}; - -static const struct regmap_config s5m8767_regmap_config =3D { - .reg_bits =3D 8, - .val_bits =3D 8, - - .max_register =3D S5M8767_REG_LDO28CTRL, - .volatile_reg =3D s2mps11_volatile, - .cache_type =3D REGCACHE_FLAT, -}; - static void sec_pmic_dump_rev(struct sec_pmic_dev *sec_pmic) { unsigned int val; @@ -268,7 +128,7 @@ static void sec_pmic_configure(struct sec_pmic_dev *sec= _pmic) * platform data. */ static struct sec_platform_data * -sec_pmic_i2c_parse_dt_pdata(struct device *dev) +sec_pmic_parse_dt_pdata(struct device *dev) { struct sec_platform_data *pd; =20 @@ -283,68 +143,34 @@ sec_pmic_i2c_parse_dt_pdata(struct device *dev) return pd; } =20 -static int sec_pmic_probe(struct i2c_client *i2c) +int sec_pmic_probe(struct device *dev, unsigned long device_type, + unsigned int irq, struct regmap *regmap, + struct i2c_client *client) { - const struct regmap_config *regmap; struct sec_platform_data *pdata; const struct mfd_cell *sec_devs; struct sec_pmic_dev *sec_pmic; int ret, num_sec_devs; =20 - sec_pmic =3D devm_kzalloc(&i2c->dev, sizeof(struct sec_pmic_dev), - GFP_KERNEL); + sec_pmic =3D devm_kzalloc(dev, sizeof(struct sec_pmic_dev), GFP_KERNEL); if (sec_pmic =3D=3D NULL) return -ENOMEM; =20 - i2c_set_clientdata(i2c, sec_pmic); - sec_pmic->dev =3D &i2c->dev; - sec_pmic->i2c =3D i2c; - sec_pmic->irq =3D i2c->irq; + dev_set_drvdata(dev, sec_pmic); + sec_pmic->dev =3D dev; + sec_pmic->device_type =3D device_type; + sec_pmic->i2c =3D client; + sec_pmic->irq =3D irq; + sec_pmic->regmap_pmic =3D regmap; =20 - pdata =3D sec_pmic_i2c_parse_dt_pdata(sec_pmic->dev); + pdata =3D sec_pmic_parse_dt_pdata(sec_pmic->dev); if (IS_ERR(pdata)) { ret =3D PTR_ERR(pdata); return ret; } =20 - sec_pmic->device_type =3D (unsigned long)of_device_get_match_data(sec_pmi= c->dev); sec_pmic->pdata =3D pdata; =20 - switch (sec_pmic->device_type) { - case S2MPA01: - regmap =3D &s2mpa01_regmap_config; - break; - case S2MPS11X: - regmap =3D &s2mps11_regmap_config; - break; - case S2MPS13X: - regmap =3D &s2mps13_regmap_config; - break; - case S2MPS14X: - regmap =3D &s2mps14_regmap_config; - break; - case S2MPS15X: - regmap =3D &s2mps15_regmap_config; - break; - case S5M8767X: - regmap =3D &s5m8767_regmap_config; - break; - case S2MPU02: - regmap =3D &s2mpu02_regmap_config; - break; - default: - regmap =3D &sec_regmap_config; - break; - } - - sec_pmic->regmap_pmic =3D devm_regmap_init_i2c(i2c, regmap); - if (IS_ERR(sec_pmic->regmap_pmic)) { - ret =3D PTR_ERR(sec_pmic->regmap_pmic); - dev_err(&i2c->dev, "Failed to allocate register map: %d\n", - ret); - return ret; - } - sec_irq_init(sec_pmic); =20 pm_runtime_set_active(sec_pmic->dev); @@ -387,9 +213,9 @@ static int sec_pmic_probe(struct i2c_client *i2c) num_sec_devs =3D ARRAY_SIZE(s2mpu05_devs); break; default: - dev_err(&i2c->dev, "Unsupported device type (%lu)\n", + dev_err(sec_pmic->dev, "Unsupported device type %lu\n", sec_pmic->device_type); - return -ENODEV; + return -EINVAL; } ret =3D devm_mfd_add_devices(sec_pmic->dev, -1, sec_devs, num_sec_devs, NULL, 0, NULL); @@ -401,10 +227,11 @@ static int sec_pmic_probe(struct i2c_client *i2c) =20 return ret; } +EXPORT_SYMBOL_GPL(sec_pmic_probe); =20 -static void sec_pmic_shutdown(struct i2c_client *i2c) +void sec_pmic_shutdown(struct device *dev) { - struct sec_pmic_dev *sec_pmic =3D i2c_get_clientdata(i2c); + struct sec_pmic_dev *sec_pmic =3D dev_get_drvdata(dev); unsigned int reg, mask; =20 if (!sec_pmic->pdata->manual_poweroff) @@ -428,11 +255,11 @@ static void sec_pmic_shutdown(struct i2c_client *i2c) =20 regmap_update_bits(sec_pmic->regmap_pmic, reg, mask, 0); } +EXPORT_SYMBOL_GPL(sec_pmic_shutdown); =20 static int sec_pmic_suspend(struct device *dev) { - struct i2c_client *i2c =3D to_i2c_client(dev); - struct sec_pmic_dev *sec_pmic =3D i2c_get_clientdata(i2c); + struct sec_pmic_dev *sec_pmic =3D dev_get_drvdata(dev); =20 if (device_may_wakeup(dev)) enable_irq_wake(sec_pmic->irq); @@ -452,8 +279,7 @@ static int sec_pmic_suspend(struct device *dev) =20 static int sec_pmic_resume(struct device *dev) { - struct i2c_client *i2c =3D to_i2c_client(dev); - struct sec_pmic_dev *sec_pmic =3D i2c_get_clientdata(i2c); + struct sec_pmic_dev *sec_pmic =3D dev_get_drvdata(dev); =20 if (device_may_wakeup(dev)) disable_irq_wake(sec_pmic->irq); @@ -462,20 +288,9 @@ static int sec_pmic_resume(struct device *dev) return 0; } =20 -static DEFINE_SIMPLE_DEV_PM_OPS(sec_pmic_pm_ops, - sec_pmic_suspend, sec_pmic_resume); - -static struct i2c_driver sec_pmic_driver =3D { - .driver =3D { - .name =3D "sec_pmic", - .pm =3D pm_sleep_ptr(&sec_pmic_pm_ops), - .of_match_table =3D sec_dt_match, - }, - .probe =3D sec_pmic_probe, - .shutdown =3D sec_pmic_shutdown, -}; -module_i2c_driver(sec_pmic_driver); +DEFINE_SIMPLE_DEV_PM_OPS(sec_pmic_pm_ops, sec_pmic_suspend, sec_pmic_resum= e); +EXPORT_SYMBOL_GPL(sec_pmic_pm_ops); =20 MODULE_AUTHOR("Sangbeom Kim "); -MODULE_DESCRIPTION("Core support for the S5M MFD"); +MODULE_DESCRIPTION("Core driver for the Samsung S5M"); MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/sec-core.h b/drivers/mfd/sec-core.h index b3fded5f02a0ddc09a9508fd49a5d335f7ad0ee7..a0a3488924d96f69373e7569079= cfefd0544ca26 100644 --- a/drivers/mfd/sec-core.h +++ b/drivers/mfd/sec-core.h @@ -10,6 +10,15 @@ #ifndef __SEC_CORE_INT_H #define __SEC_CORE_INT_H =20 +struct i2c_client; + +extern const struct dev_pm_ops sec_pmic_pm_ops; + +int sec_pmic_probe(struct device *dev, unsigned long device_type, + unsigned int irq, struct regmap *regmap, + struct i2c_client *client); +void sec_pmic_shutdown(struct device *dev); + int sec_irq_init(struct sec_pmic_dev *sec_pmic); =20 #endif /* __SEC_CORE_INT_H */ diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c new file mode 100644 index 0000000000000000000000000000000000000000..8e3a365ff3e5533e27d94fa8a15= dbfa639518a5f --- /dev/null +++ b/drivers/mfd/sec-i2c.c @@ -0,0 +1,231 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2012 Samsung Electronics Co., Ltd + * http://www.samsung.com + * Copyright 2025 Linaro Ltd. + * + * Samsung SxM I2C driver + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "sec-core.h" + +static bool s2mpa01_volatile(struct device *dev, unsigned int reg) +{ + switch (reg) { + case S2MPA01_REG_INT1M: + case S2MPA01_REG_INT2M: + case S2MPA01_REG_INT3M: + return false; + default: + return true; + } +} + +static bool s2mps11_volatile(struct device *dev, unsigned int reg) +{ + switch (reg) { + case S2MPS11_REG_INT1M: + case S2MPS11_REG_INT2M: + case S2MPS11_REG_INT3M: + return false; + default: + return true; + } +} + +static bool s2mpu02_volatile(struct device *dev, unsigned int reg) +{ + switch (reg) { + case S2MPU02_REG_INT1M: + case S2MPU02_REG_INT2M: + case S2MPU02_REG_INT3M: + return false; + default: + return true; + } +} + +static const struct regmap_config sec_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, +}; + +static const struct regmap_config s2mpa01_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + + .max_register =3D S2MPA01_REG_LDO_OVCB4, + .volatile_reg =3D s2mpa01_volatile, + .cache_type =3D REGCACHE_FLAT, +}; + +static const struct regmap_config s2mps11_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + + .max_register =3D S2MPS11_REG_L38CTRL, + .volatile_reg =3D s2mps11_volatile, + .cache_type =3D REGCACHE_FLAT, +}; + +static const struct regmap_config s2mps13_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + + .max_register =3D S2MPS13_REG_LDODSCH5, + .volatile_reg =3D s2mps11_volatile, + .cache_type =3D REGCACHE_FLAT, +}; + +static const struct regmap_config s2mps14_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + + .max_register =3D S2MPS14_REG_LDODSCH3, + .volatile_reg =3D s2mps11_volatile, + .cache_type =3D REGCACHE_FLAT, +}; + +static const struct regmap_config s2mps15_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + + .max_register =3D S2MPS15_REG_LDODSCH4, + .volatile_reg =3D s2mps11_volatile, + .cache_type =3D REGCACHE_FLAT, +}; + +static const struct regmap_config s2mpu02_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + + .max_register =3D S2MPU02_REG_DVSDATA, + .volatile_reg =3D s2mpu02_volatile, + .cache_type =3D REGCACHE_FLAT, +}; + +static const struct regmap_config s5m8767_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + + .max_register =3D S5M8767_REG_LDO28CTRL, + .volatile_reg =3D s2mps11_volatile, + .cache_type =3D REGCACHE_FLAT, +}; + +static int sec_pmic_i2c_probe(struct i2c_client *client) +{ + const struct regmap_config *regmap; + unsigned long device_type; + struct regmap *regmap_pmic; + int ret; + + device_type =3D (unsigned long)of_device_get_match_data(&client->dev); + + switch (device_type) { + case S2MPA01: + regmap =3D &s2mpa01_regmap_config; + break; + case S2MPS11X: + regmap =3D &s2mps11_regmap_config; + break; + case S2MPS13X: + regmap =3D &s2mps13_regmap_config; + break; + case S2MPS14X: + regmap =3D &s2mps14_regmap_config; + break; + case S2MPS15X: + regmap =3D &s2mps15_regmap_config; + break; + case S5M8767X: + regmap =3D &s5m8767_regmap_config; + break; + case S2MPU02: + regmap =3D &s2mpu02_regmap_config; + break; + default: + regmap =3D &sec_regmap_config; + break; + } + + regmap_pmic =3D devm_regmap_init_i2c(client, regmap); + if (IS_ERR(regmap_pmic)) { + ret =3D PTR_ERR(regmap_pmic); + dev_err(&client->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + return sec_pmic_probe(&client->dev, device_type, client->irq, + regmap_pmic, client); +} + +static void sec_pmic_i2c_shutdown(struct i2c_client *i2c) +{ + sec_pmic_shutdown(&i2c->dev); +} + +static const struct of_device_id sec_pmic_i2c_of_match[] =3D { + { + .compatible =3D "samsung,s5m8767-pmic", + .data =3D (void *)S5M8767X, + }, { + .compatible =3D "samsung,s2dos05", + .data =3D (void *)S2DOS05, + }, { + .compatible =3D "samsung,s2mps11-pmic", + .data =3D (void *)S2MPS11X, + }, { + .compatible =3D "samsung,s2mps13-pmic", + .data =3D (void *)S2MPS13X, + }, { + .compatible =3D "samsung,s2mps14-pmic", + .data =3D (void *)S2MPS14X, + }, { + .compatible =3D "samsung,s2mps15-pmic", + .data =3D (void *)S2MPS15X, + }, { + .compatible =3D "samsung,s2mpa01-pmic", + .data =3D (void *)S2MPA01, + }, { + .compatible =3D "samsung,s2mpu02-pmic", + .data =3D (void *)S2MPU02, + }, { + .compatible =3D "samsung,s2mpu05-pmic", + .data =3D (void *)S2MPU05, + }, + { }, +}; +MODULE_DEVICE_TABLE(of, sec_pmic_i2c_of_match); + +static struct i2c_driver sec_pmic_i2c_driver =3D { + .driver =3D { + .name =3D "sec-pmic-i2c", + .pm =3D pm_sleep_ptr(&sec_pmic_pm_ops), + .of_match_table =3D sec_pmic_i2c_of_match, + }, + .probe =3D sec_pmic_i2c_probe, + .shutdown =3D sec_pmic_i2c_shutdown, +}; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:33 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:30 +0100 Subject: [PATCH v4 09/32] mfd: sec: Add support for S2MPG10 PMIC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-9-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Add support for Samsung's S2MPG10 PMIC, which is a Power Management IC for mobile applications with buck converters, various LDOs, power meters, RTC, clock outputs, and additional GPIOs interfaces. Contrary to existing Samsung S2M series PMICs supported, communication is not via I2C, but via the Samsung ACPM firmware. This commit adds the core driver. Signed-off-by: Andr=C3=A9 Draszik --- Checkpatch suggests to update MAINTAINERS, but the new file is covered already due to using a wildcard. v4: - Lee: - consistently start comments with upper case - use up to 100 chars wide lines throughout - add more comments to regmap ranges - introduce ACPM_ADDR_BITS and use where appropriate (regmap config, sec_pmic_acpm_bus_write(), sec_pmic_acpm_bus_read() - use dev_err_cast_probe() & dev_err_ptr_probe() v3: * use an enum for struct sec_acpm_bus_context::type * consistent name space for all functions sec_pmic_acpm_... to be similar to i2c and consistent in this file v2: * update to using devm_acpm_get_by_node() instead of devm_acpm_get_by_phandle() as this is now expected to be a child of the ACPM node * use c-type file header * updates to error messages * drop s2mpg10_rtc_wr_table as everything in RTC is writeable * rename s2mpg10_volatile_registers -> s2mpg10_rtc_volatile_registers * fix incorrect regmap range in common block * add comments to regmap ranges * add all registers to header for all IP blocks --- drivers/mfd/Kconfig | 17 ++ drivers/mfd/Makefile | 1 + drivers/mfd/sec-acpm.c | 442 ++++++++++++++++++++++++++++++++= +++ drivers/mfd/sec-core.c | 16 ++ drivers/mfd/sec-irq.c | 68 ++++++ include/linux/mfd/samsung/core.h | 1 + include/linux/mfd/samsung/irq.h | 103 ++++++++ include/linux/mfd/samsung/rtc.h | 37 +++ include/linux/mfd/samsung/s2mpg10.h | 454 ++++++++++++++++++++++++++++++++= ++++ 9 files changed, 1139 insertions(+) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 62565dc89ec6d58611bbc1f31c65f757343b6453..e146b28240e731557f34ebe6dea= 99016b6d19f6b 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1296,6 +1296,23 @@ config MFD_SEC_CORE select MFD_CORE select REGMAP_IRQ =20 +config MFD_SEC_ACPM + tristate "Samsung Electronics S2MPG1x PMICs" + depends on EXYNOS_ACPM_PROTOCOL + depends on OF + select MFD_SEC_CORE + help + Support for the Samsung Electronics PMICs with ACPM interface. + This is a Power Management IC for mobile applications with buck + converters, various LDOs, power meters, RTC, clock outputs, and + additional GPIOs interfaces. + This driver provides common support for accessing the device; + additional drivers must be enabled in order to use the functionality + of the device. + + To compile this driver as a module, choose M here: the module will be + called sec-acpm. + config MFD_SEC_I2C tristate "Samsung Electronics S2MPA/S2MPS1X/S2MPU/S5M series PMICs" depends on I2C=3Dy diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index ab6c4b17a391946d4c88f52ccbfee5424b4fb2d2..b617782eca436e34084a9cd24c3= 09801c5680390 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -229,6 +229,7 @@ obj-$(CONFIG_MFD_RK8XX_I2C) +=3D rk8xx-i2c.o obj-$(CONFIG_MFD_RK8XX_SPI) +=3D rk8xx-spi.o obj-$(CONFIG_MFD_RN5T618) +=3D rn5t618.o obj-$(CONFIG_MFD_SEC_CORE) +=3D sec-core.o sec-irq.o +obj-$(CONFIG_MFD_SEC_ACPM) +=3D sec-acpm.o obj-$(CONFIG_MFD_SEC_I2C) +=3D sec-i2c.o obj-$(CONFIG_MFD_SYSCON) +=3D syscon.o obj-$(CONFIG_MFD_LM3533) +=3D lm3533-core.o lm3533-ctrlbank.o diff --git a/drivers/mfd/sec-acpm.c b/drivers/mfd/sec-acpm.c new file mode 100644 index 0000000000000000000000000000000000000000..8b31c816d65b86c54a108fa9943= 84abfac0e7da4 --- /dev/null +++ b/drivers/mfd/sec-acpm.c @@ -0,0 +1,442 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright 2020 Google Inc + * Copyright 2025 Linaro Ltd. + * + * Samsung S2MPG1x ACPM driver + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "sec-core.h" + +#define ACPM_ADDR_BITS 8 +#define ACPM_MAX_BULK_DATA 8 + +struct sec_pmic_acpm_platform_data { + int device_type; + + unsigned int acpm_chan_id; + u8 speedy_channel; + + const struct regmap_config *regmap_cfg_common; + const struct regmap_config *regmap_cfg_pmic; + const struct regmap_config *regmap_cfg_rtc; + const struct regmap_config *regmap_cfg_meter; +}; + +static const struct regmap_range s2mpg10_common_registers[] =3D { + regmap_reg_range(0x00, 0x02), /* CHIP_ID_M, INT, INT_MASK */ + regmap_reg_range(0x0a, 0x0c), /* Speedy control */ + regmap_reg_range(0x1a, 0x2a), /* Debug */ +}; + +static const struct regmap_range s2mpg10_common_ro_registers[] =3D { + regmap_reg_range(0x00, 0x01), /* CHIP_ID_M, INT */ + regmap_reg_range(0x28, 0x2a), /* Debug */ +}; + +static const struct regmap_range s2mpg10_common_nonvolatile_registers[] = =3D { + regmap_reg_range(0x00, 0x00), /* CHIP_ID_M */ + regmap_reg_range(0x02, 0x02), /* INT_MASK */ + regmap_reg_range(0x0a, 0x0c), /* Speedy control */ +}; + +static const struct regmap_range s2mpg10_common_precious_registers[] =3D { + regmap_reg_range(0x01, 0x01), /* INT */ +}; + +static const struct regmap_access_table s2mpg10_common_wr_table =3D { + .yes_ranges =3D s2mpg10_common_registers, + .n_yes_ranges =3D ARRAY_SIZE(s2mpg10_common_registers), + .no_ranges =3D s2mpg10_common_ro_registers, + .n_no_ranges =3D ARRAY_SIZE(s2mpg10_common_ro_registers), +}; + +static const struct regmap_access_table s2mpg10_common_rd_table =3D { + .yes_ranges =3D s2mpg10_common_registers, + .n_yes_ranges =3D ARRAY_SIZE(s2mpg10_common_registers), +}; + +static const struct regmap_access_table s2mpg10_common_volatile_table =3D { + .no_ranges =3D s2mpg10_common_nonvolatile_registers, + .n_no_ranges =3D ARRAY_SIZE(s2mpg10_common_nonvolatile_registers), +}; + +static const struct regmap_access_table s2mpg10_common_precious_table =3D { + .yes_ranges =3D s2mpg10_common_precious_registers, + .n_yes_ranges =3D ARRAY_SIZE(s2mpg10_common_precious_registers), +}; + +static const struct regmap_config s2mpg10_regmap_config_common =3D { + .name =3D "common", + .reg_bits =3D ACPM_ADDR_BITS, + .val_bits =3D 8, + .max_register =3D S2MPG10_COMMON_SPD_DEBUG4, + .wr_table =3D &s2mpg10_common_wr_table, + .rd_table =3D &s2mpg10_common_rd_table, + .volatile_table =3D &s2mpg10_common_volatile_table, + .precious_table =3D &s2mpg10_common_precious_table, + .num_reg_defaults_raw =3D S2MPG10_COMMON_SPD_DEBUG4 + 1, + .cache_type =3D REGCACHE_FLAT, +}; + +static const struct regmap_range s2mpg10_pmic_registers[] =3D { + regmap_reg_range(0x00, 0xf6), /* All PMIC registers */ +}; + +static const struct regmap_range s2mpg10_pmic_ro_registers[] =3D { + regmap_reg_range(0x00, 0x05), /* INTx */ + regmap_reg_range(0x0c, 0x0f), /* STATUSx PWRONSRC OFFSRC */ + regmap_reg_range(0xc7, 0xc7), /* GPIO input */ +}; + +static const struct regmap_range s2mpg10_pmic_nonvolatile_registers[] =3D { + regmap_reg_range(0x06, 0x0b), /* INTxM */ +}; + +static const struct regmap_range s2mpg10_pmic_precious_registers[] =3D { + regmap_reg_range(0x00, 0x05), /* INTx */ +}; + +static const struct regmap_access_table s2mpg10_pmic_wr_table =3D { + .yes_ranges =3D s2mpg10_pmic_registers, + .n_yes_ranges =3D ARRAY_SIZE(s2mpg10_pmic_registers), + .no_ranges =3D s2mpg10_pmic_ro_registers, + .n_no_ranges =3D ARRAY_SIZE(s2mpg10_pmic_ro_registers), +}; + +static const struct regmap_access_table s2mpg10_pmic_rd_table =3D { + .yes_ranges =3D s2mpg10_pmic_registers, + .n_yes_ranges =3D ARRAY_SIZE(s2mpg10_pmic_registers), +}; + +static const struct regmap_access_table s2mpg10_pmic_volatile_table =3D { + .no_ranges =3D s2mpg10_pmic_nonvolatile_registers, + .n_no_ranges =3D ARRAY_SIZE(s2mpg10_pmic_nonvolatile_registers), +}; + +static const struct regmap_access_table s2mpg10_pmic_precious_table =3D { + .yes_ranges =3D s2mpg10_pmic_precious_registers, + .n_yes_ranges =3D ARRAY_SIZE(s2mpg10_pmic_precious_registers), +}; + +static const struct regmap_config s2mpg10_regmap_config_pmic =3D { + .name =3D "pmic", + .reg_bits =3D ACPM_ADDR_BITS, + .val_bits =3D 8, + .max_register =3D S2MPG10_PMIC_LDO_SENSE4, + .wr_table =3D &s2mpg10_pmic_wr_table, + .rd_table =3D &s2mpg10_pmic_rd_table, + .volatile_table =3D &s2mpg10_pmic_volatile_table, + .precious_table =3D &s2mpg10_pmic_precious_table, + .num_reg_defaults_raw =3D S2MPG10_PMIC_LDO_SENSE4 + 1, + .cache_type =3D REGCACHE_FLAT, +}; + +static const struct regmap_range s2mpg10_rtc_registers[] =3D { + regmap_reg_range(0x00, 0x2b), /* All RTC registers */ +}; + +static const struct regmap_range s2mpg10_rtc_volatile_registers[] =3D { + regmap_reg_range(0x01, 0x01), /* RTC_UPDATE */ + regmap_reg_range(0x05, 0x0c), /* Time / date */ +}; + +static const struct regmap_access_table s2mpg10_rtc_rd_table =3D { + .yes_ranges =3D s2mpg10_rtc_registers, + .n_yes_ranges =3D ARRAY_SIZE(s2mpg10_rtc_registers), +}; + +static const struct regmap_access_table s2mpg10_rtc_volatile_table =3D { + .yes_ranges =3D s2mpg10_rtc_volatile_registers, + .n_yes_ranges =3D ARRAY_SIZE(s2mpg10_rtc_volatile_registers), +}; + +static const struct regmap_config s2mpg10_regmap_config_rtc =3D { + .name =3D "rtc", + .reg_bits =3D ACPM_ADDR_BITS, + .val_bits =3D 8, + .max_register =3D S2MPG10_RTC_OSC_CTRL, + .rd_table =3D &s2mpg10_rtc_rd_table, + .volatile_table =3D &s2mpg10_rtc_volatile_table, + .num_reg_defaults_raw =3D S2MPG10_RTC_OSC_CTRL + 1, + .cache_type =3D REGCACHE_FLAT, +}; + +static const struct regmap_range s2mpg10_meter_registers[] =3D { + regmap_reg_range(0x00, 0x21), /* Meter config */ + regmap_reg_range(0x40, 0x8a), /* Meter data */ + regmap_reg_range(0xee, 0xee), /* Offset */ + regmap_reg_range(0xf1, 0xf1), /* Trim */ +}; + +static const struct regmap_range s2mpg10_meter_ro_registers[] =3D { + regmap_reg_range(0x40, 0x8a), /* Meter data */ +}; + +static const struct regmap_access_table s2mpg10_meter_wr_table =3D { + .yes_ranges =3D s2mpg10_meter_registers, + .n_yes_ranges =3D ARRAY_SIZE(s2mpg10_meter_registers), + .no_ranges =3D s2mpg10_meter_ro_registers, + .n_no_ranges =3D ARRAY_SIZE(s2mpg10_meter_ro_registers), +}; + +static const struct regmap_access_table s2mpg10_meter_rd_table =3D { + .yes_ranges =3D s2mpg10_meter_registers, + .n_yes_ranges =3D ARRAY_SIZE(s2mpg10_meter_registers), +}; + +static const struct regmap_access_table s2mpg10_meter_volatile_table =3D { + .yes_ranges =3D s2mpg10_meter_ro_registers, + .n_yes_ranges =3D ARRAY_SIZE(s2mpg10_meter_ro_registers), +}; + +static const struct regmap_config s2mpg10_regmap_config_meter =3D { + .name =3D "meter", + .reg_bits =3D ACPM_ADDR_BITS, + .val_bits =3D 8, + .max_register =3D S2MPG10_METER_BUCK_METER_TRIM3, + .wr_table =3D &s2mpg10_meter_wr_table, + .rd_table =3D &s2mpg10_meter_rd_table, + .volatile_table =3D &s2mpg10_meter_volatile_table, + .num_reg_defaults_raw =3D S2MPG10_METER_BUCK_METER_TRIM3 + 1, + .cache_type =3D REGCACHE_FLAT, +}; + +struct sec_pmic_acpm_shared_bus_context { + const struct acpm_handle *acpm; + unsigned int acpm_chan_id; + u8 speedy_channel; +}; + +enum sec_pmic_acpm_accesstype { + SEC_PMIC_ACPM_ACCESSTYPE_COMMON =3D 0x00, + SEC_PMIC_ACPM_ACCESSTYPE_PMIC =3D 0x01, + SEC_PMIC_ACPM_ACCESSTYPE_RTC =3D 0x02, + SEC_PMIC_ACPM_ACCESSTYPE_METER =3D 0x0a, + SEC_PMIC_ACPM_ACCESSTYPE_WLWP =3D 0x0b, + SEC_PMIC_ACPM_ACCESSTYPE_TRIM =3D 0x0f, +}; + +struct sec_pmic_acpm_bus_context { + struct sec_pmic_acpm_shared_bus_context *shared; + enum sec_pmic_acpm_accesstype type; +}; + +static int sec_pmic_acpm_bus_write(void *context, const void *data, + size_t count) +{ + struct sec_pmic_acpm_bus_context *ctx =3D context; + const struct acpm_handle *acpm =3D ctx->shared->acpm; + const struct acpm_pmic_ops *pmic_ops =3D &acpm->ops.pmic_ops; + size_t val_count =3D count - BITS_TO_BYTES(ACPM_ADDR_BITS); + const u8 *d =3D data; + const u8 *vals =3D &d[BITS_TO_BYTES(ACPM_ADDR_BITS)]; + u8 reg; + + if (val_count < 1 || val_count > ACPM_MAX_BULK_DATA) + return -EINVAL; + + reg =3D d[0]; + + return pmic_ops->bulk_write(acpm, ctx->shared->acpm_chan_id, ctx->type, r= eg, + ctx->shared->speedy_channel, val_count, vals); +} + +static int sec_pmic_acpm_bus_read(void *context, const void *reg_buf, size= _t reg_size, + void *val_buf, size_t val_size) +{ + struct sec_pmic_acpm_bus_context *ctx =3D context; + const struct acpm_handle *acpm =3D ctx->shared->acpm; + const struct acpm_pmic_ops *pmic_ops =3D &acpm->ops.pmic_ops; + const u8 *r =3D reg_buf; + u8 reg; + + if (reg_size !=3D BITS_TO_BYTES(ACPM_ADDR_BITS) || !val_size || + val_size > ACPM_MAX_BULK_DATA) + return -EINVAL; + + reg =3D r[0]; + + return pmic_ops->bulk_read(acpm, ctx->shared->acpm_chan_id, ctx->type, re= g, + ctx->shared->speedy_channel, val_size, val_buf); +} + +static int sec_pmic_acpm_bus_reg_update_bits(void *context, unsigned int r= eg, unsigned int mask, + unsigned int val) +{ + struct sec_pmic_acpm_bus_context *ctx =3D context; + const struct acpm_handle *acpm =3D ctx->shared->acpm; + const struct acpm_pmic_ops *pmic_ops =3D &acpm->ops.pmic_ops; + + return pmic_ops->update_reg(acpm, ctx->shared->acpm_chan_id, ctx->type, r= eg & 0xff, + ctx->shared->speedy_channel, val, mask); +} + +static const struct regmap_bus sec_pmic_acpm_regmap_bus =3D { + .write =3D sec_pmic_acpm_bus_write, + .read =3D sec_pmic_acpm_bus_read, + .reg_update_bits =3D sec_pmic_acpm_bus_reg_update_bits, + .max_raw_read =3D ACPM_MAX_BULK_DATA, + .max_raw_write =3D ACPM_MAX_BULK_DATA, +}; + +static struct regmap *sec_pmic_acpm_regmap_init(struct device *dev, + struct sec_pmic_acpm_shared_bus_context *shared_ctx, + enum sec_pmic_acpm_accesstype type, + const struct regmap_config *cfg, bool do_attach) +{ + struct sec_pmic_acpm_bus_context *ctx; + struct regmap *regmap; + + ctx =3D devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return ERR_PTR(-ENOMEM); + + ctx->shared =3D shared_ctx; + ctx->type =3D type; + + regmap =3D devm_regmap_init(dev, &sec_pmic_acpm_regmap_bus, ctx, cfg); + if (IS_ERR(regmap)) + return dev_err_cast_probe(dev, regmap, "regmap init (%s) failed\n", cfg-= >name); + + if (do_attach) { + int ret; + + ret =3D regmap_attach_dev(dev, regmap, cfg); + if (ret) + return dev_err_ptr_probe(dev, ret, "regmap attach (%s) failed\n", + cfg->name); + } + + return regmap; +} + +static void sec_pmic_acpm_mask_common_irqs(void *regmap_common) +{ + regmap_write(regmap_common, S2MPG10_COMMON_INT_MASK, S2MPG10_COMMON_INT_S= RC); +} + +static int sec_pmic_acpm_probe(struct platform_device *pdev) +{ + struct regmap *regmap_common, *regmap_pmic, *regmap; + const struct sec_pmic_acpm_platform_data *pdata; + struct sec_pmic_acpm_shared_bus_context *shared_ctx; + const struct acpm_handle *acpm; + struct device *dev =3D &pdev->dev; + int ret, irq; + + pdata =3D device_get_match_data(dev); + if (!pdata) + return dev_err_probe(dev, -ENODEV, "unsupported device type\n"); + + acpm =3D devm_acpm_get_by_node(dev, dev->parent->of_node); + if (IS_ERR(acpm)) + return dev_err_probe(dev, PTR_ERR(acpm), "failed to get acpm\n"); + + irq =3D platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + shared_ctx =3D devm_kzalloc(dev, sizeof(*shared_ctx), GFP_KERNEL); + if (!shared_ctx) + return -ENOMEM; + + shared_ctx->acpm =3D acpm; + shared_ctx->acpm_chan_id =3D pdata->acpm_chan_id; + shared_ctx->speedy_channel =3D pdata->speedy_channel; + + regmap_common =3D sec_pmic_acpm_regmap_init(dev, shared_ctx, SEC_PMIC_ACP= M_ACCESSTYPE_COMMON, + pdata->regmap_cfg_common, false); + if (IS_ERR(regmap_common)) + return PTR_ERR(regmap_common); + + /* Mask all interrupts from 'common' block, until successful init */ + ret =3D regmap_write(regmap_common, S2MPG10_COMMON_INT_MASK, S2MPG10_COMM= ON_INT_SRC); + if (ret) + return dev_err_probe(dev, ret, "failed to mask common block interrupts\n= "); + + regmap_pmic =3D sec_pmic_acpm_regmap_init(dev, shared_ctx, SEC_PMIC_ACPM_= ACCESSTYPE_PMIC, + pdata->regmap_cfg_pmic, false); + if (IS_ERR(regmap_pmic)) + return PTR_ERR(regmap_pmic); + + regmap =3D sec_pmic_acpm_regmap_init(dev, shared_ctx, SEC_PMIC_ACPM_ACCES= STYPE_RTC, + pdata->regmap_cfg_rtc, true); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + regmap =3D sec_pmic_acpm_regmap_init(dev, shared_ctx, SEC_PMIC_ACPM_ACCES= STYPE_METER, + pdata->regmap_cfg_meter, true); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + ret =3D sec_pmic_probe(dev, pdata->device_type, irq, regmap_pmic, NULL); + if (ret) + return ret; + + if (device_property_read_bool(dev, "wakeup-source")) + devm_device_init_wakeup(dev); + + /* Unmask PMIC interrupt from 'common' block, now that everything is in p= lace. */ + ret =3D regmap_clear_bits(regmap_common, S2MPG10_COMMON_INT_MASK, + S2MPG10_COMMON_INT_SRC_PMIC); + if (ret) + return dev_err_probe(dev, ret, "failed to unmask PMIC interrupt\n"); + + /* Mask all interrupts from 'common' block on shutdown */ + ret =3D devm_add_action_or_reset(dev, sec_pmic_acpm_mask_common_irqs, reg= map_common); + if (ret) + return ret; + + return 0; +} + +static void sec_pmic_acpm_shutdown(struct platform_device *pdev) +{ + sec_pmic_shutdown(&pdev->dev); +} + +static const struct sec_pmic_acpm_platform_data s2mpg10_data =3D { + .device_type =3D S2MPG10, + .acpm_chan_id =3D 2, + .speedy_channel =3D 0, + .regmap_cfg_common =3D &s2mpg10_regmap_config_common, + .regmap_cfg_pmic =3D &s2mpg10_regmap_config_pmic, + .regmap_cfg_rtc =3D &s2mpg10_regmap_config_rtc, + .regmap_cfg_meter =3D &s2mpg10_regmap_config_meter, +}; + +static const struct of_device_id sec_pmic_acpm_of_match[] =3D { + { .compatible =3D "samsung,s2mpg10-pmic", .data =3D &s2mpg10_data, }, + { }, +}; +MODULE_DEVICE_TABLE(of, sec_pmic_acpm_of_match); + +static struct platform_driver sec_pmic_acpm_driver =3D { + .driver =3D { + .name =3D "sec-pmic-acpm", + .pm =3D pm_sleep_ptr(&sec_pmic_pm_ops), + .of_match_table =3D sec_pmic_acpm_of_match, + }, + .probe =3D sec_pmic_acpm_probe, + .shutdown =3D sec_pmic_acpm_shutdown, +}; +module_platform_driver(sec_pmic_acpm_driver); + +MODULE_AUTHOR("Andr=C3=A9 Draszik "); +MODULE_DESCRIPTION("ACPM driver for the Samsung S2MPG1x"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c index bb664e052bf5198f2fc83a86bd6e1e72364fb8df..c4b7abe511090d8f5ff2eb501f3= 25cc8173b9bf5 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-core.c @@ -36,6 +36,14 @@ static const struct mfd_cell s2dos05_devs[] =3D { { .name =3D "s2dos05-regulator", }, }; =20 +static const struct mfd_cell s2mpg10_devs[] =3D { + MFD_CELL_NAME("s2mpg10-meter"), + MFD_CELL_NAME("s2mpg10-regulator"), + MFD_CELL_NAME("s2mpg10-rtc"), + MFD_CELL_OF("s2mpg10-clk", NULL, NULL, 0, 0, "samsung,s2mpg10-clk"), + MFD_CELL_OF("s2mpg10-gpio", NULL, NULL, 0, 0, "samsung,s2mpg10-gpio"), +}; + static const struct mfd_cell s2mps11_devs[] =3D { { .name =3D "s2mps11-regulator", }, { .name =3D "s2mps14-rtc", }, @@ -90,6 +98,10 @@ static void sec_pmic_dump_rev(struct sec_pmic_dev *sec_p= mic) { unsigned int val; =20 + /* For s2mpg1x, the revision is in a different regmap */ + if (sec_pmic->device_type =3D=3D S2MPG10) + return; + /* For each device type, the REG_ID is always the first register */ if (!regmap_read(sec_pmic->regmap_pmic, S2MPS11_REG_ID, &val)) dev_dbg(sec_pmic->dev, "Revision: 0x%x\n", val); @@ -188,6 +200,10 @@ int sec_pmic_probe(struct device *dev, unsigned long d= evice_type, sec_devs =3D s2mpa01_devs; num_sec_devs =3D ARRAY_SIZE(s2mpa01_devs); break; + case S2MPG10: + sec_devs =3D s2mpg10_devs; + num_sec_devs =3D ARRAY_SIZE(s2mpg10_devs); + break; case S2MPS11X: sec_devs =3D s2mps11_devs; num_sec_devs =3D ARRAY_SIZE(s2mps11_devs); diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 4d49bb42bd0d109263f485c8b58e88cdd8d598d9..e9beaa2a53fb42120eeb465a7c1= 9acb4af6a0e59 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -20,6 +21,60 @@ #include #include "sec-core.h" =20 +static const struct regmap_irq s2mpg10_irqs[] =3D { + REGMAP_IRQ_REG(S2MPG10_IRQ_PWRONF, 0, S2MPG10_IRQ_PWRONF_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWRONR, 0, S2MPG10_IRQ_PWRONR_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_JIGONBF, 0, S2MPG10_IRQ_JIGONBF_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_JIGONBR, 0, S2MPG10_IRQ_JIGONBR_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_ACOKBF, 0, S2MPG10_IRQ_ACOKBF_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_ACOKBR, 0, S2MPG10_IRQ_ACOKBR_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWRON1S, 0, S2MPG10_IRQ_PWRON1S_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_MRB, 0, S2MPG10_IRQ_MRB_MASK), + + REGMAP_IRQ_REG(S2MPG10_IRQ_RTC60S, 1, S2MPG10_IRQ_RTC60S_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_RTCA1, 1, S2MPG10_IRQ_RTCA1_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_RTCA0, 1, S2MPG10_IRQ_RTCA0_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_RTC1S, 1, S2MPG10_IRQ_RTC1S_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_WTSR_COLDRST, 1, S2MPG10_IRQ_WTSR_COLDRST_MASK= ), + REGMAP_IRQ_REG(S2MPG10_IRQ_WTSR, 1, S2MPG10_IRQ_WTSR_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_WRST, 1, S2MPG10_IRQ_WRST_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_SMPL, 1, S2MPG10_IRQ_SMPL_MASK), + + REGMAP_IRQ_REG(S2MPG10_IRQ_120C, 2, S2MPG10_IRQ_INT120C_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_140C, 2, S2MPG10_IRQ_INT140C_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_TSD, 2, S2MPG10_IRQ_TSD_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PIF_TIMEOUT1, 2, S2MPG10_IRQ_PIF_TIMEOUT1_MASK= ), + REGMAP_IRQ_REG(S2MPG10_IRQ_PIF_TIMEOUT2, 2, S2MPG10_IRQ_PIF_TIMEOUT2_MASK= ), + REGMAP_IRQ_REG(S2MPG10_IRQ_SPD_PARITY_ERR, 2, S2MPG10_IRQ_SPD_PARITY_ERR_= MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_SPD_ABNORMAL_STOP, 2, S2MPG10_IRQ_SPD_ABNORMAL= _STOP_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_PMETER_OVERF, 2, S2MPG10_IRQ_PMETER_OVERF_MASK= ), + + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B1M, 3, S2MPG10_IRQ_OCP_B1M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B2M, 3, S2MPG10_IRQ_OCP_B2M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B3M, 3, S2MPG10_IRQ_OCP_B3M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B4M, 3, S2MPG10_IRQ_OCP_B4M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B5M, 3, S2MPG10_IRQ_OCP_B5M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B6M, 3, S2MPG10_IRQ_OCP_B6M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B7M, 3, S2MPG10_IRQ_OCP_B7M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B8M, 3, S2MPG10_IRQ_OCP_B8M_MASK), + + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B9M, 4, S2MPG10_IRQ_OCP_B9M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_OCP_B10M, 4, S2MPG10_IRQ_OCP_B10M_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_WLWP_ACC, 4, S2MPG10_IRQ_WLWP_ACC_MASK), + REGMAP_IRQ_REG(S2MPG10_IRQ_SMPL_TIMEOUT, 4, S2MPG10_IRQ_SMPL_TIMEOUT_MASK= ), + REGMAP_IRQ_REG(S2MPG10_IRQ_WTSR_TIMEOUT, 4, S2MPG10_IRQ_WTSR_TIMEOUT_MASK= ), + REGMAP_IRQ_REG(S2MPG10_IRQ_SPD_SRP_PKT_RST, 4, S2MPG10_IRQ_SPD_SRP_PKT_RS= T_MASK), + + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH0, 5, S2MPG10_IRQ_PWR_WARN_CH0_MASK= ), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH1, 5, S2MPG10_IRQ_PWR_WARN_CH1_MASK= ), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH2, 5, S2MPG10_IRQ_PWR_WARN_CH2_MASK= ), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH3, 5, S2MPG10_IRQ_PWR_WARN_CH3_MASK= ), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH4, 5, S2MPG10_IRQ_PWR_WARN_CH4_MASK= ), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH5, 5, S2MPG10_IRQ_PWR_WARN_CH5_MASK= ), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH6, 5, S2MPG10_IRQ_PWR_WARN_CH6_MASK= ), + REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH7, 5, S2MPG10_IRQ_PWR_WARN_CH7_MASK= ), +}; + static const struct regmap_irq s2mps11_irqs[] =3D { [S2MPS11_IRQ_PWRONF] =3D { .reg_offset =3D 0, @@ -320,6 +375,16 @@ static const struct regmap_irq s5m8767_irqs[] =3D { }, }; =20 +/* All S2MPG10 interrupt sources are read-only and don't require clearing = */ +static const struct regmap_irq_chip s2mpg10_irq_chip =3D { + .name =3D "s2mpg10", + .irqs =3D s2mpg10_irqs, + .num_irqs =3D ARRAY_SIZE(s2mpg10_irqs), + .num_regs =3D 6, + .status_base =3D S2MPG10_PMIC_INT1, + .mask_base =3D S2MPG10_PMIC_INT1M, +}; + static const struct regmap_irq_chip s2mps11_irq_chip =3D { .name =3D "s2mps11", .irqs =3D s2mps11_irqs, @@ -402,6 +467,9 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) case S2MPA01: sec_irq_chip =3D &s2mps14_irq_chip; break; + case S2MPG10: + sec_irq_chip =3D &s2mpg10_irq_chip; + break; case S2MPS11X: sec_irq_chip =3D &s2mps11_irq_chip; break; diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/c= ore.h index 8a4e660854bbc955b812b4d61d4a52a0fc2f2899..c1102324172a9b6bd6072b5929a= 4866d6c9653fa 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h @@ -39,6 +39,7 @@ enum sec_device_type { S5M8767X, S2DOS05, S2MPA01, + S2MPG10, S2MPS11X, S2MPS13X, S2MPS14X, diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/ir= q.h index 978f7af66f74842c4f8dd62c0f58a7a45aba7c34..b4805cbd949bd605004bd88cf36= 1109d1cbbc3bf 100644 --- a/include/linux/mfd/samsung/irq.h +++ b/include/linux/mfd/samsung/irq.h @@ -57,6 +57,109 @@ enum s2mpa01_irq { #define S2MPA01_IRQ_B24_TSD_MASK (1 << 4) #define S2MPA01_IRQ_B35_TSD_MASK (1 << 5) =20 +enum s2mpg10_irq { + /* PMIC */ + S2MPG10_IRQ_PWRONF, + S2MPG10_IRQ_PWRONR, + S2MPG10_IRQ_JIGONBF, + S2MPG10_IRQ_JIGONBR, + S2MPG10_IRQ_ACOKBF, + S2MPG10_IRQ_ACOKBR, + S2MPG10_IRQ_PWRON1S, + S2MPG10_IRQ_MRB, +#define S2MPG10_IRQ_PWRONF_MASK BIT(0) +#define S2MPG10_IRQ_PWRONR_MASK BIT(1) +#define S2MPG10_IRQ_JIGONBF_MASK BIT(2) +#define S2MPG10_IRQ_JIGONBR_MASK BIT(3) +#define S2MPG10_IRQ_ACOKBF_MASK BIT(4) +#define S2MPG10_IRQ_ACOKBR_MASK BIT(5) +#define S2MPG10_IRQ_PWRON1S_MASK BIT(6) +#define S2MPG10_IRQ_MRB_MASK BIT(7) + + S2MPG10_IRQ_RTC60S, + S2MPG10_IRQ_RTCA1, + S2MPG10_IRQ_RTCA0, + S2MPG10_IRQ_RTC1S, + S2MPG10_IRQ_WTSR_COLDRST, + S2MPG10_IRQ_WTSR, + S2MPG10_IRQ_WRST, + S2MPG10_IRQ_SMPL, +#define S2MPG10_IRQ_RTC60S_MASK BIT(0) +#define S2MPG10_IRQ_RTCA1_MASK BIT(1) +#define S2MPG10_IRQ_RTCA0_MASK BIT(2) +#define S2MPG10_IRQ_RTC1S_MASK BIT(3) +#define S2MPG10_IRQ_WTSR_COLDRST_MASK BIT(4) +#define S2MPG10_IRQ_WTSR_MASK BIT(5) +#define S2MPG10_IRQ_WRST_MASK BIT(6) +#define S2MPG10_IRQ_SMPL_MASK BIT(7) + + S2MPG10_IRQ_120C, + S2MPG10_IRQ_140C, + S2MPG10_IRQ_TSD, + S2MPG10_IRQ_PIF_TIMEOUT1, + S2MPG10_IRQ_PIF_TIMEOUT2, + S2MPG10_IRQ_SPD_PARITY_ERR, + S2MPG10_IRQ_SPD_ABNORMAL_STOP, + S2MPG10_IRQ_PMETER_OVERF, +#define S2MPG10_IRQ_INT120C_MASK BIT(0) +#define S2MPG10_IRQ_INT140C_MASK BIT(1) +#define S2MPG10_IRQ_TSD_MASK BIT(2) +#define S2MPG10_IRQ_PIF_TIMEOUT1_MASK BIT(3) +#define S2MPG10_IRQ_PIF_TIMEOUT2_MASK BIT(4) +#define S2MPG10_IRQ_SPD_PARITY_ERR_MASK BIT(5) +#define S2MPG10_IRQ_SPD_ABNORMAL_STOP_MASK BIT(6) +#define S2MPG10_IRQ_PMETER_OVERF_MASK BIT(7) + + S2MPG10_IRQ_OCP_B1M, + S2MPG10_IRQ_OCP_B2M, + S2MPG10_IRQ_OCP_B3M, + S2MPG10_IRQ_OCP_B4M, + S2MPG10_IRQ_OCP_B5M, + S2MPG10_IRQ_OCP_B6M, + S2MPG10_IRQ_OCP_B7M, + S2MPG10_IRQ_OCP_B8M, +#define S2MPG10_IRQ_OCP_B1M_MASK BIT(0) +#define S2MPG10_IRQ_OCP_B2M_MASK BIT(1) +#define S2MPG10_IRQ_OCP_B3M_MASK BIT(2) +#define S2MPG10_IRQ_OCP_B4M_MASK BIT(3) +#define S2MPG10_IRQ_OCP_B5M_MASK BIT(4) +#define S2MPG10_IRQ_OCP_B6M_MASK BIT(5) +#define S2MPG10_IRQ_OCP_B7M_MASK BIT(6) +#define S2MPG10_IRQ_OCP_B8M_MASK BIT(7) + + S2MPG10_IRQ_OCP_B9M, + S2MPG10_IRQ_OCP_B10M, + S2MPG10_IRQ_WLWP_ACC, + S2MPG10_IRQ_SMPL_TIMEOUT, + S2MPG10_IRQ_WTSR_TIMEOUT, + S2MPG10_IRQ_SPD_SRP_PKT_RST, +#define S2MPG10_IRQ_OCP_B9M_MASK BIT(0) +#define S2MPG10_IRQ_OCP_B10M_MASK BIT(1) +#define S2MPG10_IRQ_WLWP_ACC_MASK BIT(2) +#define S2MPG10_IRQ_SMPL_TIMEOUT_MASK BIT(5) +#define S2MPG10_IRQ_WTSR_TIMEOUT_MASK BIT(6) +#define S2MPG10_IRQ_SPD_SRP_PKT_RST_MASK BIT(7) + + S2MPG10_IRQ_PWR_WARN_CH0, + S2MPG10_IRQ_PWR_WARN_CH1, + S2MPG10_IRQ_PWR_WARN_CH2, + S2MPG10_IRQ_PWR_WARN_CH3, + S2MPG10_IRQ_PWR_WARN_CH4, + S2MPG10_IRQ_PWR_WARN_CH5, + S2MPG10_IRQ_PWR_WARN_CH6, + S2MPG10_IRQ_PWR_WARN_CH7, +#define S2MPG10_IRQ_PWR_WARN_CH0_MASK BIT(0) +#define S2MPG10_IRQ_PWR_WARN_CH1_MASK BIT(1) +#define S2MPG10_IRQ_PWR_WARN_CH2_MASK BIT(2) +#define S2MPG10_IRQ_PWR_WARN_CH3_MASK BIT(3) +#define S2MPG10_IRQ_PWR_WARN_CH4_MASK BIT(4) +#define S2MPG10_IRQ_PWR_WARN_CH5_MASK BIT(5) +#define S2MPG10_IRQ_PWR_WARN_CH6_MASK BIT(6) +#define S2MPG10_IRQ_PWR_WARN_CH7_MASK BIT(7) + + S2MPG10_IRQ_NR, +}; + enum s2mps11_irq { S2MPS11_IRQ_PWRONF, S2MPS11_IRQ_PWRONR, diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/rt= c.h index 0204decfc9aacbf4bc93d98a256f1d956bbcd19c..51c4239a1fa6f28155711a0756b= 0e071b010d848 100644 --- a/include/linux/mfd/samsung/rtc.h +++ b/include/linux/mfd/samsung/rtc.h @@ -72,6 +72,37 @@ enum s2mps_rtc_reg { S2MPS_RTC_REG_MAX, }; =20 +enum s2mpg10_rtc_reg { + S2MPG10_RTC_CTRL, + S2MPG10_RTC_UPDATE, + S2MPG10_RTC_SMPL, + S2MPG10_RTC_WTSR, + S2MPG10_RTC_CAP_SEL, + S2MPG10_RTC_MSEC, + S2MPG10_RTC_SEC, + S2MPG10_RTC_MIN, + S2MPG10_RTC_HOUR, + S2MPG10_RTC_WEEK, + S2MPG10_RTC_DAY, + S2MPG10_RTC_MON, + S2MPG10_RTC_YEAR, + S2MPG10_RTC_A0SEC, + S2MPG10_RTC_A0MIN, + S2MPG10_RTC_A0HOUR, + S2MPG10_RTC_A0WEEK, + S2MPG10_RTC_A0DAY, + S2MPG10_RTC_A0MON, + S2MPG10_RTC_A0YEAR, + S2MPG10_RTC_A1SEC, + S2MPG10_RTC_A1MIN, + S2MPG10_RTC_A1HOUR, + S2MPG10_RTC_A1WEEK, + S2MPG10_RTC_A1DAY, + S2MPG10_RTC_A1MON, + S2MPG10_RTC_A1YEAR, + S2MPG10_RTC_OSC_CTRL, +}; + #define RTC_I2C_ADDR (0x0C >> 1) =20 #define HOUR_12 (1 << 7) @@ -124,10 +155,16 @@ enum s2mps_rtc_reg { #define ALARM_ENABLE_SHIFT 7 #define ALARM_ENABLE_MASK (1 << ALARM_ENABLE_SHIFT) =20 +/* WTSR & SMPL registers */ #define SMPL_ENABLE_SHIFT 7 #define SMPL_ENABLE_MASK (1 << SMPL_ENABLE_SHIFT) =20 #define WTSR_ENABLE_SHIFT 6 #define WTSR_ENABLE_MASK (1 << WTSR_ENABLE_SHIFT) =20 +#define S2MPG10_WTSR_COLDTIMER GENMASK(6, 5) +#define S2MPG10_WTSR_COLDRST BIT(4) +#define S2MPG10_WTSR_WTSRT GENMASK(3, 1) +#define S2MPG10_WTSR_WTSR_EN BIT(0) + #endif /* __LINUX_MFD_SEC_RTC_H */ diff --git a/include/linux/mfd/samsung/s2mpg10.h b/include/linux/mfd/samsun= g/s2mpg10.h new file mode 100644 index 0000000000000000000000000000000000000000..9f5919b89a3c286bf1cd6b3ef0e= 74bc993bff01a --- /dev/null +++ b/include/linux/mfd/samsung/s2mpg10.h @@ -0,0 +1,454 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2015 Samsung Electronics + * Copyright 2020 Google Inc + * Copyright 2025 Linaro Ltd. + */ + +#ifndef __LINUX_MFD_S2MPG10_H +#define __LINUX_MFD_S2MPG10_H + +/* Common registers (type 0x000) */ +enum s2mpg10_common_reg { + S2MPG10_COMMON_CHIPID, + S2MPG10_COMMON_INT, + S2MPG10_COMMON_INT_MASK, + S2MPG10_COMMON_SPD_CTRL1 =3D 0x0a, + S2MPG10_COMMON_SPD_CTRL2, + S2MPG10_COMMON_SPD_CTRL3, + S2MPG10_COMMON_MON1SEL =3D 0x1a, + S2MPG10_COMMON_MON2SEL, + S2MPG10_COMMON_MONR, + S2MPG10_COMMON_DEBUG_CTRL1, + S2MPG10_COMMON_DEBUG_CTRL2, + S2MPG10_COMMON_DEBUG_CTRL3, + S2MPG10_COMMON_DEBUG_CTRL4, + S2MPG10_COMMON_DEBUG_CTRL5, + S2MPG10_COMMON_DEBUG_CTRL6, + S2MPG10_COMMON_DEBUG_CTRL7, + S2MPG10_COMMON_DEBUG_CTRL8, + S2MPG10_COMMON_TEST_MODE1, + S2MPG10_COMMON_TEST_MODE2, + S2MPG10_COMMON_SPD_DEBUG1, + S2MPG10_COMMON_SPD_DEBUG2, + S2MPG10_COMMON_SPD_DEBUG3, + S2MPG10_COMMON_SPD_DEBUG4, +}; + +/* For S2MPG10_COMMON_INT and S2MPG10_COMMON_INT_MASK */ +#define S2MPG10_COMMON_INT_SRC GENMASK(7, 0) +#define S2MPG10_COMMON_INT_SRC_PMIC BIT(0) + +/* PMIC registers (type 0x100) */ +enum s2mpg10_pmic_reg { + S2MPG10_PMIC_INT1, + S2MPG10_PMIC_INT2, + S2MPG10_PMIC_INT3, + S2MPG10_PMIC_INT4, + S2MPG10_PMIC_INT5, + S2MPG10_PMIC_INT6, + S2MPG10_PMIC_INT1M, + S2MPG10_PMIC_INT2M, + S2MPG10_PMIC_INT3M, + S2MPG10_PMIC_INT4M, + S2MPG10_PMIC_INT5M, + S2MPG10_PMIC_INT6M, + S2MPG10_PMIC_STATUS1, + S2MPG10_PMIC_STATUS2, + S2MPG10_PMIC_PWRONSRC, + S2MPG10_PMIC_OFFSRC, + S2MPG10_PMIC_BU_CHG, + S2MPG10_PMIC_RTCBUF, + S2MPG10_PMIC_COMMON_CTRL1, + S2MPG10_PMIC_COMMON_CTRL2, + S2MPG10_PMIC_COMMON_CTRL3, + S2MPG10_PMIC_COMMON_CTRL4, + S2MPG10_PMIC_SMPL_WARN_CTRL, + S2MPG10_PMIC_MIMICKING_CTRL, + S2MPG10_PMIC_B1M_CTRL, + S2MPG10_PMIC_B1M_OUT1, + S2MPG10_PMIC_B1M_OUT2, + S2MPG10_PMIC_B2M_CTRL, + S2MPG10_PMIC_B2M_OUT1, + S2MPG10_PMIC_B2M_OUT2, + S2MPG10_PMIC_B3M_CTRL, + S2MPG10_PMIC_B3M_OUT1, + S2MPG10_PMIC_B3M_OUT2, + S2MPG10_PMIC_B4M_CTRL, + S2MPG10_PMIC_B4M_OUT1, + S2MPG10_PMIC_B4M_OUT2, + S2MPG10_PMIC_B5M_CTRL, + S2MPG10_PMIC_B5M_OUT1, + S2MPG10_PMIC_B5M_OUT2, + S2MPG10_PMIC_B6M_CTRL, + S2MPG10_PMIC_B6M_OUT1, + S2MPG10_PMIC_B6M_OUT2, + S2MPG10_PMIC_B7M_CTRL, + S2MPG10_PMIC_B7M_OUT1, + S2MPG10_PMIC_B7M_OUT2, + S2MPG10_PMIC_B8M_CTRL, + S2MPG10_PMIC_B8M_OUT1, + S2MPG10_PMIC_B8M_OUT2, + S2MPG10_PMIC_B9M_CTRL, + S2MPG10_PMIC_B9M_OUT1, + S2MPG10_PMIC_B9M_OUT2, + S2MPG10_PMIC_B10M_CTRL, + S2MPG10_PMIC_B10M_OUT1, + S2MPG10_PMIC_B10M_OUT2, + S2MPG10_PMIC_BUCK1M_USONIC, + S2MPG10_PMIC_BUCK2M_USONIC, + S2MPG10_PMIC_BUCK3M_USONIC, + S2MPG10_PMIC_BUCK4M_USONIC, + S2MPG10_PMIC_BUCK5M_USONIC, + S2MPG10_PMIC_BUCK6M_USONIC, + S2MPG10_PMIC_BUCK7M_USONIC, + S2MPG10_PMIC_BUCK8M_USONIC, + S2MPG10_PMIC_BUCK9M_USONIC, + S2MPG10_PMIC_BUCK10M_USONIC, + S2MPG10_PMIC_L1M_CTRL, + S2MPG10_PMIC_L2M_CTRL, + S2MPG10_PMIC_L3M_CTRL, + S2MPG10_PMIC_L4M_CTRL, + S2MPG10_PMIC_L5M_CTRL, + S2MPG10_PMIC_L6M_CTRL, + S2MPG10_PMIC_L7M_CTRL, + S2MPG10_PMIC_L8M_CTRL, + S2MPG10_PMIC_L9M_CTRL, + S2MPG10_PMIC_L10M_CTRL, + S2MPG10_PMIC_L11M_CTRL1, + S2MPG10_PMIC_L11M_CTRL2, + S2MPG10_PMIC_L12M_CTRL1, + S2MPG10_PMIC_L12M_CTRL2, + S2MPG10_PMIC_L13M_CTRL1, + S2MPG10_PMIC_L13M_CTRL2, + S2MPG10_PMIC_L14M_CTRL, + S2MPG10_PMIC_L15M_CTRL1, + S2MPG10_PMIC_L15M_CTRL2, + S2MPG10_PMIC_L16M_CTRL, + S2MPG10_PMIC_L17M_CTRL, + S2MPG10_PMIC_L18M_CTRL, + S2MPG10_PMIC_L19M_CTRL, + S2MPG10_PMIC_L20M_CTRL, + S2MPG10_PMIC_L21M_CTRL, + S2MPG10_PMIC_L22M_CTRL, + S2MPG10_PMIC_L23M_CTRL, + S2MPG10_PMIC_L24M_CTRL, + S2MPG10_PMIC_L25M_CTRL, + S2MPG10_PMIC_L26M_CTRL, + S2MPG10_PMIC_L27M_CTRL, + S2MPG10_PMIC_L28M_CTRL, + S2MPG10_PMIC_L29M_CTRL, + S2MPG10_PMIC_L30M_CTRL, + S2MPG10_PMIC_L31M_CTRL, + S2MPG10_PMIC_LDO_CTRL1, + S2MPG10_PMIC_LDO_CTRL2, + S2MPG10_PMIC_LDO_DSCH1, + S2MPG10_PMIC_LDO_DSCH2, + S2MPG10_PMIC_LDO_DSCH3, + S2MPG10_PMIC_LDO_DSCH4, + S2MPG10_PMIC_LDO_BUCK7M_HLIMIT, + S2MPG10_PMIC_LDO_BUCK7M_LLIMIT, + S2MPG10_PMIC_LDO_LDO21M_HLIMIT, + S2MPG10_PMIC_LDO_LDO21M_LLIMIT, + S2MPG10_PMIC_LDO_LDO11M_HLIMIT, + S2MPG10_PMIC_DVS_RAMP1, + S2MPG10_PMIC_DVS_RAMP2, + S2MPG10_PMIC_DVS_RAMP3, + S2MPG10_PMIC_DVS_RAMP4, + S2MPG10_PMIC_DVS_RAMP5, + S2MPG10_PMIC_DVS_RAMP6, + S2MPG10_PMIC_DVS_SYNC_CTRL1, + S2MPG10_PMIC_DVS_SYNC_CTRL2, + S2MPG10_PMIC_DVS_SYNC_CTRL3, + S2MPG10_PMIC_DVS_SYNC_CTRL4, + S2MPG10_PMIC_DVS_SYNC_CTRL5, + S2MPG10_PMIC_DVS_SYNC_CTRL6, + S2MPG10_PMIC_OFF_CTRL1, + S2MPG10_PMIC_OFF_CTRL2, + S2MPG10_PMIC_OFF_CTRL3, + S2MPG10_PMIC_OFF_CTRL4, + S2MPG10_PMIC_SEQ_CTRL1, + S2MPG10_PMIC_SEQ_CTRL2, + S2MPG10_PMIC_SEQ_CTRL3, + S2MPG10_PMIC_SEQ_CTRL4, + S2MPG10_PMIC_SEQ_CTRL5, + S2MPG10_PMIC_SEQ_CTRL6, + S2MPG10_PMIC_SEQ_CTRL7, + S2MPG10_PMIC_SEQ_CTRL8, + S2MPG10_PMIC_SEQ_CTRL9, + S2MPG10_PMIC_SEQ_CTRL10, + S2MPG10_PMIC_SEQ_CTRL11, + S2MPG10_PMIC_SEQ_CTRL12, + S2MPG10_PMIC_SEQ_CTRL13, + S2MPG10_PMIC_SEQ_CTRL14, + S2MPG10_PMIC_SEQ_CTRL15, + S2MPG10_PMIC_SEQ_CTRL16, + S2MPG10_PMIC_SEQ_CTRL17, + S2MPG10_PMIC_SEQ_CTRL18, + S2MPG10_PMIC_SEQ_CTRL19, + S2MPG10_PMIC_SEQ_CTRL20, + S2MPG10_PMIC_SEQ_CTRL21, + S2MPG10_PMIC_SEQ_CTRL22, + S2MPG10_PMIC_SEQ_CTRL23, + S2MPG10_PMIC_SEQ_CTRL24, + S2MPG10_PMIC_SEQ_CTRL25, + S2MPG10_PMIC_SEQ_CTRL26, + S2MPG10_PMIC_SEQ_CTRL27, + S2MPG10_PMIC_SEQ_CTRL28, + S2MPG10_PMIC_SEQ_CTRL29, + S2MPG10_PMIC_SEQ_CTRL30, + S2MPG10_PMIC_SEQ_CTRL31, + S2MPG10_PMIC_SEQ_CTRL32, + S2MPG10_PMIC_SEQ_CTRL33, + S2MPG10_PMIC_SEQ_CTRL34, + S2MPG10_PMIC_SEQ_CTRL35, + S2MPG10_PMIC_OFF_SEQ_CTRL1, + S2MPG10_PMIC_OFF_SEQ_CTRL2, + S2MPG10_PMIC_OFF_SEQ_CTRL3, + S2MPG10_PMIC_OFF_SEQ_CTRL4, + S2MPG10_PMIC_OFF_SEQ_CTRL5, + S2MPG10_PMIC_OFF_SEQ_CTRL6, + S2MPG10_PMIC_OFF_SEQ_CTRL7, + S2MPG10_PMIC_OFF_SEQ_CTRL8, + S2MPG10_PMIC_OFF_SEQ_CTRL9, + S2MPG10_PMIC_OFF_SEQ_CTRL10, + S2MPG10_PMIC_OFF_SEQ_CTRL11, + S2MPG10_PMIC_OFF_SEQ_CTRL12, + S2MPG10_PMIC_OFF_SEQ_CTRL13, + S2MPG10_PMIC_OFF_SEQ_CTRL14, + S2MPG10_PMIC_OFF_SEQ_CTRL15, + S2MPG10_PMIC_OFF_SEQ_CTRL16, + S2MPG10_PMIC_OFF_SEQ_CTRL17, + S2MPG10_PMIC_OFF_SEQ_CTRL18, + S2MPG10_PMIC_PCTRLSEL1, + S2MPG10_PMIC_PCTRLSEL2, + S2MPG10_PMIC_PCTRLSEL3, + S2MPG10_PMIC_PCTRLSEL4, + S2MPG10_PMIC_PCTRLSEL5, + S2MPG10_PMIC_PCTRLSEL6, + S2MPG10_PMIC_PCTRLSEL7, + S2MPG10_PMIC_PCTRLSEL8, + S2MPG10_PMIC_PCTRLSEL9, + S2MPG10_PMIC_PCTRLSEL10, + S2MPG10_PMIC_PCTRLSEL11, + S2MPG10_PMIC_PCTRLSEL12, + S2MPG10_PMIC_PCTRLSEL13, + S2MPG10_PMIC_DCTRLSEL1, + S2MPG10_PMIC_DCTRLSEL2, + S2MPG10_PMIC_DCTRLSEL3, + S2MPG10_PMIC_DCTRLSEL4, + S2MPG10_PMIC_DCTRLSEL5, + S2MPG10_PMIC_DCTRLSEL6, + S2MPG10_PMIC_DCTRLSEL7, + S2MPG10_PMIC_GPIO_CTRL1, + S2MPG10_PMIC_GPIO_CTRL2, + S2MPG10_PMIC_GPIO_CTRL3, + S2MPG10_PMIC_GPIO_CTRL4, + S2MPG10_PMIC_GPIO_CTRL5, + S2MPG10_PMIC_GPIO_CTRL6, + S2MPG10_PMIC_GPIO_CTRL7, + S2MPG10_PMIC_B2M_OCP_WARN, + S2MPG10_PMIC_B2M_OCP_WARN_X, + S2MPG10_PMIC_B2M_OCP_WARN_Y, + S2MPG10_PMIC_B2M_OCP_WARN_Z, + S2MPG10_PMIC_B3M_OCP_WARN, + S2MPG10_PMIC_B3M_OCP_WARN_X, + S2MPG10_PMIC_B3M_OCP_WARN_Y, + S2MPG10_PMIC_B3M_OCP_WARN_Z, + S2MPG10_PMIC_B10M_OCP_WARN, + S2MPG10_PMIC_B10M_OCP_WARN_X, + S2MPG10_PMIC_B10M_OCP_WARN_Y, + S2MPG10_PMIC_B10M_OCP_WARN_Z, + S2MPG10_PMIC_B2M_SOFT_OCP_WARN, + S2MPG10_PMIC_B2M_SOFT_OCP_WARN_X, + S2MPG10_PMIC_B2M_SOFT_OCP_WARN_Y, + S2MPG10_PMIC_B2M_SOFT_OCP_WARN_Z, + S2MPG10_PMIC_B3M_SOFT_OCP_WARN, + S2MPG10_PMIC_B3M_SOFT_OCP_WARN_X, + S2MPG10_PMIC_B3M_SOFT_OCP_WARN_Y, + S2MPG10_PMIC_B3M_SOFT_OCP_WARN_Z, + S2MPG10_PMIC_B10M_SOFT_OCP_WARN, + S2MPG10_PMIC_B10M_SOFT_OCP_WARN_X, + S2MPG10_PMIC_B10M_SOFT_OCP_WARN_Y, + S2MPG10_PMIC_B10M_SOFT_OCP_WARN_Z, + S2MPG10_PMIC_BUCK_OCP_EN1, + S2MPG10_PMIC_BUCK_OCP_EN2, + S2MPG10_PMIC_BUCK_OCP_PD_EN1, + S2MPG10_PMIC_BUCK_OCP_PD_EN2, + S2MPG10_PMIC_BUCK_OCP_CTRL1, + S2MPG10_PMIC_BUCK_OCP_CTRL2, + S2MPG10_PMIC_BUCK_OCP_CTRL3, + S2MPG10_PMIC_BUCK_OCP_CTRL4, + S2MPG10_PMIC_BUCK_OCP_CTRL5, + S2MPG10_PMIC_PIF_CTRL, + S2MPG10_PMIC_BUCK_HR_MODE1, + S2MPG10_PMIC_BUCK_HR_MODE2, + S2MPG10_PMIC_FAULTOUT_CTRL, + S2MPG10_PMIC_LDO_SENSE1, + S2MPG10_PMIC_LDO_SENSE2, + S2MPG10_PMIC_LDO_SENSE3, + S2MPG10_PMIC_LDO_SENSE4, +}; + +/* Meter registers (type 0xa00) */ +enum s2mpg10_meter_reg { + S2MPG10_METER_CTRL1, + S2MPG10_METER_CTRL2, + S2MPG10_METER_CTRL3, + S2MPG10_METER_CTRL4, + S2MPG10_METER_BUCKEN1, + S2MPG10_METER_BUCKEN2, + S2MPG10_METER_MUXSEL0, + S2MPG10_METER_MUXSEL1, + S2MPG10_METER_MUXSEL2, + S2MPG10_METER_MUXSEL3, + S2MPG10_METER_MUXSEL4, + S2MPG10_METER_MUXSEL5, + S2MPG10_METER_MUXSEL6, + S2MPG10_METER_MUXSEL7, + S2MPG10_METER_LPF_C0_0, + S2MPG10_METER_LPF_C0_1, + S2MPG10_METER_LPF_C0_2, + S2MPG10_METER_LPF_C0_3, + S2MPG10_METER_LPF_C0_4, + S2MPG10_METER_LPF_C0_5, + S2MPG10_METER_LPF_C0_6, + S2MPG10_METER_LPF_C0_7, + S2MPG10_METER_PWR_WARN0, + S2MPG10_METER_PWR_WARN1, + S2MPG10_METER_PWR_WARN2, + S2MPG10_METER_PWR_WARN3, + S2MPG10_METER_PWR_WARN4, + S2MPG10_METER_PWR_WARN5, + S2MPG10_METER_PWR_WARN6, + S2MPG10_METER_PWR_WARN7, + S2MPG10_METER_PWR_HYS1, + S2MPG10_METER_PWR_HYS2, + S2MPG10_METER_PWR_HYS3, + S2MPG10_METER_PWR_HYS4, + S2MPG10_METER_ACC_DATA_CH0_1 =3D 0x40, + S2MPG10_METER_ACC_DATA_CH0_2, + S2MPG10_METER_ACC_DATA_CH0_3, + S2MPG10_METER_ACC_DATA_CH0_4, + S2MPG10_METER_ACC_DATA_CH0_5, + S2MPG10_METER_ACC_DATA_CH0_6, + S2MPG10_METER_ACC_DATA_CH1_1, + S2MPG10_METER_ACC_DATA_CH1_2, + S2MPG10_METER_ACC_DATA_CH1_3, + S2MPG10_METER_ACC_DATA_CH1_4, + S2MPG10_METER_ACC_DATA_CH1_5, + S2MPG10_METER_ACC_DATA_CH1_6, + S2MPG10_METER_ACC_DATA_CH2_1, + S2MPG10_METER_ACC_DATA_CH2_2, + S2MPG10_METER_ACC_DATA_CH2_3, + S2MPG10_METER_ACC_DATA_CH2_4, + S2MPG10_METER_ACC_DATA_CH2_5, + S2MPG10_METER_ACC_DATA_CH2_6, + S2MPG10_METER_ACC_DATA_CH3_1, + S2MPG10_METER_ACC_DATA_CH3_2, + S2MPG10_METER_ACC_DATA_CH3_3, + S2MPG10_METER_ACC_DATA_CH3_4, + S2MPG10_METER_ACC_DATA_CH3_5, + S2MPG10_METER_ACC_DATA_CH3_6, + S2MPG10_METER_ACC_DATA_CH4_1, + S2MPG10_METER_ACC_DATA_CH4_2, + S2MPG10_METER_ACC_DATA_CH4_3, + S2MPG10_METER_ACC_DATA_CH4_4, + S2MPG10_METER_ACC_DATA_CH4_5, + S2MPG10_METER_ACC_DATA_CH4_6, + S2MPG10_METER_ACC_DATA_CH5_1, + S2MPG10_METER_ACC_DATA_CH5_2, + S2MPG10_METER_ACC_DATA_CH5_3, + S2MPG10_METER_ACC_DATA_CH5_4, + S2MPG10_METER_ACC_DATA_CH5_5, + S2MPG10_METER_ACC_DATA_CH5_6, + S2MPG10_METER_ACC_DATA_CH6_1, + S2MPG10_METER_ACC_DATA_CH6_2, + S2MPG10_METER_ACC_DATA_CH6_3, + S2MPG10_METER_ACC_DATA_CH6_4, + S2MPG10_METER_ACC_DATA_CH6_5, + S2MPG10_METER_ACC_DATA_CH6_6, + S2MPG10_METER_ACC_DATA_CH7_1, + S2MPG10_METER_ACC_DATA_CH7_2, + S2MPG10_METER_ACC_DATA_CH7_3, + S2MPG10_METER_ACC_DATA_CH7_4, + S2MPG10_METER_ACC_DATA_CH7_5, + S2MPG10_METER_ACC_DATA_CH7_6, + S2MPG10_METER_ACC_COUNT_1, + S2MPG10_METER_ACC_COUNT_2, + S2MPG10_METER_ACC_COUNT_3, + S2MPG10_METER_LPF_DATA_CH0_1, + S2MPG10_METER_LPF_DATA_CH0_2, + S2MPG10_METER_LPF_DATA_CH0_3, + S2MPG10_METER_LPF_DATA_CH1_1, + S2MPG10_METER_LPF_DATA_CH1_2, + S2MPG10_METER_LPF_DATA_CH1_3, + S2MPG10_METER_LPF_DATA_CH2_1, + S2MPG10_METER_LPF_DATA_CH2_2, + S2MPG10_METER_LPF_DATA_CH2_3, + S2MPG10_METER_LPF_DATA_CH3_1, + S2MPG10_METER_LPF_DATA_CH3_2, + S2MPG10_METER_LPF_DATA_CH3_3, + S2MPG10_METER_LPF_DATA_CH4_1, + S2MPG10_METER_LPF_DATA_CH4_2, + S2MPG10_METER_LPF_DATA_CH4_3, + S2MPG10_METER_LPF_DATA_CH5_1, + S2MPG10_METER_LPF_DATA_CH5_2, + S2MPG10_METER_LPF_DATA_CH5_3, + S2MPG10_METER_LPF_DATA_CH6_1, + S2MPG10_METER_LPF_DATA_CH6_2, + S2MPG10_METER_LPF_DATA_CH6_3, + S2MPG10_METER_LPF_DATA_CH7_1, + S2MPG10_METER_LPF_DATA_CH7_2, + S2MPG10_METER_LPF_DATA_CH7_3, + S2MPG10_METER_DSM_TRIM_OFFSET =3D 0xee, + S2MPG10_METER_BUCK_METER_TRIM3 =3D 0xf1, +}; + +/* S2MPG10 regulator IDs */ +enum s2mpg10_regulators { + S2MPG10_LDO1, + S2MPG10_LDO2, + S2MPG10_LDO3, + S2MPG10_LDO4, + S2MPG10_LDO5, + S2MPG10_LDO6, + S2MPG10_LDO7, + S2MPG10_LDO8, + S2MPG10_LDO9, + S2MPG10_LDO10, + S2MPG10_LDO11, + S2MPG10_LDO12, + S2MPG10_LDO13, + S2MPG10_LDO14, + S2MPG10_LDO15, + S2MPG10_LDO16, + S2MPG10_LDO17, + S2MPG10_LDO18, + S2MPG10_LDO19, + S2MPG10_LDO20, + S2MPG10_LDO21, + S2MPG10_LDO22, + S2MPG10_LDO23, + S2MPG10_LDO24, + S2MPG10_LDO25, + S2MPG10_LDO26, + S2MPG10_LDO27, + S2MPG10_LDO28, + S2MPG10_LDO29, + S2MPG10_LDO30, + S2MPG10_LDO31, + S2MPG10_BUCK1, + S2MPG10_BUCK2, + S2MPG10_BUCK3, + S2MPG10_BUCK4, + S2MPG10_BUCK5, + S2MPG10_BUCK6, + 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:34 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:31 +0100 Subject: [PATCH v4 10/32] mfd: sec: Merge separate core and irq modules Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-10-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 There is no reason to have these two kernel modules separate. Having them merged into one kernel module also slightly reduces memory consumption and module load times a little. mapped size (lsmod): before: after: sec_core 20480 sec_core 24576 sec_irq 16384 ---------------- total 36864 Section sizes (size -A): before: after: sec_core 6780 sec_core 13239 sec_irq 8046 ---------------- Total 14826 Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- Checkpatch suggests to update MAINTAINERS, but the new file is covered already due to using a wildcard. --- drivers/mfd/Makefile | 3 ++- drivers/mfd/{sec-core.c =3D> sec-common.c} | 2 ++ drivers/mfd/sec-irq.c | 9 --------- 3 files changed, 4 insertions(+), 10 deletions(-) diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index b617782eca436e34084a9cd24c309801c5680390..8f315298b32a2a9ee114ed5e49e= 760bd8f930aee 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -228,7 +228,8 @@ obj-$(CONFIG_MFD_RK8XX) +=3D rk8xx-core.o obj-$(CONFIG_MFD_RK8XX_I2C) +=3D rk8xx-i2c.o obj-$(CONFIG_MFD_RK8XX_SPI) +=3D rk8xx-spi.o obj-$(CONFIG_MFD_RN5T618) +=3D rn5t618.o -obj-$(CONFIG_MFD_SEC_CORE) +=3D sec-core.o sec-irq.o +sec-core-objs :=3D sec-common.o sec-irq.o +obj-$(CONFIG_MFD_SEC_CORE) +=3D sec-core.o obj-$(CONFIG_MFD_SEC_ACPM) +=3D sec-acpm.o obj-$(CONFIG_MFD_SEC_I2C) +=3D sec-i2c.o obj-$(CONFIG_MFD_SYSCON) +=3D syscon.o diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-common.c similarity index 98% rename from drivers/mfd/sec-core.c rename to drivers/mfd/sec-common.c index c4b7abe511090d8f5ff2eb501f325cc8173b9bf5..782dec1956a5fd7bf0dbb2159f9= d222ad3fea942 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-common.c @@ -307,6 +307,8 @@ static int sec_pmic_resume(struct device *dev) DEFINE_SIMPLE_DEV_PM_OPS(sec_pmic_pm_ops, sec_pmic_suspend, sec_pmic_resum= e); EXPORT_SYMBOL_GPL(sec_pmic_pm_ops); =20 +MODULE_AUTHOR("Chanwoo Choi "); +MODULE_AUTHOR("Krzysztof Kozlowski "); MODULE_AUTHOR("Sangbeom Kim "); MODULE_DESCRIPTION("Core driver for the Samsung S5M"); MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index e9beaa2a53fb42120eeb465a7c19acb4af6a0e59..b75d7fe86253037b4b7256a4d8c= 089003d58bc44 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -6,7 +6,6 @@ #include #include #include -#include #include #include #include @@ -17,7 +16,6 @@ #include #include #include -#include #include #include "sec-core.h" =20 @@ -510,10 +508,3 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) =20 return 0; } -EXPORT_SYMBOL_GPL(sec_irq_init); - -MODULE_AUTHOR("Sangbeom Kim "); -MODULE_AUTHOR("Chanwoo Choi "); -MODULE_AUTHOR("Krzysztof Kozlowski "); -MODULE_DESCRIPTION("Interrupt support for the S5M MFD"); -MODULE_LICENSE("GPL"); --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ej1-f49.google.com (mail-ej1-f49.google.com [209.85.218.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B54C2116FB for ; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:34 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:32 +0100 Subject: [PATCH v4 11/32] mfd: sec-common: Fix multiple trivial whitespace issues Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-11-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Rectify a couple of alignment problems reported by Checkpatch. Signed-off-by: Andr=C3=A9 Draszik --- v4: - update commit message (Lee) v2: - make new alignment more readable (Krzysztof) --- drivers/mfd/sec-common.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index 782dec1956a5fd7bf0dbb2159f9d222ad3fea942..1a6f14dda825adeaeee1a677459= c7399c144d553 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -149,9 +149,9 @@ sec_pmic_parse_dt_pdata(struct device *dev) return ERR_PTR(-ENOMEM); =20 pd->manual_poweroff =3D of_property_read_bool(dev->of_node, - "samsung,s2mps11-acokb-ground"); + "samsung,s2mps11-acokb-ground"); pd->disable_wrstbi =3D of_property_read_bool(dev->of_node, - "samsung,s2mps11-wrstbi-ground"); + "samsung,s2mps11-wrstbi-ground"); return pd; } =20 @@ -264,8 +264,8 @@ void sec_pmic_shutdown(struct device *dev) * ignore the rest. */ dev_warn(sec_pmic->dev, - "Unsupported device %lu for manual power off\n", - sec_pmic->device_type); + "Unsupported device %lu for manual power off\n", + sec_pmic->device_type); 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Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- drivers/mfd/sec-i2c.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c index 8e3a365ff3e5533e27d94fa8a15dbfa639518a5f..966d116dd781ac6ab63453f641b= 2a68bba3945a9 100644 --- a/drivers/mfd/sec-i2c.c +++ b/drivers/mfd/sec-i2c.c @@ -154,12 +154,12 @@ static int sec_pmic_i2c_probe(struct i2c_client *clie= nt) case S2MPS15X: regmap =3D &s2mps15_regmap_config; break; - case S5M8767X: - regmap =3D &s5m8767_regmap_config; - break; case S2MPU02: regmap =3D &s2mpu02_regmap_config; break; + case S5M8767X: + regmap =3D &s5m8767_regmap_config; + break; default: regmap =3D &sec_regmap_config; break; @@ -184,11 +184,11 @@ static void sec_pmic_i2c_shutdown(struct i2c_client *= i2c) =20 static const struct of_device_id sec_pmic_i2c_of_match[] =3D { { - .compatible =3D "samsung,s5m8767-pmic", - .data =3D (void *)S5M8767X, - }, { .compatible =3D "samsung,s2dos05", .data =3D (void *)S2DOS05, + }, { + .compatible =3D "samsung,s2mpa01-pmic", + .data =3D (void *)S2MPA01, }, { .compatible =3D "samsung,s2mps11-pmic", .data =3D (void *)S2MPS11X, @@ -201,15 +201,15 @@ static const struct of_device_id sec_pmic_i2c_of_matc= h[] =3D { }, { .compatible =3D "samsung,s2mps15-pmic", .data =3D (void *)S2MPS15X, - }, { - .compatible =3D "samsung,s2mpa01-pmic", - .data =3D (void *)S2MPA01, }, { .compatible =3D "samsung,s2mpu02-pmic", .data =3D (void *)S2MPU02, }, { .compatible =3D "samsung,s2mpu05-pmic", .data =3D (void *)S2MPU05, + }, { + .compatible =3D "samsung,s5m8767-pmic", + .data =3D (void *)S5M8767X, }, { }, }; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:35 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:34 +0100 Subject: [PATCH v4 13/32] mfd: sec: Use dev_err_probe() where appropriate Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-13-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 dev_err_probe() exists to simplify code and harmonise error messages, there's no reason not to use it here. While at it, harmonise some error messages. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- drivers/mfd/sec-common.c | 6 +++--- drivers/mfd/sec-i2c.c | 10 +++------- drivers/mfd/sec-irq.c | 14 +++++++------- 3 files changed, 13 insertions(+), 17 deletions(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index 1a6f14dda825adeaeee1a677459c7399c144d553..f4c606c5ee5a809a106b13e9474= 64f35a926b199 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -229,9 +229,9 @@ int sec_pmic_probe(struct device *dev, unsigned long de= vice_type, num_sec_devs =3D ARRAY_SIZE(s2mpu05_devs); break; default: - dev_err(sec_pmic->dev, "Unsupported device type %lu\n", - sec_pmic->device_type); - return -EINVAL; + return dev_err_probe(sec_pmic->dev, -EINVAL, + "Unsupported device type %lu\n", + sec_pmic->device_type); } ret =3D devm_mfd_add_devices(sec_pmic->dev, -1, sec_devs, num_sec_devs, NULL, 0, NULL); diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c index 966d116dd781ac6ab63453f641b2a68bba3945a9..a107a9c1e760f90fcb59a9944b7= 4e9a39a0d946c 100644 --- a/drivers/mfd/sec-i2c.c +++ b/drivers/mfd/sec-i2c.c @@ -134,7 +134,6 @@ static int sec_pmic_i2c_probe(struct i2c_client *client) const struct regmap_config *regmap; unsigned long device_type; struct regmap *regmap_pmic; - int ret; =20 device_type =3D (unsigned long)of_device_get_match_data(&client->dev); =20 @@ -166,12 +165,9 @@ static int sec_pmic_i2c_probe(struct i2c_client *clien= t) } =20 regmap_pmic =3D devm_regmap_init_i2c(client, regmap); - if (IS_ERR(regmap_pmic)) { - ret =3D PTR_ERR(regmap_pmic); - dev_err(&client->dev, "Failed to allocate register map: %d\n", - ret); - return ret; - } + if (IS_ERR(regmap_pmic)) + return dev_err_probe(&client->dev, PTR_ERR(regmap_pmic), + "regmap init failed\n"); =20 return sec_pmic_probe(&client->dev, device_type, client->irq, regmap_pmic, client); diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index b75d7fe86253037b4b7256a4d8c089003d58bc44..340f5f14eba3fad3b25935803dd= 33e91f7ec6629 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -487,18 +487,18 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) sec_irq_chip =3D &s2mpu05_irq_chip; break; default: - dev_err(sec_pmic->dev, "Unknown device type %lu\n", - sec_pmic->device_type); - return -EINVAL; + return dev_err_probe(sec_pmic->dev, -EINVAL, + "Unsupported device type %lu\n", + sec_pmic->device_type); } =20 ret =3D devm_regmap_add_irq_chip(sec_pmic->dev, sec_pmic->regmap_pmic, sec_pmic->irq, IRQF_ONESHOT, 0, sec_irq_chip, &sec_pmic->irq_data); - if (ret !=3D 0) { - dev_err(sec_pmic->dev, "Failed to register IRQ chip: %d\n", ret); - return ret; - } + if (ret !=3D 0) + return dev_err_probe(sec_pmic->dev, ret, + "Failed to add %s IRQ chip\n", + sec_irq_chip->name); =20 /* * The rtc-s5m driver requests S2MPS14_IRQ_RTCA0 also for S2MPS11 --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ej1-f53.google.com (mail-ej1-f53.google.com [209.85.218.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 70EE12153EA for ; Wed, 9 Apr 2025 20:37:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.53 ARC-Seal: i=1; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:36 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:35 +0100 Subject: [PATCH v4 14/32] mfd: sec-i2c: s2dos05/s2mpu05: Use explicit regmap config and drop default Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-14-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 When support for PMICs without compatibles was removed in commit f736d2c0caa8 ("mfd: sec: Remove PMICs without compatibles"), sec_regmap_config effectively became an orphan, because S5M8763X was the only user left of it before removal, using the default: case of the switch statement. When s2dos05 and s2mpu05 support was added in commit bf231e5febcf ("mfd: sec-core: Add support for the Samsung s2dos05") and commit ed33479b7beb ("mfd: sec: Add support for S2MPU05 PMIC"), they ended up using that orphaned regmap_config in a non-obvious way due to the default: case of the device type switch matching statement taking effect again. To make things more obvious, and to help the reader of this code while reasoning about what the intention might be here, and to ensure future additions to support new devices in this driver don't forget to add a regmap config, add an explicit regmap config for these two devices, and completely remove the generic regmap config as it becomes an orphan again that shouldn't be used by any device. Note that this commit doesn't fix the issue that s2dos05_regmap_config ands2mpu05_regmap_config really are incomplete, but I have no documentation on them. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- v2: * squash two previously separate patches into this one (Krzysztof) --- drivers/mfd/sec-i2c.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c index a107a9c1e760f90fcb59a9944b74e9a39a0d946c..81f90003eea2a40f2caaebb49fc= 9494b89370e7f 100644 --- a/drivers/mfd/sec-i2c.c +++ b/drivers/mfd/sec-i2c.c @@ -61,7 +61,7 @@ static bool s2mpu02_volatile(struct device *dev, unsigned= int reg) } } =20 -static const struct regmap_config sec_regmap_config =3D { +static const struct regmap_config s2dos05_regmap_config =3D { .reg_bits =3D 8, .val_bits =3D 8, }; @@ -120,6 +120,11 @@ static const struct regmap_config s2mpu02_regmap_confi= g =3D { .cache_type =3D REGCACHE_FLAT, }; =20 +static const struct regmap_config s2mpu05_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, +}; + static const struct regmap_config s5m8767_regmap_config =3D { .reg_bits =3D 8, .val_bits =3D 8, @@ -138,6 +143,9 @@ static int sec_pmic_i2c_probe(struct i2c_client *client) device_type =3D (unsigned long)of_device_get_match_data(&client->dev); =20 switch (device_type) { + case S2DOS05: + regmap =3D &s2dos05_regmap_config; + break; case S2MPA01: regmap =3D &s2mpa01_regmap_config; break; @@ -156,12 +164,16 @@ static int sec_pmic_i2c_probe(struct i2c_client *clie= nt) case S2MPU02: regmap =3D &s2mpu02_regmap_config; break; + case S2MPU05: + regmap =3D &s2mpu05_regmap_config; + break; case S5M8767X: regmap =3D &s5m8767_regmap_config; break; default: - regmap =3D &sec_regmap_config; - break; + return dev_err_probe(&client->dev, -ENODEV, + "Unsupported device type %lu\n", + device_type); } =20 regmap_pmic =3D devm_regmap_init_i2c(client, regmap); --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ej1-f48.google.com (mail-ej1-f48.google.com [209.85.218.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3216E215175 for ; Wed, 9 Apr 2025 20:37:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:36 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:36 +0100 Subject: [PATCH v4 15/32] mfd: sec-irq: s2dos05 doesn't support interrupts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-15-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 The commit bf231e5febcf ("mfd: sec-core: Add support for the Samsung s2dos05") adding s2dos05 support didn't add anything related to IRQ support, so I assume this works without IRQs. Rather than printing a warning message in sec_irq_init() due to the missing IRQ number, or returning an error due to a missing irq chip regmap, just return early explicitly. This will become particularly important once errors from sec_irq_init() aren't ignored anymore in an upcoming patch and helps the reader of this code while reasoning about what the intention might be here. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- drivers/mfd/sec-irq.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 340f5f14eba3fad3b25935803dd33e91f7ec6629..79b4f74b05a24e413a84ff8c0b1= 6156a828310e5 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -452,16 +452,12 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) int type =3D sec_pmic->device_type; const struct regmap_irq_chip *sec_irq_chip; =20 - if (!sec_pmic->irq) { - dev_warn(sec_pmic->dev, - "No interrupt specified, no interrupts\n"); - return 0; - } - switch (type) { case S5M8767X: sec_irq_chip =3D &s5m8767_irq_chip; break; + case S2DOS05: + return 0; case S2MPA01: sec_irq_chip =3D &s2mps14_irq_chip; break; @@ -492,6 +488,12 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) sec_pmic->device_type); } =20 + if (!sec_pmic->irq) { + dev_warn(sec_pmic->dev, + "No interrupt specified, no interrupts\n"); + return 0; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:37 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:37 +0100 Subject: [PATCH v4 16/32] mfd: sec-common: Don't ignore errors from sec_irq_init() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-16-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 sec_irq_init() can fail, we shouldn't continue and ignore the error in that case, but actually error out. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- drivers/mfd/sec-common.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index f4c606c5ee5a809a106b13e947464f35a926b199..bb0eb3c2d9a260ddf2fb110cc25= 5f08a0d25230d 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -183,7 +183,9 @@ int sec_pmic_probe(struct device *dev, unsigned long de= vice_type, =20 sec_pmic->pdata =3D pdata; =20 - sec_irq_init(sec_pmic); + ret =3D sec_irq_init(sec_pmic); + if (ret) + return ret; =20 pm_runtime_set_active(sec_pmic->dev); =20 --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ej1-f49.google.com (mail-ej1-f49.google.com [209.85.218.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0438621770B for ; Wed, 9 Apr 2025 20:37:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744231066; cv=none; b=VGAZjah/HxNPXi9j/RLbgUFr5u1XPDgvnHAdWxZsuqp7JWBPxOHPL8lBkPyZP7gY+9wEK+EeKWovJH0xu6pInPb+R8HE6Vpy909hrk8SxWlNaRkKXQcUcZEIBUyWXLKEZ2WQwjVvhKkip8cyTnjyIJBBJ4bl3HSumDTZM9+do20= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744231066; c=relaxed/simple; bh=W4s100yFl52kQPJvrE88DOF1vm0fVLWyudBdnMinRnE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=oNsgFF5XFbrHYGly6h+3jBF816Y885RknZ8s+uqlkofkGR+U8vAGFvsvR0/CRyhFOYL/vLe1jF01Jptw6iiCwRT3H3Pmxzs4jEryMtsm0HuDCBQSbzTUiZh/vXDzT8FPXCZxNRt1UO4TWWJqGn15M2P2G1TumXX9ca+Vje9ILoU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=JUskW0xN; arc=none smtp.client-ip=209.85.218.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="JUskW0xN" Received: by mail-ej1-f49.google.com with SMTP id a640c23a62f3a-ac6ed4ab410so16505466b.1 for ; Wed, 09 Apr 2025 13:37:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1744231058; x=1744835858; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=UWLP4HLc4UA2Mdu/pVqh9n9FuWQ3oivZb2FxzUkaJvg=; b=JUskW0xND7cAbtwDazw+s7RU2qA6mParqJ8l8zi9jEgyBIHkNNGNxnDKlrKzVjgv9+ EuPjzeac+3e3XDEjno/IBZMrdhBFd66pKWStKqoWWyosLqg+VA49QQOUcjHh4pQ4Y4vT 4WJ23BRM4UFvhbzrYPQgCAbxdghpnXoM/+YQ5UbG6nniEGn3aqKdR3Md0X4BDMpOOm2r gXnCsr/YLpVxf5MkesY6bbm2U1dKE+sChDzqA9LeCpt1woJ8xGu/+5zji8fiHTcZS9ql AR56h4Mxm3c7bOi+wFkjezYLWS5gERmaFOdFMW43TNo0A02gXu0cKPdDt5A7wUp11C/+ +UpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744231058; x=1744835858; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UWLP4HLc4UA2Mdu/pVqh9n9FuWQ3oivZb2FxzUkaJvg=; b=LeQTLQ/sNs31Rjxrbstq/4HlVQHL3eFnvMunX/V68eTPeoGD3w2qKQmMWoM4DjW35i 03lVh7Sr7Pag2JszOsM2xmr/wQo9cVIKFGOaVoSp+KAtysh41xDTh5PDbzepNz82qrCU HIVqMMovk2kKbkt9unrifwumpq72jmP1JVi+Qz3KXH0kiKp/grnPZUbbRNHBlB0AkXAY 5/RO6sI9rehtvXRpuhvDaKRpLcaQoYdGTNbRaasAv/W+X9NPZZtL6s7u4M/abjLPgMuT MghtS+qv7nwDRNttPXNTCtVdAfVMkmSLR6hV73usnvQMDjxMRmcitJtmtw8r2zDuNZ7n kbEw== X-Forwarded-Encrypted: i=1; AJvYcCXxbx49RHd7Pr93Fdwl7bp+70A/KB2ZTC5SQX/HZ/IQmpQSshLwCBWtcBllCrCChmhCNvMOTfXYrfE2gNU=@vger.kernel.org X-Gm-Message-State: AOJu0Yyl3dl/tDew0yk98ONQzbMJxy6n+PkKppGuWw4B3rUNsy/xX3Ph 0hmkc7XITtVmypKj9pdsksIvW1pfisgWvbqBBE7aqcaEXu5cwgofGo+tpFdL7Vg= X-Gm-Gg: ASbGncsN2+Q99BNKCCi3w2azgGeYmOfCqwc3mR5Le+xeKY6wjGbTbcQtT6NFb/i8Nl9 2edP9K82sevUStzuzac27VBl1bLYZGSO4/G5QNV0FPjvkcNP30RpCBu5lamb1BS/kKNsDteyUdO qxUL8KT750xkamatt6ovru3yoxHjiQ8Efwk3j2XGMGI6kN6FDsnrRmeL6yYfFuL6gqdaBbVzGrf 39ydFGsZK2JuPjcdNQ9gKWyKNWjkoHEQ+GiunOaw5Y8hM5WZ6wh/TLfdZAKiTDcgSF9oez4LyC1 Vkv66b2Smuu0NxL2Dd05mgYS9wfRthcqdL8SuMnC2tr0zv3ZtRvNL4IKI1gMgH2r13aGihZUJEH gcmINw1WSUkiBx2jCpyYBXnQRUnk= X-Google-Smtp-Source: AGHT+IHOV/1MZhdPuVZA1g3x1ax7OdrN436ASrU1pnao8gKn9m3hB99bG/q0F2E9xqZW861rUz2aXg== X-Received: by 2002:a17:907:9496:b0:ac3:b50c:c95b with SMTP id a640c23a62f3a-acabd4d7f0amr7061266b.56.1744231058355; Wed, 09 Apr 2025 13:37:38 -0700 (PDT) Received: from puffmais.c.googlers.com (40.162.204.35.bc.googleusercontent.com. [35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:37 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:38 +0100 Subject: [PATCH v4 17/32] mfd: sec-i2c: Rework platform data and regmap instantiating Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-17-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 Instead of a large open-coded switch statement, just add both regmap config and device type to the OF match data. This allows us to have all related information in one place, and avoids a long switch() statement. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- v2: fix typo in platform data for "samsung,s2mps14-pmic" --- drivers/mfd/sec-i2c.c | 133 +++++++++++++++++++++++++---------------------= ---- 1 file changed, 66 insertions(+), 67 deletions(-) diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c index 81f90003eea2a40f2caaebb49fc9494b89370e7f..41b09f5e3c49f410604a5d47e62= 5cbb37d7f5fa2 100644 --- a/drivers/mfd/sec-i2c.c +++ b/drivers/mfd/sec-i2c.c @@ -20,11 +20,16 @@ #include #include #include -#include #include +#include #include #include "sec-core.h" =20 +struct sec_pmic_i2c_platform_data { + const struct regmap_config *regmap_cfg; + unsigned long device_type; +}; + static bool s2mpa01_volatile(struct device *dev, unsigned int reg) { switch (reg) { @@ -136,52 +141,20 @@ static const struct regmap_config s5m8767_regmap_conf= ig =3D { =20 static int sec_pmic_i2c_probe(struct i2c_client *client) { - const struct regmap_config *regmap; - unsigned long device_type; + const struct sec_pmic_i2c_platform_data *pdata; struct regmap *regmap_pmic; =20 - device_type =3D (unsigned long)of_device_get_match_data(&client->dev); - - switch (device_type) { - case S2DOS05: - regmap =3D &s2dos05_regmap_config; - break; - case S2MPA01: - regmap =3D &s2mpa01_regmap_config; - break; - case S2MPS11X: - regmap =3D &s2mps11_regmap_config; - break; - case S2MPS13X: - regmap =3D &s2mps13_regmap_config; - break; - case S2MPS14X: - regmap =3D &s2mps14_regmap_config; - break; - case S2MPS15X: - regmap =3D &s2mps15_regmap_config; - break; - case S2MPU02: - regmap =3D &s2mpu02_regmap_config; - break; - case S2MPU05: - regmap =3D &s2mpu05_regmap_config; - break; - case S5M8767X: - regmap =3D &s5m8767_regmap_config; - break; - default: + pdata =3D device_get_match_data(&client->dev); + if (!pdata) return dev_err_probe(&client->dev, -ENODEV, - "Unsupported device type %lu\n", - device_type); - } + "Unsupported device type\n"); =20 - regmap_pmic =3D devm_regmap_init_i2c(client, regmap); + regmap_pmic =3D devm_regmap_init_i2c(client, pdata->regmap_cfg); if (IS_ERR(regmap_pmic)) return dev_err_probe(&client->dev, PTR_ERR(regmap_pmic), "regmap init failed\n"); =20 - return sec_pmic_probe(&client->dev, device_type, client->irq, + return sec_pmic_probe(&client->dev, pdata->device_type, client->irq, regmap_pmic, client); } =20 @@ -190,35 +163,61 @@ static void sec_pmic_i2c_shutdown(struct i2c_client *= i2c) sec_pmic_shutdown(&i2c->dev); } =20 +static const struct sec_pmic_i2c_platform_data s2dos05_data =3D { + .regmap_cfg =3D &s2dos05_regmap_config, + .device_type =3D S2DOS05 +}; + +static const struct sec_pmic_i2c_platform_data s2mpa01_data =3D { + .regmap_cfg =3D &s2mpa01_regmap_config, + .device_type =3D S2MPA01, +}; + +static const struct sec_pmic_i2c_platform_data s2mps11_data =3D { + .regmap_cfg =3D &s2mps11_regmap_config, + .device_type =3D S2MPS11X, +}; + +static const struct sec_pmic_i2c_platform_data s2mps13_data =3D { + .regmap_cfg =3D &s2mps13_regmap_config, + .device_type =3D S2MPS13X, +}; + +static const struct sec_pmic_i2c_platform_data s2mps14_data =3D { + .regmap_cfg =3D &s2mps14_regmap_config, + .device_type =3D S2MPS14X, +}; + +static const struct sec_pmic_i2c_platform_data s2mps15_data =3D { + .regmap_cfg =3D &s2mps15_regmap_config, + .device_type =3D S2MPS15X, +}; + +static const struct sec_pmic_i2c_platform_data s2mpu02_data =3D { + .regmap_cfg =3D &s2mpu02_regmap_config, + .device_type =3D S2MPU02, +}; + +static const struct sec_pmic_i2c_platform_data s2mpu05_data =3D { + .regmap_cfg =3D &s2mpu05_regmap_config, + .device_type =3D S2MPU05, +}; + +static const struct sec_pmic_i2c_platform_data s5m8767_data =3D { + .regmap_cfg =3D &s5m8767_regmap_config, + .device_type =3D S5M8767X, +}; + static const struct of_device_id sec_pmic_i2c_of_match[] =3D { - { - .compatible =3D "samsung,s2dos05", - .data =3D (void *)S2DOS05, - }, { - .compatible =3D "samsung,s2mpa01-pmic", - .data =3D (void *)S2MPA01, - }, { - .compatible =3D "samsung,s2mps11-pmic", - .data =3D (void *)S2MPS11X, - }, { - .compatible =3D "samsung,s2mps13-pmic", - .data =3D (void *)S2MPS13X, - }, { - .compatible =3D "samsung,s2mps14-pmic", - .data =3D (void *)S2MPS14X, - }, { - .compatible =3D "samsung,s2mps15-pmic", - .data =3D (void *)S2MPS15X, - }, { - .compatible =3D "samsung,s2mpu02-pmic", - .data =3D (void *)S2MPU02, - }, { - .compatible =3D "samsung,s2mpu05-pmic", - .data =3D (void *)S2MPU05, - }, { - .compatible =3D "samsung,s5m8767-pmic", - .data =3D (void *)S5M8767X, - }, + { .compatible =3D "samsung,s2dos05", .data =3D &s2dos05_data, }, + { .compatible =3D "samsung,s2mpa01-pmic", .data =3D &s2mpa01_data, }, + { .compatible =3D "samsung,s2mps11-pmic", .data =3D &s2mps11_data, }, + { .compatible =3D "samsung,s2mps13-pmic", .data =3D &s2mps13_data, }, + { .compatible =3D "samsung,s2mps14-pmic", .data =3D &s2mps14_data, }, + { .compatible =3D "samsung,s2mps15-pmic", .data =3D &s2mps15_data, }, + { .compatible =3D "samsung,s2mpu02-pmic", .data =3D &s2mpu02_data, }, + { .compatible =3D "samsung,s2mpu05-pmic", .data =3D &s2mpu05_data, }, + { .compatible =3D "samsung,s5m8767-pmic", .data =3D &s5m8767_data, }, { }, }; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:38 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:39 +0100 Subject: [PATCH v4 18/32] mfd: sec: Change device_type to int Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-18-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Now that sec-i2c doesn't match device type by pointer casting anymore, we can switch the device type from unsigned long to int easily. This saves a few bytes in struct sec_pmic_dev due to member alignment. Signed-off-by: Andr=C3=A9 Draszik --- drivers/mfd/sec-common.c | 9 ++++----- drivers/mfd/sec-core.h | 5 ++--- drivers/mfd/sec-i2c.c | 2 +- drivers/mfd/sec-irq.c | 5 ++--- include/linux/mfd/samsung/core.h | 2 +- 5 files changed, 10 insertions(+), 13 deletions(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index bb0eb3c2d9a260ddf2fb110cc255f08a0d25230d..4871492548f5efde4248b5b3db7= 4045ec8c9d676 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -155,9 +155,8 @@ sec_pmic_parse_dt_pdata(struct device *dev) return pd; } =20 -int sec_pmic_probe(struct device *dev, unsigned long device_type, - unsigned int irq, struct regmap *regmap, - struct i2c_client *client) +int sec_pmic_probe(struct device *dev, int device_type, unsigned int irq, + struct regmap *regmap, struct i2c_client *client) { struct sec_platform_data *pdata; const struct mfd_cell *sec_devs; @@ -232,7 +231,7 @@ int sec_pmic_probe(struct device *dev, unsigned long de= vice_type, break; default: return dev_err_probe(sec_pmic->dev, -EINVAL, - "Unsupported device type %lu\n", + "Unsupported device type %d\n", sec_pmic->device_type); } ret =3D devm_mfd_add_devices(sec_pmic->dev, -1, sec_devs, num_sec_devs, @@ -266,7 +265,7 @@ void sec_pmic_shutdown(struct device *dev) * ignore the rest. */ dev_warn(sec_pmic->dev, - "Unsupported device %lu for manual power off\n", + "Unsupported device %d for manual power off\n", sec_pmic->device_type); return; } diff --git a/drivers/mfd/sec-core.h b/drivers/mfd/sec-core.h index a0a3488924d96f69373e7569079cfefd0544ca26..92c7558ab8b0de44a52e028eeb7= 998e38358cb4c 100644 --- a/drivers/mfd/sec-core.h +++ b/drivers/mfd/sec-core.h @@ -14,9 +14,8 @@ struct i2c_client; =20 extern const struct dev_pm_ops sec_pmic_pm_ops; =20 -int sec_pmic_probe(struct device *dev, unsigned long device_type, - unsigned int irq, struct regmap *regmap, - struct i2c_client *client); +int sec_pmic_probe(struct device *dev, int device_type, unsigned int irq, + struct regmap *regmap, struct i2c_client *client); void sec_pmic_shutdown(struct device *dev); =20 int sec_irq_init(struct sec_pmic_dev *sec_pmic); diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c index 41b09f5e3c49f410604a5d47e625cbb37d7f5fa2..2ccb494c8c024361c78e92be71c= e9c215757dd89 100644 --- a/drivers/mfd/sec-i2c.c +++ b/drivers/mfd/sec-i2c.c @@ -27,7 +27,7 @@ =20 struct sec_pmic_i2c_platform_data { const struct regmap_config *regmap_cfg; - unsigned long device_type; + int device_type; }; =20 static bool s2mpa01_volatile(struct device *dev, unsigned int reg) diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 79b4f74b05a24e413a84ff8c0b16156a828310e5..54c674574c701eec979d8c6a949= 09b78dcc77065 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -449,10 +449,9 @@ static const struct regmap_irq_chip s5m8767_irq_chip = =3D { int sec_irq_init(struct sec_pmic_dev *sec_pmic) { int ret =3D 0; - int type =3D sec_pmic->device_type; const struct regmap_irq_chip *sec_irq_chip; =20 - switch (type) { + switch (sec_pmic->device_type) { case S5M8767X: sec_irq_chip =3D &s5m8767_irq_chip; break; @@ -484,7 +483,7 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) break; default: return dev_err_probe(sec_pmic->dev, -EINVAL, - "Unsupported device type %lu\n", + "Unsupported device type %d\n", sec_pmic->device_type); } =20 diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/c= ore.h index c1102324172a9b6bd6072b5929a4866d6c9653fa..d785e101fe795a5d8f9cccf4ccc= 4232437e89416 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h @@ -67,7 +67,7 @@ struct sec_pmic_dev { struct regmap *regmap_pmic; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:38 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:40 +0100 Subject: [PATCH v4 19/32] mfd: sec: Don't compare against NULL / 0 for errors, use ! Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-19-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Follow general style and use if (!arg) instead of comparing against NULL. While at it, drop a useless init in sec-irq.c. Signed-off-by: Andr=C3=A9 Draszik --- drivers/mfd/sec-common.c | 2 +- drivers/mfd/sec-irq.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index 4871492548f5efde4248b5b3db74045ec8c9d676..55edeb0f73ff4643f23b9759b11= 5658d3bf03e9a 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -164,7 +164,7 @@ int sec_pmic_probe(struct device *dev, int device_type,= unsigned int irq, int ret, num_sec_devs; =20 sec_pmic =3D devm_kzalloc(dev, sizeof(struct sec_pmic_dev), GFP_KERNEL); - if (sec_pmic =3D=3D NULL) + if (!sec_pmic) return -ENOMEM; =20 dev_set_drvdata(dev, sec_pmic); diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 54c674574c701eec979d8c6a94909b78dcc77065..4a6585a6acdb71d2fb368ddf384= 63f001e513c7c 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -448,8 +448,8 @@ static const struct regmap_irq_chip s5m8767_irq_chip = =3D { =20 int sec_irq_init(struct sec_pmic_dev *sec_pmic) { - int ret =3D 0; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:39 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:41 +0100 Subject: [PATCH v4 20/32] mfd: sec-common: Use sizeof(*var), not sizeof(struct type_of_var) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-20-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Using sizeof(*var) is generally preferred over using the size of its open-coded type when allocating memory. This helps avoiding bugs when the variable type changes but the memory allocation isn't updated, and it simplifies renaming of the struct if ever necessary. No functional change. Signed-off-by: Andr=C3=A9 Draszik --- drivers/mfd/sec-common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index 55edeb0f73ff4643f23b9759b115658d3bf03e9a..e8e35f7d5f06b522a953e8f2160= 3e6904401c983 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -163,7 +163,7 @@ int sec_pmic_probe(struct device *dev, int device_type,= unsigned int irq, struct sec_pmic_dev *sec_pmic; int ret, num_sec_devs; =20 - sec_pmic =3D devm_kzalloc(dev, sizeof(struct sec_pmic_dev), GFP_KERNEL); + sec_pmic =3D devm_kzalloc(dev, sizeof(*sec_pmic), GFP_KERNEL); if (!sec_pmic) return -ENOMEM; =20 --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ed1-f53.google.com (mail-ed1-f53.google.com [209.85.208.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2817219E93 for ; Wed, 9 Apr 2025 20:37:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744231067; cv=none; b=p3PB/SyMMjnhSzFpJSiQhvYvd66Qri5/vlFyv5ger0yfFQZQ+/JveezqloFy9RqmoSCAcw9dEAWoS0lFV+gtAvNLOLibn/ftoxQh7SpvTrlKR9/jQXyROQUwFwy6xl/1VTEQdg6WgH018Sqt9TIudgdqheE1XzeyCbDgUzEKTuQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744231067; c=relaxed/simple; bh=3OWU4PadtGYnTOgmPw8gXiDUPGbaAd/UPB8FUmZS3tg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UCeI1Nrw0F9l7JF3HFyTv6Z3PKYxhV1wpmMH0sVKKWD7eXOTla/4FBS0ZrMjq3NNY4ewaEjX3efdlOOHBIBEp1p4jxAkw/k+/HMLJ2EfDyOe+sRoouwkBGKhBjBtSlp+XEYtqwqw5qYXnvfPVvv+4pYH76HrZpKN5MdrXNE/PAs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=Ft4Jz9jb; arc=none smtp.client-ip=209.85.208.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Ft4Jz9jb" Received: by mail-ed1-f53.google.com with SMTP id 4fb4d7f45d1cf-5e5deb6482cso2257411a12.1 for ; Wed, 09 Apr 2025 13:37:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1744231060; x=1744835860; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=2K+kGSEI7CbW62pffu4JaosdNeVJj1iuYtYl/IPqMzs=; b=Ft4Jz9jbMd1y08XA5sIYuyQpoPqAntACey9vUeLu+HxanYGg5jA/mMLzJ/F60Ch7oQ ekqCc+VOJWz6PFIpIedCa9OsZeQt3S7ZFeCNhIYoLGZe86yu/stCpTTBUMTcvYyHP+/Q 2hTmIKTa2WwGDaqDmVyhPTJIpV0dRnsZRck1d+0Iq76t2LDdBQ2BHr9dlyDUZ6jslh+V R6NFBhcYaw/eXa9ZAjR+3sjCfNPjq+kjvf4g64pq9HKcMDJHPeOOFwjXm/TuRgfiX/h/ Zr5UIpsqfshMA5sBwoLFtrV4ZXx7Ejy9gHJz3IdL/h5CAn+Zr5bPlh6iLfnWRvyfoSWe kXtw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744231060; x=1744835860; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2K+kGSEI7CbW62pffu4JaosdNeVJj1iuYtYl/IPqMzs=; b=EfaYXNGQ460j2jcS1J4ulXYYsXWLYDyzJbVL551q0BRvOF6f6FjWOFXpUY3eu9FPql OWRHpPLCE5516qaovc+3cQZjqG4cMmiX0mzlcPLMXGoRi682xhcidQYcPK4RMh8ZwKW9 YO5nYBH9BlzjxQpT1u5EMOGWTEGeoiFCBe6TpkTNxknuGvD+j7nT0hpwpd+USgVOJuyH 5OZWBQnN5vLYX2tpq1SuwdfzbsZudZNosTgiJleKbM6bAke+GBFb+1rJSJ5/o7FgmCTK XzgIT5HdTXgGmPPMfaMQVyogqTkdBWRwZbjQ3WtqAFHvjX4NxWELWzc/kjQXo7VrfaVR kjEA== X-Forwarded-Encrypted: i=1; AJvYcCXpkwEKLOFXhYExQrjnKSR3ZlzrYwgdhe8CtA9bI0y7JY1JBy76gVeWofCLUwqYANJF1ddZVzges0flFYo=@vger.kernel.org X-Gm-Message-State: AOJu0YxrJ/ddd9M0/k6Twf9Vd0BzcXr5OaH8eLSFvvwPJlcDiQnnFaJh wnrTkNPAH++yAjgCRsfeVRUeIk2IlvUFPESutCMtHaP/hZHOR0+8dWSGF2e0CAQ= X-Gm-Gg: ASbGnctSIindLvyGj3aYvRsGvbMY4roNZ1vu5hr+VWY+327pMJMftxs45wm7PPCvOMT JK45aF0n1zKmExIqP/3B+bcSN0C42wdZxuQoAOZoF3DLgud6qGtqMcEo7DJwC5yuKxha4/XF359 /pCs6J7utqTrLYlWmW1nmR3tPM0oEFE8GD4G2w0fCDoNerODFFuxTUyEPzo8wsUM3yiNHLAYs3p uZGggk2mav15ue2pyIx/Yc+4HqPCcH8rIxj31ZQPsBpzWATCIWos7Wg8+Bk6GDn5hfDpD12uz1K 5UuG39zqZSuzGEH6bSwTAln6WF57sFgfUbemFpeScMJUzyrH3oHlpsvs5lM2dTTj8empW8dn+Zv 4xki3z9/k28nxP53kuvFo3tgwTqc= X-Google-Smtp-Source: AGHT+IEEu5frM78xjaYtfvJpOfPA05D1eB7ySMJAK47y8ri2kTuUJkGDYBSO/DNVkH448CBSxwwKIQ== X-Received: by 2002:a17:906:dc8d:b0:aca:b45a:7c85 with SMTP id a640c23a62f3a-acabd39ea82mr7993866b.19.1744231060332; Wed, 09 Apr 2025 13:37:40 -0700 (PDT) Received: from puffmais.c.googlers.com (40.162.204.35.bc.googleusercontent.com. [35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:39 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:42 +0100 Subject: [PATCH v4 21/32] mfd: sec-common: Convert to using MFD_CELL macros Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-21-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Use MFD_CELL macro helpers instead of open coding. This makes the code a bit shorter and more obvious. Signed-off-by: Andr=C3=A9 Draszik --- drivers/mfd/sec-common.c | 57 ++++++++++++++++++--------------------------= ---- 1 file changed, 21 insertions(+), 36 deletions(-) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index e8e35f7d5f06b522a953e8f21603e6904401c983..448300ab547c10d81f9f2b2798d= 54c8a03c714d8 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -24,16 +24,13 @@ #include "sec-core.h" =20 static const struct mfd_cell s5m8767_devs[] =3D { - { .name =3D "s5m8767-pmic", }, - { .name =3D "s5m-rtc", }, - { - .name =3D "s5m8767-clk", - .of_compatible =3D "samsung,s5m8767-clk", - }, + MFD_CELL_NAME("s5m8767-pmic"), + MFD_CELL_NAME("s5m-rtc"), + MFD_CELL_OF("s5m8767-clk", NULL, NULL, 0, 0, "samsung,s5m8767-clk"), }; =20 static const struct mfd_cell s2dos05_devs[] =3D { - { .name =3D "s2dos05-regulator", }, + MFD_CELL_NAME("s2dos05-regulator"), }; =20 static const struct mfd_cell s2mpg10_devs[] =3D { @@ -45,53 +42,41 @@ static const struct mfd_cell s2mpg10_devs[] =3D { }; =20 static const struct mfd_cell s2mps11_devs[] =3D { - { .name =3D "s2mps11-regulator", }, - { .name =3D "s2mps14-rtc", }, - { - .name =3D "s2mps11-clk", - .of_compatible =3D "samsung,s2mps11-clk", - }, + MFD_CELL_NAME("s2mps11-regulator"), + MFD_CELL_NAME("s2mps14-rtc"), + MFD_CELL_OF("s2mps11-clk", NULL, NULL, 0, 0, "samsung,s2mps11-clk"), }; =20 static const struct mfd_cell s2mps13_devs[] =3D { - { .name =3D "s2mps13-regulator", }, - { .name =3D "s2mps13-rtc", }, - { - .name =3D "s2mps13-clk", - .of_compatible =3D "samsung,s2mps13-clk", - }, + MFD_CELL_NAME("s2mps13-regulator"), + MFD_CELL_NAME("s2mps13-rtc"), + MFD_CELL_OF("s2mps13-clk", NULL, NULL, 0, 0, "samsung,s2mps13-clk"), }; =20 static const struct mfd_cell s2mps14_devs[] =3D { - { .name =3D "s2mps14-regulator", }, - { .name =3D "s2mps14-rtc", }, - { - .name =3D "s2mps14-clk", - .of_compatible =3D "samsung,s2mps14-clk", - }, + MFD_CELL_NAME("s2mps14-regulator"), + MFD_CELL_NAME("s2mps14-rtc"), + MFD_CELL_OF("s2mps14-clk", NULL, NULL, 0, 0, "samsung,s2mps14-clk"), }; =20 static const struct mfd_cell s2mps15_devs[] =3D { - { .name =3D "s2mps15-regulator", }, - { .name =3D "s2mps15-rtc", }, - { - .name =3D "s2mps13-clk", - .of_compatible =3D "samsung,s2mps13-clk", - }, + MFD_CELL_NAME("s2mps15-regulator"), + MFD_CELL_NAME("s2mps15-rtc"), + MFD_CELL_OF("s2mps13-clk", NULL, NULL, 0, 0, "samsung,s2mps13-clk"), }; =20 static const struct mfd_cell s2mpa01_devs[] =3D { - { .name =3D "s2mpa01-pmic", }, - { .name =3D "s2mps14-rtc", }, + MFD_CELL_NAME("s2mpa01-pmic"), + MFD_CELL_NAME("s2mps14-rtc"), }; =20 static const struct mfd_cell s2mpu02_devs[] =3D { - { .name =3D "s2mpu02-regulator", }, + MFD_CELL_NAME("s2mpu02-regulator"), }; =20 static const struct mfd_cell s2mpu05_devs[] =3D { - { .name =3D "s2mpu05-regulator", }, - { .name =3D "s2mps15-rtc", }, + MFD_CELL_NAME("s2mpu05-regulator"), + MFD_CELL_NAME("s2mps15-rtc"), }; =20 static void sec_pmic_dump_rev(struct sec_pmic_dev *sec_pmic) --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ej1-f53.google.com (mail-ej1-f53.google.com [209.85.218.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 451F4219A93 for ; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:40 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:43 +0100 Subject: [PATCH v4 22/32] mfd: sec-irq: Convert to using REGMAP_IRQ_REG() macros Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-22-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Use REGMAP_IRQ_REG macro helpers instead of open coding. This makes the code a bit shorter and more obvious. Signed-off-by: Andr=C3=A9 Draszik --- drivers/mfd/sec-irq.c | 343 +++++++++++-----------------------------------= ---- 1 file changed, 75 insertions(+), 268 deletions(-) diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index 4a6585a6acdb71d2fb368ddf38463f001e513c7c..c5c80b1ba104e6c5a55b442d2f1= 0a8554201a961 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -74,212 +74,68 @@ static const struct regmap_irq s2mpg10_irqs[] =3D { }; =20 static const struct regmap_irq s2mps11_irqs[] =3D { - [S2MPS11_IRQ_PWRONF] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_PWRONF_MASK, - }, - [S2MPS11_IRQ_PWRONR] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_PWRONR_MASK, - }, - [S2MPS11_IRQ_JIGONBF] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_JIGONBF_MASK, - }, - [S2MPS11_IRQ_JIGONBR] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_JIGONBR_MASK, - }, - [S2MPS11_IRQ_ACOKBF] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_ACOKBF_MASK, - }, - [S2MPS11_IRQ_ACOKBR] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_ACOKBR_MASK, - }, - [S2MPS11_IRQ_PWRON1S] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_PWRON1S_MASK, - }, - [S2MPS11_IRQ_MRB] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_MRB_MASK, - }, - [S2MPS11_IRQ_RTC60S] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_RTC60S_MASK, - }, - [S2MPS11_IRQ_RTCA1] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_RTCA1_MASK, - }, - [S2MPS11_IRQ_RTCA0] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_RTCA0_MASK, - }, - [S2MPS11_IRQ_SMPL] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_SMPL_MASK, - }, - [S2MPS11_IRQ_RTC1S] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_RTC1S_MASK, - }, - [S2MPS11_IRQ_WTSR] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_WTSR_MASK, - }, - [S2MPS11_IRQ_INT120C] =3D { - .reg_offset =3D 2, - .mask =3D S2MPS11_IRQ_INT120C_MASK, - }, - [S2MPS11_IRQ_INT140C] =3D { - .reg_offset =3D 2, - .mask =3D S2MPS11_IRQ_INT140C_MASK, - }, + REGMAP_IRQ_REG(S2MPS11_IRQ_PWRONF, 0, S2MPS11_IRQ_PWRONF_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_PWRONR, 0, S2MPS11_IRQ_PWRONR_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_JIGONBF, 0, S2MPS11_IRQ_JIGONBF_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_JIGONBR, 0, S2MPS11_IRQ_JIGONBR_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_ACOKBF, 0, S2MPS11_IRQ_ACOKBF_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_ACOKBR, 0, S2MPS11_IRQ_ACOKBR_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_PWRON1S, 0, S2MPS11_IRQ_PWRON1S_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_MRB, 0, S2MPS11_IRQ_MRB_MASK), + + REGMAP_IRQ_REG(S2MPS11_IRQ_RTC60S, 1, S2MPS11_IRQ_RTC60S_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_RTCA1, 1, S2MPS11_IRQ_RTCA1_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_RTCA0, 1, S2MPS11_IRQ_RTCA0_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_SMPL, 1, S2MPS11_IRQ_SMPL_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_RTC1S, 1, S2MPS11_IRQ_RTC1S_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_WTSR, 1, S2MPS11_IRQ_WTSR_MASK), + + REGMAP_IRQ_REG(S2MPS11_IRQ_INT120C, 2, S2MPS11_IRQ_INT120C_MASK), + REGMAP_IRQ_REG(S2MPS11_IRQ_INT140C, 2, S2MPS11_IRQ_INT140C_MASK), }; =20 static const struct regmap_irq s2mps14_irqs[] =3D { - [S2MPS14_IRQ_PWRONF] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_PWRONF_MASK, - }, - [S2MPS14_IRQ_PWRONR] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_PWRONR_MASK, - }, - [S2MPS14_IRQ_JIGONBF] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_JIGONBF_MASK, - }, - [S2MPS14_IRQ_JIGONBR] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_JIGONBR_MASK, - }, - [S2MPS14_IRQ_ACOKBF] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_ACOKBF_MASK, - }, - [S2MPS14_IRQ_ACOKBR] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_ACOKBR_MASK, - }, - [S2MPS14_IRQ_PWRON1S] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_PWRON1S_MASK, - }, - [S2MPS14_IRQ_MRB] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_MRB_MASK, - }, - [S2MPS14_IRQ_RTC60S] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_RTC60S_MASK, - }, - [S2MPS14_IRQ_RTCA1] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_RTCA1_MASK, - }, - [S2MPS14_IRQ_RTCA0] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_RTCA0_MASK, - }, - [S2MPS14_IRQ_SMPL] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_SMPL_MASK, - }, - [S2MPS14_IRQ_RTC1S] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_RTC1S_MASK, - }, - [S2MPS14_IRQ_WTSR] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_WTSR_MASK, - }, - [S2MPS14_IRQ_INT120C] =3D { - .reg_offset =3D 2, - .mask =3D S2MPS11_IRQ_INT120C_MASK, - }, - [S2MPS14_IRQ_INT140C] =3D { - .reg_offset =3D 2, - .mask =3D S2MPS11_IRQ_INT140C_MASK, - }, - [S2MPS14_IRQ_TSD] =3D { - .reg_offset =3D 2, - .mask =3D S2MPS14_IRQ_TSD_MASK, - }, + REGMAP_IRQ_REG(S2MPS14_IRQ_PWRONF, 0, S2MPS11_IRQ_PWRONF_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_PWRONR, 0, S2MPS11_IRQ_PWRONR_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_JIGONBF, 0, S2MPS11_IRQ_JIGONBF_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_JIGONBR, 0, S2MPS11_IRQ_JIGONBR_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_ACOKBF, 0, S2MPS11_IRQ_ACOKBF_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_ACOKBR, 0, S2MPS11_IRQ_ACOKBR_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_PWRON1S, 0, S2MPS11_IRQ_PWRON1S_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_MRB, 0, S2MPS11_IRQ_MRB_MASK), + + REGMAP_IRQ_REG(S2MPS14_IRQ_RTC60S, 1, S2MPS11_IRQ_RTC60S_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_RTCA1, 1, S2MPS11_IRQ_RTCA1_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_RTCA0, 1, S2MPS11_IRQ_RTCA0_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_SMPL, 1, S2MPS11_IRQ_SMPL_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_RTC1S, 1, S2MPS11_IRQ_RTC1S_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_WTSR, 1, S2MPS11_IRQ_WTSR_MASK), + + REGMAP_IRQ_REG(S2MPS14_IRQ_INT120C, 2, S2MPS11_IRQ_INT120C_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_INT140C, 2, S2MPS11_IRQ_INT140C_MASK), + REGMAP_IRQ_REG(S2MPS14_IRQ_TSD, 2, S2MPS14_IRQ_TSD_MASK), }; =20 static const struct regmap_irq s2mpu02_irqs[] =3D { - [S2MPU02_IRQ_PWRONF] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_PWRONF_MASK, - }, - [S2MPU02_IRQ_PWRONR] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_PWRONR_MASK, - }, - [S2MPU02_IRQ_JIGONBF] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_JIGONBF_MASK, - }, - [S2MPU02_IRQ_JIGONBR] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_JIGONBR_MASK, - }, - [S2MPU02_IRQ_ACOKBF] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_ACOKBF_MASK, - }, - [S2MPU02_IRQ_ACOKBR] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_ACOKBR_MASK, - }, - [S2MPU02_IRQ_PWRON1S] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_PWRON1S_MASK, - }, - [S2MPU02_IRQ_MRB] =3D { - .reg_offset =3D 0, - .mask =3D S2MPS11_IRQ_MRB_MASK, - }, - [S2MPU02_IRQ_RTC60S] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_RTC60S_MASK, - }, - [S2MPU02_IRQ_RTCA1] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_RTCA1_MASK, - }, - [S2MPU02_IRQ_RTCA0] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_RTCA0_MASK, - }, - [S2MPU02_IRQ_SMPL] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_SMPL_MASK, - }, - [S2MPU02_IRQ_RTC1S] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_RTC1S_MASK, - }, - [S2MPU02_IRQ_WTSR] =3D { - .reg_offset =3D 1, - .mask =3D S2MPS11_IRQ_WTSR_MASK, - }, - [S2MPU02_IRQ_INT120C] =3D { - .reg_offset =3D 2, - .mask =3D S2MPS11_IRQ_INT120C_MASK, - }, - [S2MPU02_IRQ_INT140C] =3D { - .reg_offset =3D 2, - .mask =3D S2MPS11_IRQ_INT140C_MASK, - }, - [S2MPU02_IRQ_TSD] =3D { - .reg_offset =3D 2, - .mask =3D S2MPS14_IRQ_TSD_MASK, - }, + REGMAP_IRQ_REG(S2MPU02_IRQ_PWRONF, 0, S2MPS11_IRQ_PWRONF_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_PWRONR, 0, S2MPS11_IRQ_PWRONR_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_JIGONBF, 0, S2MPS11_IRQ_JIGONBF_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_JIGONBR, 0, S2MPS11_IRQ_JIGONBR_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_ACOKBF, 0, S2MPS11_IRQ_ACOKBF_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_ACOKBR, 0, S2MPS11_IRQ_ACOKBR_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_PWRON1S, 0, S2MPS11_IRQ_PWRON1S_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_MRB, 0, S2MPS11_IRQ_MRB_MASK), + + REGMAP_IRQ_REG(S2MPU02_IRQ_RTC60S, 1, S2MPS11_IRQ_RTC60S_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_RTCA1, 1, S2MPS11_IRQ_RTCA1_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_RTCA0, 1, S2MPS11_IRQ_RTCA0_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_SMPL, 1, S2MPS11_IRQ_SMPL_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_RTC1S, 1, S2MPS11_IRQ_RTC1S_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_WTSR, 1, S2MPS11_IRQ_WTSR_MASK), + + REGMAP_IRQ_REG(S2MPU02_IRQ_INT120C, 2, S2MPS11_IRQ_INT120C_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_INT140C, 2, S2MPS11_IRQ_INT140C_MASK), + REGMAP_IRQ_REG(S2MPU02_IRQ_TSD, 2, S2MPS14_IRQ_TSD_MASK), }; =20 static const struct regmap_irq s2mpu05_irqs[] =3D { @@ -303,74 +159,25 @@ static const struct regmap_irq s2mpu05_irqs[] =3D { }; =20 static const struct regmap_irq s5m8767_irqs[] =3D { - [S5M8767_IRQ_PWRR] =3D { - .reg_offset =3D 0, - .mask =3D S5M8767_IRQ_PWRR_MASK, - }, - [S5M8767_IRQ_PWRF] =3D { - .reg_offset =3D 0, - .mask =3D S5M8767_IRQ_PWRF_MASK, - }, - [S5M8767_IRQ_PWR1S] =3D { - .reg_offset =3D 0, - .mask =3D S5M8767_IRQ_PWR1S_MASK, - }, - [S5M8767_IRQ_JIGR] =3D { - .reg_offset =3D 0, - .mask =3D S5M8767_IRQ_JIGR_MASK, - }, - [S5M8767_IRQ_JIGF] =3D { - .reg_offset =3D 0, - .mask =3D S5M8767_IRQ_JIGF_MASK, - }, - [S5M8767_IRQ_LOWBAT2] =3D { - .reg_offset =3D 0, - .mask =3D S5M8767_IRQ_LOWBAT2_MASK, - }, - [S5M8767_IRQ_LOWBAT1] =3D { - .reg_offset =3D 0, - .mask =3D S5M8767_IRQ_LOWBAT1_MASK, - }, - [S5M8767_IRQ_MRB] =3D { - .reg_offset =3D 1, - .mask =3D S5M8767_IRQ_MRB_MASK, - }, - [S5M8767_IRQ_DVSOK2] =3D { - .reg_offset =3D 1, - .mask =3D S5M8767_IRQ_DVSOK2_MASK, - }, - [S5M8767_IRQ_DVSOK3] =3D { - .reg_offset =3D 1, - .mask =3D S5M8767_IRQ_DVSOK3_MASK, - }, - [S5M8767_IRQ_DVSOK4] =3D { - .reg_offset =3D 1, - .mask =3D S5M8767_IRQ_DVSOK4_MASK, - }, - [S5M8767_IRQ_RTC60S] =3D { - .reg_offset =3D 2, - .mask =3D S5M8767_IRQ_RTC60S_MASK, - }, - [S5M8767_IRQ_RTCA1] =3D { - .reg_offset =3D 2, - .mask =3D S5M8767_IRQ_RTCA1_MASK, - }, - [S5M8767_IRQ_RTCA2] =3D { - .reg_offset =3D 2, - .mask =3D S5M8767_IRQ_RTCA2_MASK, - }, - [S5M8767_IRQ_SMPL] =3D { - .reg_offset =3D 2, - .mask =3D S5M8767_IRQ_SMPL_MASK, - }, - [S5M8767_IRQ_RTC1S] =3D { - .reg_offset =3D 2, - .mask =3D S5M8767_IRQ_RTC1S_MASK, - }, - [S5M8767_IRQ_WTSR] =3D { - .reg_offset =3D 2, - .mask =3D S5M8767_IRQ_WTSR_MASK, - }, + REGMAP_IRQ_REG(S5M8767_IRQ_PWRR, 0, S5M8767_IRQ_PWRR_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_PWRF, 0, S5M8767_IRQ_PWRF_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_PWR1S, 0, S5M8767_IRQ_PWR1S_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_JIGR, 0, S5M8767_IRQ_JIGR_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_JIGF, 0, S5M8767_IRQ_JIGF_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_LOWBAT2, 0, S5M8767_IRQ_LOWBAT2_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_LOWBAT1, 0, S5M8767_IRQ_LOWBAT1_MASK), + + REGMAP_IRQ_REG(S5M8767_IRQ_MRB, 1, S5M8767_IRQ_MRB_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_DVSOK2, 1, S5M8767_IRQ_DVSOK2_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_DVSOK3, 1, S5M8767_IRQ_DVSOK3_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_DVSOK4, 1, S5M8767_IRQ_DVSOK4_MASK), + + REGMAP_IRQ_REG(S5M8767_IRQ_RTC60S, 2, S5M8767_IRQ_RTC60S_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_RTCA1, 2, S5M8767_IRQ_RTCA1_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_RTCA2, 2, S5M8767_IRQ_RTCA2_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_SMPL, 2, S5M8767_IRQ_SMPL_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_RTC1S, 2, S5M8767_IRQ_RTC1S_MASK), + REGMAP_IRQ_REG(S5M8767_IRQ_WTSR, 2, S5M8767_IRQ_WTSR_MASK), }; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:41 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:44 +0100 Subject: [PATCH v4 23/32] mfd: sec: Add myself as module author Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-23-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Add myself as module author, so people know whom to complain to about after the recent updates. Signed-off-by: Andr=C3=A9 Draszik --- v4: - Lee: - don't sort module_author entries alphabetically - update commit message --- drivers/mfd/sec-common.c | 1 + drivers/mfd/sec-i2c.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index 448300ab547c10d81f9f2b2798d54c8a03c714d8..42d55e70e34c8d7cd68cddaecc8= 8017e259365b4 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -296,5 +296,6 @@ EXPORT_SYMBOL_GPL(sec_pmic_pm_ops); MODULE_AUTHOR("Chanwoo Choi "); MODULE_AUTHOR("Krzysztof Kozlowski "); MODULE_AUTHOR("Sangbeom Kim "); +MODULE_AUTHOR("Andr=C3=A9 Draszik "); MODULE_DESCRIPTION("Core driver for the Samsung S5M"); MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c index 2ccb494c8c024361c78e92be71ce9c215757dd89..3132b849b4bc445cf18b2ef3620= 92137a9b618c9 100644 --- a/drivers/mfd/sec-i2c.c +++ b/drivers/mfd/sec-i2c.c @@ -234,5 +234,6 @@ static struct i2c_driver sec_pmic_i2c_driver =3D { module_i2c_driver(sec_pmic_i2c_driver); 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:41 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:45 +0100 Subject: [PATCH v4 24/32] clk: s2mps11: add support for S2MPG10 PMIC clock Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-24-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 Add support for Samsung's S2MPG10 PMIC clock, which is similar to the existing PMIC clocks supported by this driver. S2MPG10 has three clock outputs @ 32kHz: AP, peri1 and peri2. Acked-by: Stephen Boyd Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- drivers/clk/clk-s2mps11.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c index 8ddf3a9a53dfd5bb52a05a3e02788a357ea77ad3..92c8d36dafcf8a448873567fb35= 41a1b90cd9837 100644 --- a/drivers/clk/clk-s2mps11.c +++ b/drivers/clk/clk-s2mps11.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -140,6 +141,9 @@ static int s2mps11_clk_probe(struct platform_device *pd= ev) clk_data->num =3D S2MPS11_CLKS_NUM; =20 switch (hwid) { + case S2MPG10: + s2mps11_reg =3D S2MPG10_PMIC_RTCBUF; + break; case S2MPS11X: s2mps11_reg =3D S2MPS11_REG_RTC_CTRL; break; @@ -221,6 +225,7 @@ static void s2mps11_clk_remove(struct platform_device *= pdev) } =20 static const struct platform_device_id s2mps11_clk_id[] =3D { + { "s2mpg10-clk", S2MPG10}, { "s2mps11-clk", S2MPS11X}, { "s2mps13-clk", S2MPS13X}, { "s2mps14-clk", S2MPS14X}, @@ -241,6 +246,9 @@ MODULE_DEVICE_TABLE(platform, s2mps11_clk_id); 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:42 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:46 +0100 Subject: [PATCH v4 25/32] rtc: s5m: cache device type during probe Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-25-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 platform_get_device_id() is called mulitple times during probe to retrieve the device type. This makes the code harder to read than necessary. Just get the type once, which also trims the lengths of the lines involved. Signed-off-by: Andr=C3=A9 Draszik --- v4: - cache the driver data, i.e. the enum type (Krzysztof) --- drivers/rtc/rtc-s5m.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index db5c9b641277213aa1371776c63e2eda3f223465..c7636738b797b8087a0ed6844df= 62d47427e33b8 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -637,6 +637,8 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *in= fo) static int s5m_rtc_probe(struct platform_device *pdev) { struct sec_pmic_dev *s5m87xx =3D dev_get_drvdata(pdev->dev.parent); + enum sec_device_type device_type =3D + platform_get_device_id(pdev)->driver_data; struct s5m_rtc_info *info; struct i2c_client *i2c; const struct regmap_config *regmap_cfg; @@ -646,7 +648,7 @@ static int s5m_rtc_probe(struct platform_device *pdev) if (!info) return -ENOMEM; =20 - switch (platform_get_device_id(pdev)->driver_data) { + switch (device_type) { case S2MPS15X: regmap_cfg =3D &s2mps14_rtc_regmap_config; info->regs =3D &s2mps15_rtc_regs; @@ -669,8 +671,8 @@ static int s5m_rtc_probe(struct platform_device *pdev) break; default: return dev_err_probe(&pdev->dev, -ENODEV, - "Device type %lu is not supported by RTC driver\n", - platform_get_device_id(pdev)->driver_data); + "Device type %d is not supported by RTC driver\n", + device_type); } =20 i2c =3D devm_i2c_new_dummy_device(&pdev->dev, s5m87xx->i2c->adapter, @@ -686,7 +688,7 @@ static int s5m_rtc_probe(struct platform_device *pdev) =20 info->dev =3D &pdev->dev; info->s5m87xx =3D s5m87xx; - info->device_type =3D platform_get_device_id(pdev)->driver_data; + info->device_type =3D device_type; =20 if (s5m87xx->irq_data) { info->irq =3D regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq); --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ed1-f49.google.com (mail-ed1-f49.google.com [209.85.208.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 084E521C195 for ; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:42 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:47 +0100 Subject: [PATCH v4 26/32] rtc: s5m: prepare for external regmap Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-26-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 The Samsung S2MPG10 PMIC is not connected via I2C as this driver assumes, hence this driver's current approach of creating an I2C-based regmap doesn't work for it, and this driver should use the regmap provided by the parent (core) driver instead for that PMIC. To prepare this driver for s2mpg support, restructure the code to only create a regmap if one isn't provided by the parent. No functional changes, since the parent doesn't provide a regmap for any of the PMICs currently supported by this driver. Having this change separate will simply make the addition of S2MPG10 support more self-contained, without additional restructuring. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- drivers/rtc/rtc-s5m.c | 81 ++++++++++++++++++++++++++++-------------------= ---- 1 file changed, 45 insertions(+), 36 deletions(-) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index c7636738b797b8087a0ed6844df62d47427e33b8..f8abcdee8611d1181fb575aeb8d= 094360538ca7e 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -640,52 +640,61 @@ static int s5m_rtc_probe(struct platform_device *pdev) enum sec_device_type device_type =3D platform_get_device_id(pdev)->driver_data; struct s5m_rtc_info *info; - struct i2c_client *i2c; - const struct regmap_config *regmap_cfg; int ret, alarm_irq; =20 info =3D devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); if (!info) return -ENOMEM; =20 - switch (device_type) { - case S2MPS15X: - regmap_cfg =3D &s2mps14_rtc_regmap_config; - info->regs =3D &s2mps15_rtc_regs; - alarm_irq =3D S2MPS14_IRQ_RTCA0; - break; - case S2MPS14X: - regmap_cfg =3D &s2mps14_rtc_regmap_config; - info->regs =3D &s2mps14_rtc_regs; - alarm_irq =3D S2MPS14_IRQ_RTCA0; - break; - case S2MPS13X: - regmap_cfg =3D &s2mps14_rtc_regmap_config; - info->regs =3D &s2mps13_rtc_regs; - alarm_irq =3D S2MPS14_IRQ_RTCA0; - break; - case S5M8767X: - regmap_cfg =3D &s5m_rtc_regmap_config; - info->regs =3D &s5m_rtc_regs; - alarm_irq =3D S5M8767_IRQ_RTCA1; - break; - default: + info->regmap =3D dev_get_regmap(pdev->dev.parent, "rtc"); + if (!info->regmap) { + const struct regmap_config *regmap_cfg; + struct i2c_client *i2c; + + switch (device_type) { + case S2MPS15X: + regmap_cfg =3D &s2mps14_rtc_regmap_config; + info->regs =3D &s2mps15_rtc_regs; + alarm_irq =3D S2MPS14_IRQ_RTCA0; + break; + case S2MPS14X: + regmap_cfg =3D &s2mps14_rtc_regmap_config; + info->regs =3D &s2mps14_rtc_regs; + alarm_irq =3D S2MPS14_IRQ_RTCA0; + break; + case S2MPS13X: + regmap_cfg =3D &s2mps14_rtc_regmap_config; + info->regs =3D &s2mps13_rtc_regs; + alarm_irq =3D S2MPS14_IRQ_RTCA0; + break; + case S5M8767X: + regmap_cfg =3D &s5m_rtc_regmap_config; + info->regs =3D &s5m_rtc_regs; + alarm_irq =3D S5M8767_IRQ_RTCA1; + break; + default: + return dev_err_probe(&pdev->dev, -ENODEV, + "Unsupported device type %d\n", + device_type); + } + + i2c =3D devm_i2c_new_dummy_device(&pdev->dev, + s5m87xx->i2c->adapter, + RTC_I2C_ADDR); + if (IS_ERR(i2c)) + return dev_err_probe(&pdev->dev, PTR_ERR(i2c), + "Failed to allocate I2C\n"); + + info->regmap =3D devm_regmap_init_i2c(i2c, regmap_cfg); + if (IS_ERR(info->regmap)) + return dev_err_probe(&pdev->dev, PTR_ERR(info->regmap), + "Failed to allocate regmap\n"); + } else { return dev_err_probe(&pdev->dev, -ENODEV, - "Device type %d is not supported by RTC driver\n", + "Unsupported device type %d\n", device_type); } =20 - i2c =3D devm_i2c_new_dummy_device(&pdev->dev, s5m87xx->i2c->adapter, - RTC_I2C_ADDR); - if (IS_ERR(i2c)) - return dev_err_probe(&pdev->dev, PTR_ERR(i2c), - "Failed to allocate I2C for RTC\n"); - - info->regmap =3D devm_regmap_init_i2c(i2c, regmap_cfg); - if (IS_ERR(info->regmap)) - return dev_err_probe(&pdev->dev, PTR_ERR(info->regmap), - "Failed to allocate RTC register map\n"); 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:43 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:48 +0100 Subject: [PATCH v4 27/32] rtc: s5m: add support for S2MPG10 RTC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-27-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 Add support for Samsung's S2MPG10 PMIC RTC, which is similar to the existing PMIC RTCs supported by this driver. S2MPG10 doesn't use I2C, so we expect the core driver to have created a regmap for us. Additionally, it can be used for doing a cold-reset. If requested to do so (via DT), S2MPG10 is programmed with a watchdog configuration that will perform a full power cycle upon watchdog expiry. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- v4: - keep headers as alphabetical as possible (Krzysztof) --- drivers/rtc/rtc-s5m.c | 60 +++++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 60 insertions(+) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index f8abcdee8611d1181fb575aeb8d094360538ca7e..c6394faaee860427e8b84e9c6df= 2d8229cf06d93 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -53,6 +54,7 @@ enum { * Device | Write time | Read time | Write alarm * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D * S5M8767 | UDR + TIME | | UDR + * S2MPG10 | WUDR | RUDR | AUDR * S2MPS11/14 | WUDR | RUDR | WUDR + RUDR * S2MPS13 | WUDR | RUDR | WUDR + AUDR * S2MPS15 | WUDR | RUDR | AUDR @@ -99,6 +101,20 @@ static const struct s5m_rtc_reg_config s5m_rtc_regs =3D= { .write_alarm_udr_mask =3D S5M_RTC_UDR_MASK, }; =20 +/* Register map for S2MPG10 */ +static const struct s5m_rtc_reg_config s2mpg10_rtc_regs =3D { + .regs_count =3D 7, + .time =3D S2MPG10_RTC_SEC, + .ctrl =3D S2MPG10_RTC_CTRL, + .alarm0 =3D S2MPG10_RTC_A0SEC, + .alarm1 =3D S2MPG10_RTC_A1SEC, + .udr_update =3D S2MPG10_RTC_UPDATE, + .autoclear_udr_mask =3D S2MPS15_RTC_WUDR_MASK | S2MPS15_RTC_AUDR_MASK, + .read_time_udr_mask =3D S2MPS_RTC_RUDR_MASK, + .write_time_udr_mask =3D S2MPS15_RTC_WUDR_MASK, + .write_alarm_udr_mask =3D S2MPS15_RTC_AUDR_MASK, +}; + /* Register map for S2MPS13 */ static const struct s5m_rtc_reg_config s2mps13_rtc_regs =3D { .regs_count =3D 7, @@ -238,6 +254,7 @@ static int s5m_check_peding_alarm_interrupt(struct s5m_= rtc_info *info, ret =3D regmap_read(info->regmap, S5M_RTC_STATUS, &val); val &=3D S5M_ALARM0_STATUS; break; + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -300,6 +317,7 @@ static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_inf= o *info) case S5M8767X: data &=3D ~S5M_RTC_TIME_EN_MASK; break; + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -351,6 +369,7 @@ static int s5m_rtc_read_time(struct device *dev, struct= rtc_time *tm) =20 switch (info->device_type) { case S5M8767X: + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -374,6 +393,7 @@ static int s5m_rtc_set_time(struct device *dev, struct = rtc_time *tm) =20 switch (info->device_type) { case S5M8767X: + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -411,6 +431,7 @@ static int s5m_rtc_read_alarm(struct device *dev, struc= t rtc_wkalrm *alrm) =20 switch (info->device_type) { case S5M8767X: + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -449,6 +470,7 @@ static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info) =20 switch (info->device_type) { case S5M8767X: + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -487,6 +509,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *inf= o) =20 switch (info->device_type) { case S5M8767X: + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -524,6 +547,7 @@ static int s5m_rtc_set_alarm(struct device *dev, struct= rtc_wkalrm *alrm) =20 switch (info->device_type) { case S5M8767X: + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -604,6 +628,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *in= fo) ret =3D regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2); break; =20 + case S2MPG10: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -634,6 +659,25 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *i= nfo) return ret; } =20 +static int s5m_rtc_restart_s2mpg10(struct sys_off_data *data) +{ + struct s5m_rtc_info *info =3D data->cb_data; + int ret; + + if (data->mode !=3D REBOOT_COLD && data->mode !=3D REBOOT_HARD) + return NOTIFY_DONE; + + /* + * Arm watchdog with maximum timeout (2 seconds), and perform full reset + * on expiry. + */ + ret =3D regmap_set_bits(info->regmap, S2MPG10_RTC_WTSR, + (S2MPG10_WTSR_COLDTIMER | S2MPG10_WTSR_COLDRST + | S2MPG10_WTSR_WTSRT | S2MPG10_WTSR_WTSR_EN)); + + return ret ? NOTIFY_BAD : NOTIFY_DONE; +} + static int s5m_rtc_probe(struct platform_device *pdev) { struct sec_pmic_dev *s5m87xx =3D dev_get_drvdata(pdev->dev.parent); @@ -689,6 +733,9 @@ static int s5m_rtc_probe(struct platform_device *pdev) if (IS_ERR(info->regmap)) return dev_err_probe(&pdev->dev, PTR_ERR(info->regmap), "Failed to allocate regmap\n"); + } else if (device_type =3D=3D S2MPG10) { + info->regs =3D &s2mpg10_rtc_regs; + alarm_irq =3D S2MPG10_IRQ_RTCA0; } else { return dev_err_probe(&pdev->dev, -ENODEV, "Unsupported device type %d\n", @@ -735,6 +782,18 @@ static int s5m_rtc_probe(struct platform_device *pdev) device_init_wakeup(&pdev->dev, true); } =20 + if (of_device_is_system_power_controller(pdev->dev.parent->of_node) && + info->device_type =3D=3D S2MPG10) { + ret =3D devm_register_sys_off_handler(&pdev->dev, + SYS_OFF_MODE_RESTART, + SYS_OFF_PRIO_HIGH + 1, + s5m_rtc_restart_s2mpg10, + info); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "Failed to register restart handler\n"); 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:43 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:49 +0100 Subject: [PATCH v4 28/32] rtc: s5m: fix a typo: peding -> pending Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-28-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 Fix this minor typo, and adjust the a related incorrect alignment to avoid a checkpatch error. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- drivers/rtc/rtc-s5m.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index c6394faaee860427e8b84e9c6df2d8229cf06d93..095b090ec3949e0e8074cc34410= 5daa00b795245 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -243,8 +243,8 @@ static int s5m8767_wait_for_udr_update(struct s5m_rtc_i= nfo *info) return ret; } =20 -static int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info, - struct rtc_wkalrm *alarm) +static int s5m_check_pending_alarm_interrupt(struct s5m_rtc_info *info, + struct rtc_wkalrm *alarm) { int ret; unsigned int val; @@ -451,7 +451,7 @@ static int s5m_rtc_read_alarm(struct device *dev, struc= t rtc_wkalrm *alrm) =20 dev_dbg(dev, "%s: %ptR(%d)\n", __func__, &alrm->time, alrm->time.tm_wday); =20 - return s5m_check_peding_alarm_interrupt(info, alrm); + return s5m_check_pending_alarm_interrupt(info, alrm); } =20 static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info) --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ed1-f42.google.com (mail-ed1-f42.google.com [209.85.208.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84EC021CFFA for ; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:44 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:50 +0100 Subject: [PATCH v4 29/32] rtc: s5m: switch to devm_device_init_wakeup Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-29-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 To release memory allocated by device_init_wakeup(true), drivers have to call device_init_wakeup(false) in error paths and unbind. Switch to the new devres managed version devm_device_init_wakeup() to plug this memleak. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- drivers/rtc/rtc-s5m.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index 095b090ec3949e0e8074cc344105daa00b795245..f4caed953efdd23fd0132d74d51= 99dec9cdfd294 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -779,7 +779,11 @@ static int s5m_rtc_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, ret, "Failed to request alarm IRQ %d\n", info->irq); - device_init_wakeup(&pdev->dev, true); + + ret =3D devm_device_init_wakeup(&pdev->dev); + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, + "Failed to init wakeup\n"); } =20 if (of_device_is_system_power_controller(pdev->dev.parent->of_node) && --=20 2.49.0.604.gff1f9ca942-goog From nobody Wed Apr 16 10:43:38 2025 Received: from mail-ej1-f42.google.com (mail-ej1-f42.google.com [209.85.218.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AECD7213E61 for ; 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:44 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:51 +0100 Subject: [PATCH v4 30/32] rtc: s5m: replace regmap_update_bits with regmap_clear/set_bits Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-30-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= , Krzysztof Kozlowski X-Mailer: b4 0.14.2 The regmap_clear_bits() and regmap_set_bits() helper macros state the intention a bit more obviously. Use those. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andr=C3=A9 Draszik --- drivers/rtc/rtc-s5m.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index f4caed953efdd23fd0132d74d5199dec9cdfd294..27115523b8c25794a9f3ac8e734= bb1ed998e9518 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -338,8 +338,8 @@ static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_inf= o *info) =20 /* On S2MPS13 the AUDR is not auto-cleared */ if (info->device_type =3D=3D S2MPS13X) - regmap_update_bits(info->regmap, info->regs->udr_update, - S2MPS13_RTC_AUDR_MASK, 0); + regmap_clear_bits(info->regmap, info->regs->udr_update, + S2MPS13_RTC_AUDR_MASK); =20 return ret; } @@ -351,10 +351,8 @@ static int s5m_rtc_read_time(struct device *dev, struc= t rtc_time *tm) int ret; =20 if (info->regs->read_time_udr_mask) { - ret =3D regmap_update_bits(info->regmap, - info->regs->udr_update, - info->regs->read_time_udr_mask, - info->regs->read_time_udr_mask); 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:45 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:52 +0100 Subject: [PATCH v4 31/32] rtc: s5m: replace open-coded read/modify/write registers with regmap helpers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-31-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 Instead of the open-coded read/modify/write sequence, we can simply use the regmap helpers regmap_set_bits() and regmap_update_bits() respectively. This makes the code easier to read, and avoids extra work in case the underlying bus supports updating bits via struct regmap_bus::reg_update_bits() directly (which is the case for S2MPG10 on gs101 where this driver communicates via ACPM). Signed-off-by: Andr=C3=A9 Draszik --- drivers/rtc/rtc-s5m.c | 28 +++++++--------------------- 1 file changed, 7 insertions(+), 21 deletions(-) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index 27115523b8c25794a9f3ac8e734bb1ed998e9518..a7220b4d0e8dd35786b060e2a41= 06e2a39fe743f 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -279,17 +279,9 @@ static int s5m_check_pending_alarm_interrupt(struct s5= m_rtc_info *info, static int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info) { int ret; - unsigned int data; - - ret =3D regmap_read(info->regmap, info->regs->udr_update, &data); - if (ret < 0) { - dev_err(info->dev, "failed to read update reg(%d)\n", ret); - return ret; - } - - data |=3D info->regs->write_time_udr_mask; =20 - ret =3D regmap_write(info->regmap, info->regs->udr_update, data); + ret =3D regmap_set_bits(info->regmap, info->regs->udr_update, + info->regs->write_time_udr_mask); if (ret < 0) { dev_err(info->dev, "failed to write update reg(%d)\n", ret); return ret; @@ -303,19 +295,12 @@ static int s5m8767_rtc_set_time_reg(struct s5m_rtc_in= fo *info) static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) { int ret; - unsigned int data; - - ret =3D regmap_read(info->regmap, info->regs->udr_update, &data); - if (ret < 0) { - dev_err(info->dev, "%s: fail to read update reg(%d)\n", - __func__, ret); - return ret; - } + unsigned int udr_mask; =20 - data |=3D info->regs->write_alarm_udr_mask; + udr_mask =3D info->regs->write_alarm_udr_mask; switch (info->device_type) { case S5M8767X: - data &=3D ~S5M_RTC_TIME_EN_MASK; + udr_mask |=3D S5M_RTC_TIME_EN_MASK; break; case S2MPG10: case S2MPS15X: @@ -327,7 +312,8 @@ static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_inf= o *info) return -EINVAL; } =20 - ret =3D regmap_write(info->regmap, info->regs->udr_update, data); + ret =3D regmap_update_bits(info->regmap, info->regs->udr_update, + udr_mask, info->regs->write_alarm_udr_mask); if (ret < 0) { dev_err(info->dev, "%s: fail to write update reg(%d)\n", __func__, ret); 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[35.204.162.40]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ccc001sm145850366b.126.2025.04.09.13.37.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Apr 2025 13:37:45 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 09 Apr 2025 21:37:53 +0100 Subject: [PATCH v4 32/32] MAINTAINERS: add myself as reviewer for Samsung S2M MFD Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250409-s2mpg10-v4-32-d66d5f39b6bf@linaro.org> References: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> In-Reply-To: <20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org> To: Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Russell King , Catalin Marinas , Will Deacon , Alexandre Belloni Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 I'm working on a Samsung device which includes this MFD and would like to be Cc'ed to further contributions and help on reviewing them. Add me as reviewer. Signed-off-by: Andr=C3=A9 Draszik --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index d4d577b54d798938b7a8ff0c2bdbd0b61f87650f..9f05af52b062d8cab0f8b48b262= 5432108604c3e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21397,6 +21397,7 @@ F: drivers/platform/x86/samsung-laptop.c =20 SAMSUNG MULTIFUNCTION PMIC DEVICE DRIVERS M: Krzysztof Kozlowski +R: Andr=C3=A9 Draszik L: linux-kernel@vger.kernel.org L: linux-samsung-soc@vger.kernel.org S: Maintained --=20 2.49.0.604.gff1f9ca942-goog