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[93.34.88.225]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-39c3020dacfsm14493310f8f.72.2025.04.08.02.52.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Apr 2025 02:52:21 -0700 (PDT) From: Christian Marangi To: Christian Marangi , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Srinivas Kandagatla , Heiner Kallweit , Russell King , Maxime Chevallier , "Chester A. Unal" , Daniel Golle , DENG Qingfang , Sean Wang , Simon Horman , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@airoha.com Subject: [net-next PATCH v14 07/16] net: mdio: regmap: add support for C45 read/write Date: Tue, 8 Apr 2025 11:51:14 +0200 Message-ID: <20250408095139.51659-8-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250408095139.51659-1-ansuelsmth@gmail.com> References: <20250408095139.51659-1-ansuelsmth@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for C45 read/write for mdio regmap. This can be done by enabling the support_encoded_addr bool in mdio regmap config and by using the new API devm_mdio_regmap_init to init a regmap. To support C45, additional info needs to be appended to the regmap address passed to regmap OPs. The logic applied to the regmap address value: - First the regnum value (20, 16) - Second the devnum value (25, 21) - A bit to signal if it's C45 (26) devm_mdio_regmap_init MUST be used to register a regmap for this to correctly handle internally the encode/decode of the address. Drivers needs to define a mdio_regmap_init_config where an optional regmap name can be defined and MUST define C22 OPs (mdio_read/write). To support C45 operation also C45 OPs (mdio_read/write_c45). The regmap from devm_mdio_regmap_init will internally decode the encoded regmap address and extract the various info (addr, devnum if C45 and regnum). It will then call the related OP and pass the extracted values to the function. Example for a C45 read operation: - With an encoded address with C45 bit enabled, it will call the .mdio_read_c45 and addr, devnum and regnum will be passed. .mdio_read_c45 will then return the val and val will be stored in the regmap_read pointer and will return 0. If .mdio_read_c45 returns any error, then the regmap_read will return such error. With support_encoded_addr enabled, also C22 will encode the address in the regmap address and .mdio_read/write will called accordingly similar to C45 operation. Signed-off-by: Christian Marangi Reviewed-by: Maxime Chevallier --- drivers/net/mdio/mdio-regmap.c | 170 +++++++++++++++++++++++++++++-- include/linux/mdio/mdio-regmap.h | 14 +++ 2 files changed, 176 insertions(+), 8 deletions(-) diff --git a/drivers/net/mdio/mdio-regmap.c b/drivers/net/mdio/mdio-regmap.c index 810ba0a736f0..f263e4ae2477 100644 --- a/drivers/net/mdio/mdio-regmap.c +++ b/drivers/net/mdio/mdio-regmap.c @@ -15,22 +15,72 @@ #include #include =20 +#define MDIO_REGMAP_C45 BIT(26) +#define MDIO_REGMAP_ADDR GENMASK(25, 21) +#define MDIO_REGMAP_DEVNUM GENMASK(20, 16) +#define MDIO_REGMAP_REGNUM GENMASK(15, 0) + #define DRV_NAME "mdio-regmap" =20 struct mdio_regmap_priv { + void *ctx; + + const struct mdio_regmap_init_config *config; +}; + +struct mdio_regmap_mii_priv { struct regmap *regmap; u32 valid_addr_mask; + bool encode_addr; }; =20 -static int mdio_regmap_read_c22(struct mii_bus *bus, int addr, int regnum) +static int mdio_regmap_mii_read_c22(struct mii_bus *bus, int addr, int reg= num) +{ + struct mdio_regmap_mii_priv *ctx =3D bus->priv; + unsigned int val; + int ret; + + if (!(ctx->valid_addr_mask & BIT(addr))) + return -ENODEV; + + if (ctx->encode_addr) + regnum |=3D FIELD_PREP(MDIO_REGMAP_ADDR, addr); + + ret =3D regmap_read(ctx->regmap, regnum, &val); + if (ret < 0) + return ret; + + return val; +} + +static int mdio_regmap_mii_write_c22(struct mii_bus *bus, int addr, int re= gnum, + u16 val) { - struct mdio_regmap_priv *ctx =3D bus->priv; + struct mdio_regmap_mii_priv *ctx =3D bus->priv; + + if (!(ctx->valid_addr_mask & BIT(addr))) + return -ENODEV; + + if (ctx->encode_addr) + regnum |=3D FIELD_PREP(MDIO_REGMAP_ADDR, addr); + + return regmap_write(ctx->regmap, regnum, val); +} + +static int mdio_regmap_mii_read_c45(struct mii_bus *bus, int addr, int dev= num, + int regnum) +{ + struct mdio_regmap_mii_priv *ctx =3D bus->priv; unsigned int val; int ret; =20 if (!(ctx->valid_addr_mask & BIT(addr))) return -ENODEV; =20 + regnum |=3D MDIO_REGMAP_C45; + regnum |=3D FIELD_PREP(MDIO_REGMAP_ADDR, addr); + regnum |=3D FIELD_PREP(MDIO_REGMAP_DEVNUM, devnum); + ret =3D regmap_read(ctx->regmap, regnum, &val); if (ret < 0) return ret; @@ -38,21 +88,25 @@ static int mdio_regmap_read_c22(struct mii_bus *bus, in= t addr, int regnum) return val; } =20 -static int mdio_regmap_write_c22(struct mii_bus *bus, int addr, int regnum, - u16 val) +static int mdio_regmap_mii_write_c45(struct mii_bus *bus, int addr, int de= vnum, + int regnum, u16 val) { - struct mdio_regmap_priv *ctx =3D bus->priv; + struct mdio_regmap_mii_priv *ctx =3D bus->priv; =20 if (!(ctx->valid_addr_mask & BIT(addr))) return -ENODEV; =20 + regnum |=3D MDIO_REGMAP_C45; + regnum |=3D FIELD_PREP(MDIO_REGMAP_ADDR, addr); + regnum |=3D FIELD_PREP(MDIO_REGMAP_DEVNUM, devnum); + return regmap_write(ctx->regmap, regnum, val); } =20 struct mii_bus *devm_mdio_regmap_register(struct device *dev, const struct mdio_regmap_config *config) { - struct mdio_regmap_priv *mr; + struct mdio_regmap_mii_priv *mr; struct mii_bus *mii; int rc; =20 @@ -66,12 +120,17 @@ struct mii_bus *devm_mdio_regmap_register(struct devic= e *dev, mr =3D mii->priv; mr->regmap =3D config->regmap; mr->valid_addr_mask =3D BIT(config->valid_addr); + mr->encode_addr =3D config->support_encoded_addr; =20 mii->name =3D DRV_NAME; strscpy(mii->id, config->name, MII_BUS_ID_SIZE); mii->parent =3D config->parent; - mii->read =3D mdio_regmap_read_c22; - mii->write =3D mdio_regmap_write_c22; + mii->read =3D mdio_regmap_mii_read_c22; + mii->write =3D mdio_regmap_mii_write_c22; + if (config->support_encoded_addr) { + mii->read_c45 =3D mdio_regmap_mii_read_c45; + mii->write_c45 =3D mdio_regmap_mii_write_c45; + } =20 if (config->autoscan) mii->phy_mask =3D ~mr->valid_addr_mask; @@ -88,6 +147,101 @@ struct mii_bus *devm_mdio_regmap_register(struct devic= e *dev, } EXPORT_SYMBOL_GPL(devm_mdio_regmap_register); =20 +static int mdio_regmap_reg_read(void *context, unsigned int reg, unsigned = int *val) +{ + const struct mdio_regmap_init_config *config; + struct mdio_regmap_priv *priv =3D context; + int addr, regnum; + int ret; + + config =3D priv->config; + + addr =3D FIELD_GET(MDIO_REGMAP_ADDR, reg); + regnum =3D FIELD_GET(MDIO_REGMAP_REGNUM, reg); + + if (reg & MDIO_REGMAP_C45) { + int devnum; + + if (!config->mdio_write_c45) + return -EOPNOTSUPP; + + devnum =3D FIELD_GET(MDIO_REGMAP_DEVNUM, reg); + ret =3D config->mdio_read_c45(priv->ctx, addr, devnum, regnum); + } else { + ret =3D config->mdio_read(priv->ctx, addr, regnum); + } + + if (ret < 0) + return ret; + + *val =3D ret; + return 0; +} + +static int mdio_regmap_reg_write(void *context, unsigned int reg, unsigned= int val) +{ + const struct mdio_regmap_init_config *config; + struct mdio_regmap_priv *priv =3D context; + int addr, regnum; + + config =3D priv->config; + + addr =3D FIELD_GET(MDIO_REGMAP_ADDR, reg); + regnum =3D FIELD_GET(MDIO_REGMAP_REGNUM, reg); + + if (reg & MDIO_REGMAP_C45) { + int devnum; + + if (!config->mdio_write_c45) + return -EOPNOTSUPP; + + devnum =3D FIELD_GET(MDIO_REGMAP_DEVNUM, reg); + return config->mdio_write_c45(priv->ctx, addr, devnum, regnum, val); + } + + return config->mdio_write(priv->ctx, addr, regnum, val); +} + +static const struct regmap_config mdio_regmap_default_config =3D { + .reg_bits =3D 26, + .val_bits =3D 16, + .reg_stride =3D 1, + .max_register =3D MDIO_REGMAP_C45 | MDIO_REGMAP_ADDR | + MDIO_REGMAP_DEVNUM | MDIO_REGMAP_REGNUM, + .reg_read =3D mdio_regmap_reg_read, + .reg_write =3D mdio_regmap_reg_write, + /* Locking MUST be handled in mdio_write/read(_c45) */ + .disable_locking =3D true, +}; + +struct regmap *devm_mdio_regmap_init(struct device *dev, void *priv, + const struct mdio_regmap_init_config *config) +{ + struct mdio_regmap_priv *mdio_regmap_priv; + struct regmap_config regmap_config; + + /* Validate config */ + if (!config->mdio_read || !config->mdio_write) { + dev_err(dev, ".mdio_read and .mdio_write MUST be defined in config\n"); + return ERR_PTR(-EINVAL); + } + + mdio_regmap_priv =3D devm_kzalloc(dev, sizeof(*mdio_regmap_priv), + GFP_KERNEL); + if (!mdio_regmap_priv) + return ERR_PTR(-ENOMEM); + + memcpy(®map_config, &mdio_regmap_default_config, sizeof(regmap_config)= ); + regmap_config.name =3D config->name; + + mdio_regmap_priv->ctx =3D priv; + mdio_regmap_priv->config =3D config; + + return devm_regmap_init(dev, NULL, mdio_regmap_priv, + ®map_config); +} +EXPORT_SYMBOL_GPL(devm_mdio_regmap_init); + MODULE_DESCRIPTION("MDIO API over regmap"); MODULE_AUTHOR("Maxime Chevallier "); MODULE_LICENSE("GPL"); diff --git a/include/linux/mdio/mdio-regmap.h b/include/linux/mdio/mdio-reg= map.h index 679d9069846b..504fa2046043 100644 --- a/include/linux/mdio/mdio-regmap.h +++ b/include/linux/mdio/mdio-regmap.h @@ -17,10 +17,24 @@ struct mdio_regmap_config { struct regmap *regmap; char name[MII_BUS_ID_SIZE]; u8 valid_addr; + /* devm_mdio_regmap_init is required with this enabled */ + bool support_encoded_addr; bool autoscan; }; =20 struct mii_bus *devm_mdio_regmap_register(struct device *dev, const struct mdio_regmap_config *config); =20 +struct mdio_regmap_init_config { + const char *name; + + int (*mdio_read)(void *ctx, int addr, int regnum); + int (*mdio_write)(void *ctx, int addr, int regnum, u16 val); + int (*mdio_read_c45)(void *ctx, int addr, int devnum, int regnum); + int (*mdio_write_c45)(void *ctx, int addr, int devnum, int regnum, u16 va= l); +}; + +struct regmap *devm_mdio_regmap_init(struct device *dev, void *priv, + const struct mdio_regmap_init_config *config); + #endif --=20 2.48.1