From nobody Mon Feb 9 05:25:00 2026 Received: from mx0a-0064b401.pphosted.com (mx0a-0064b401.pphosted.com [205.220.166.238]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3908D4A04; Tue, 8 Apr 2025 03:25:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.166.238 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744082719; cv=none; b=RTlNKNXSvJGPbj8T1G+jG2MgWprA68r3a2A/0fRnTV/qpBzknwS1VpAh5E+WEtorHFhfVj7dGNa03VfH+zr8OXvLLoiptb6LdnhAd0pjOpIPUlv2pbBpdXh4WxOBHl+NY2Jybcnjy5b56+Dnjm2Fl2wJ3txj91Z9Jd3Ktp5QHWQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744082719; c=relaxed/simple; bh=De9S0jKXQHWL4ddOS+2LDXVwVwuUSfQ6GnrVTLPs2yU=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=T/lf1Cz3NnkRH1nsec9U9P8SXv0a21g5VPoF9sIb747flv4o+x9GvyVpwpZOUPqcKDP+CHULo/+r2xdfaTtsGFBijHiizjod+yOcGRyLmqfudmwloQVfvmVJseweXW9pnYkHB+SBeKNTPI387sIbZkKJkeyPriM9noJrFux5Xcs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=windriver.com; spf=pass smtp.mailfrom=windriver.com; arc=none smtp.client-ip=205.220.166.238 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=windriver.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=windriver.com Received: from pps.filterd (m0250810.ppops.net [127.0.0.1]) by mx0a-0064b401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 5383GKqd014976; Mon, 7 Apr 2025 20:25:02 -0700 Received: from ala-exchng01.corp.ad.wrs.com (ala-exchng01.wrs.com [147.11.82.252]) by mx0a-0064b401.pphosted.com (PPS) with ESMTPS id 45tyt4b0k1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Mon, 07 Apr 2025 20:25:01 -0700 (PDT) Received: from ALA-EXCHNG02.corp.ad.wrs.com (147.11.82.254) by ala-exchng01.corp.ad.wrs.com (147.11.82.252) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.43; Mon, 7 Apr 2025 20:25:01 -0700 Received: from pek-lpg-core1.wrs.com (147.11.136.210) by ALA-EXCHNG02.corp.ad.wrs.com (147.11.82.254) with Microsoft SMTP Server id 15.1.2507.43 via Frontend Transport; Mon, 7 Apr 2025 20:24:57 -0700 From: To: CC: , , , , , , , , , , , , , , , , , Subject: [PATCH 5.10.y] drm/amd/display: Skip inactive planes within ModeSupportAndSystemConfiguration Date: Tue, 8 Apr 2025 11:24:56 +0800 Message-ID: <20250408032456.3437393-1-jianqi.ren.cn@windriver.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: 5-F-MLBWDWSd1-w6nLaD6MTbksbZORpR X-Authority-Analysis: v=2.4 cv=RMSzH5i+ c=1 sm=1 tr=0 ts=67f4970d cx=c_pps a=/ZJR302f846pc/tyiSlYyQ==:117 a=/ZJR302f846pc/tyiSlYyQ==:17 a=XR8D0OoHHMoA:10 a=zd2uoN0lAAAA:8 a=t7CeM3EgAAAA:8 a=jWJrOWpaenu_S2W2EP4A:9 a=FdTzh2GWekK77mhwV6Dw:22 X-Proofpoint-GUID: 5-F-MLBWDWSd1-w6nLaD6MTbksbZORpR X-Sensitive_Customer_Information: Yes X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-08_01,2025-04-07_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 malwarescore=0 suspectscore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 adultscore=0 clxscore=1015 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.21.0-2502280000 definitions=main-2504080022 Content-Type: text/plain; charset="utf-8" From: Hersen Wu [ Upstream commit a54f7e866cc73a4cb71b8b24bb568ba35c8969df ] [Why] Coverity reports Memory - illegal accesses. [How] Skip inactive planes. Reviewed-by: Alex Hung Acked-by: Tom Chung Signed-off-by: Hersen Wu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher [get_pipe_idx() was introduced as a helper by dda4fb85e433 ("drm/amd/display: DML changes for DCN32/321") in v6.0. This patch backports it to make code clearer. And minor conflict is resolved due to code context change.] Signed-off-by: Jianqi Ren Signed-off-by: He Zhe --- Verified the build test --- .../drm/amd/display/dc/dml/display_mode_vba.c | 27 ++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/driver= s/gpu/drm/amd/display/dc/dml/display_mode_vba.c index b32093136089..7dfcb1e0a6ff 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c @@ -825,11 +825,30 @@ static unsigned int CursorBppEnumToBits(enum cursor_b= pp ebpp) } } =20 +static unsigned int get_pipe_idx(struct display_mode_lib *mode_lib, unsign= ed int plane_idx) +{ + int pipe_idx =3D -1; + int i; + + ASSERT(plane_idx < DC__NUM_DPP__MAX); + + for (i =3D 0; i < DC__NUM_DPP__MAX ; i++) { + if (plane_idx =3D=3D mode_lib->vba.pipe_plane[i]) { + pipe_idx =3D i; + break; + } + } + ASSERT(pipe_idx >=3D 0); + + return pipe_idx; +} + void ModeSupportAndSystemConfiguration(struct display_mode_lib *mode_lib) { soc_bounding_box_st *soc =3D &mode_lib->vba.soc; unsigned int k; unsigned int total_pipes =3D 0; + unsigned int pipe_idx =3D 0; =20 mode_lib->vba.VoltageLevel =3D mode_lib->vba.cache_pipes[0].clks_cfg.volt= age; mode_lib->vba.ReturnBW =3D mode_lib->vba.ReturnBWPerState[mode_lib->vba.V= oltageLevel][mode_lib->vba.maxMpcComb]; @@ -849,8 +868,14 @@ void ModeSupportAndSystemConfiguration(struct display_= mode_lib *mode_lib) mode_lib->vba.DISPCLK =3D soc->clock_limits[mode_lib->vba.VoltageLevel].= dispclk_mhz; =20 // Total Available Pipes Support Check - for (k =3D 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) + for (k =3D 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) { + pipe_idx =3D get_pipe_idx(mode_lib, k); + if (pipe_idx =3D=3D -1) { + ASSERT(0); + continue; // skip inactive planes + } total_pipes +=3D mode_lib->vba.DPPPerPlane[k]; + } ASSERT(total_pipes <=3D DC__NUM_DPP__MAX); } =20 --=20 2.34.1