From nobody Fri Dec 19 18:47:32 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 093ED18E025 for ; Tue, 8 Apr 2025 13:54:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744120472; cv=none; b=VBbeFzIvnE3N2aipTETYC46Vqym1zqAkD9KWi/8j+10+WDAuoF9wffohsslv1OtaWe/2J+Ny7+TFgN0CEqXPpZasIkr1VZBjmCdHzwg88Qx/JG8VNfBuNSceWyqEugHI79aYBb34BwWNFkj35dO+ZTfAnapcCT2BA1Sqq9cjhEw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744120472; c=relaxed/simple; bh=L9IQaB3dZM8dKuhg+AsdFe7mI75+GiJLHeHw0KwrydA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KwAwutXy95MLI7NNHxDmlKOULk3bhO1oo2n2j7F02do3J96ucI/s9NEXupCwcGUbhb7TksN6IxHsWjRpa4YC/yyPi4p9PUIkm2czMDavV2/YqLTNap6V4PSd3MHV3+8dSWbM5MzFeS3smgd2+NMEMRLiZKpeKBcOcApKpVk5O6Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=CJxbn19t; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="CJxbn19t" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 538AvDQW029678 for ; Tue, 8 Apr 2025 13:54:30 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= /guJuXHc+xbVtqg30cV1caMVZPLpuUM7s5OuX3mLwWc=; b=CJxbn19tadAm/bEz LH3+vbTc+ijjitBSHC0rp7D5KTuFp4jpyxm8qTw5OnCU0ONT/H372ft2Bbj8Rjz4 iv55IQKoyDYH86J7OLX3Oni77wU/cAFkk/2NdD1Ychv2qqC8N1WnA9IvWran+sYp Jr45Aqgx7kBRK2fZDNOzTuZDFQz0UYacLrgD/vU/gWfO33WnRPtseXgJ1OghWzJ1 JoEJbc8JtqqpRKkmeY0uoiJ7Sdj3e0BroZpUYYQVVTE/RuMvYvcXMI7vB0brPzh1 YtTZAF4K4yVzDbCKGx+4NMmCqbYcPbvPnVP3CjWuEWUWYlfe3oSJgFGyRYkcKk0Y 4BW8Qg== Received: from mail-qv1-f70.google.com (mail-qv1-f70.google.com [209.85.219.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 45twcrfy89-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Tue, 08 Apr 2025 13:54:29 +0000 (GMT) Received: by mail-qv1-f70.google.com with SMTP id 6a1803df08f44-6ecfbdaaee3so99310596d6.3 for ; Tue, 08 Apr 2025 06:54:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744120469; x=1744725269; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/guJuXHc+xbVtqg30cV1caMVZPLpuUM7s5OuX3mLwWc=; b=wATbh5MuBjmy5Fr+iDuK9L9LweRYARGyjh3Acz5duf1D0kVJ2n5fZM3bIvxOWlvIHt Gegq945ikfajYAhv0rw2d2q5fJqUR3CE2yxZsk0zbDHsIh/Z9fEI7DT5bM92QOnvfxLx kscXqbPVMoTpu/3bNJEvopYMutvbr86L6RkiJyt+8mbjaSTB89TeeuWoXETjeThfNCAm n8qp/LIB4wq51pqsH/FNaR606HAXBB9iUcdwnoYK1aRrwFY6BJC5POMDX1zj6zz5iAPJ iRWKvPC6rR8QfzavjuZ1HwsGYyTkFrL2DExC+SFchol/NJoWyZaCZsZI2DGLD+w/OmzJ XEwA== X-Forwarded-Encrypted: i=1; AJvYcCUKAjf+tBTsJvhOkDyKDYUM5T/Jtk06DeZ6S+/YQjaKbzS2ug/oqncaQhTet0EWnnZ/TJxBS6BUG0YcAYU=@vger.kernel.org X-Gm-Message-State: AOJu0Yye8ViMa8xID3HH5OWBVKv2HGcDszUAKgezbFdpQBGpaGanG1hJ V9CqRy0cw72lNf3bcpliX4+436nRdixSMJAGxMtRwfVVi7ELAMv4co7dNpZo7JH0YeQBgM8h5kz Pd+Hf6G8dFe8rPqfW90kapk8HEx71DfPQwtcwCKTa7jMzFy07PEbgwqD/z5kyI9g= X-Gm-Gg: ASbGnctLIQOYXjst+lEl/+8hZd3Px7g/UytfoVJy7JZpRYMXpF362l33LGK7KDRjQhc OrU/f5fFBANNeefmQWFI92IteLGG2AQghhrZGYForbTSgfTLrbvMb/tCY/g+M0m5UkEWK4qODr7 E5XmEiVQJlQhnUcGVgyrARMJE+p2BSRSrxhK5+MonJEcRhvCMHgIfrzxEjoCyE9/1H97AWdIp+G hs+PA2AiAHFIJfqvxKXkjlNi5gMGkKl+k/ieYtF5ZIP+1WKj32O2uKsIaiksU9VwrAl5lMlguyP Owtf/wLkMrim2WNGB3ot/zMhhlRCo1hDK3858FueGYLfExB4eS8vbn0lWYowBBRE2qHUcw9LIpT y2SkFTRsZMREHmD0oGdQZ7rEzc7Y0 X-Received: by 2002:a05:6214:248f:b0:6e4:2c6e:7cdc with SMTP id 6a1803df08f44-6f0b743ae6emr206622136d6.25.1744120468843; Tue, 08 Apr 2025 06:54:28 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEfEAtI/HIsnFwdVEpeu2yqHw/yNUl+z1lo/BcHgGXYSd0REcEptjTzaDcXI+ZTJ85YoGoPMA== X-Received: by 2002:a05:6214:248f:b0:6e4:2c6e:7cdc with SMTP id 6a1803df08f44-6f0b743ae6emr206621626d6.25.1744120468380; Tue, 08 Apr 2025 06:54:28 -0700 (PDT) Received: from umbar.lan (2001-14ba-a0c3-3a00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54c1e672306sm1515306e87.237.2025.04.08.06.54.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Apr 2025 06:54:27 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 08 Apr 2025 16:54:25 +0300 Subject: [PATCH v2 1/3] drm/display: hdmi: provide central data authority for ACR params Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250408-drm-hdmi-acr-v2-1-dee7298ab1af@oss.qualcomm.com> References: <20250408-drm-hdmi-acr-v2-0-dee7298ab1af@oss.qualcomm.com> In-Reply-To: <20250408-drm-hdmi-acr-v2-0-dee7298ab1af@oss.qualcomm.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , Dave Stevenson , =?utf-8?q?Ma=C3=ADra_Canal?= , Raspberry Pi Kernel Maintenance , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=7377; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=L9IQaB3dZM8dKuhg+AsdFe7mI75+GiJLHeHw0KwrydA=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBn9SqRE3+VLZtt/suKQpQbzQkVjSZTwoWlOTfxs JE0jHBCwdmJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ/UqkQAKCRCLPIo+Aiko 1WgiCACuLnOGgBnCPgnsWgdKKU99slAetDuFrOEvnolV+XF9DnF+LETgJAJtzzSwR4ZBYpo9hR4 uKFM5j/tAQqPxO9KrEii6pgeh5tzbQviJl76bjrSn0OW1pZwbvZTnRAYzNZHmbJe3WrV+MO3EeY ztUlnunttbrw27UAB+XOZbY5jU75/qWi0HP6xjrW2/XiBCY+augv8bAoeI+8VRFLXjbBq4oXvYq t6d+FkxpuIWevkl8QUndtIkD9kkXee/xFiacQFO1bSpaUiQinC/o4ieuCfzIcC1h3M7nq7iVhyi JT0j6f2zW/gHChu1se8HRG8FmpC0w1PyyMpz4W22mIr9a3+N X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-ORIG-GUID: ZhwKy8FDdUbvsTdoeJ_mkm7Pth86TbXa X-Authority-Analysis: v=2.4 cv=QuVe3Uyd c=1 sm=1 tr=0 ts=67f52a95 cx=c_pps a=oc9J++0uMp73DTRD5QyR2A==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=EUspDBNiAAAA:8 a=80M1J1airvQ5joFw3aUA:9 a=QEXdDO2ut3YA:10 a=iYH6xdkBrDN1Jqds4HTS:22 X-Proofpoint-GUID: ZhwKy8FDdUbvsTdoeJ_mkm7Pth86TbXa X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-08_06,2025-04-08_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 spamscore=0 malwarescore=0 mlxlogscore=999 bulkscore=0 priorityscore=1501 clxscore=1015 phishscore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504080098 HDMI standard defines recommended N and CTS values for Audio Clock Regeneration. Currently each driver implements those, frequently in somewhat unique way. Provide a generic helper for getting those values to be used by the HDMI drivers. The helper is added to drm_hdmi_helper.c rather than drm_hdmi_audio.c since HDMI drivers can be using this helper function even without switching to DRM HDMI Audio helpers. Note: currently this only handles the values per HDMI 1.4b Section 7.2 and HDMI 2.0 Section 9.2.1. Later the table can be expanded to accommodate for Deep Color TMDS char rates per HDMI 1.4 Appendix D and/or HDMI 2.0 / 2.1 Appendix C). Signed-off-by: Dmitry Baryshkov Reviewed-by: Maxime Ripard --- drivers/gpu/drm/display/drm_hdmi_helper.c | 168 ++++++++++++++++++++++++++= ++++ include/drm/display/drm_hdmi_helper.h | 6 ++ 2 files changed, 174 insertions(+) diff --git a/drivers/gpu/drm/display/drm_hdmi_helper.c b/drivers/gpu/drm/di= splay/drm_hdmi_helper.c index 74dd4d01dd9bb2c9e69ec1c60b0056bd69417e8a..855cb02b827d68fd630b13fe34f= 3b4d49645a380 100644 --- a/drivers/gpu/drm/display/drm_hdmi_helper.c +++ b/drivers/gpu/drm/display/drm_hdmi_helper.c @@ -256,3 +256,171 @@ drm_hdmi_compute_mode_clock(const struct drm_display_= mode *mode, return DIV_ROUND_CLOSEST_ULL(clock * bpc, 8); } EXPORT_SYMBOL(drm_hdmi_compute_mode_clock); + +struct drm_hdmi_acr_n_cts_entry { + unsigned int n; + unsigned int cts; +}; + +struct drm_hdmi_acr_data { + unsigned long tmds_clock_khz; + struct drm_hdmi_acr_n_cts_entry n_cts_32k, + n_cts_44k1, + n_cts_48k; +}; + +static const struct drm_hdmi_acr_data hdmi_acr_n_cts[] =3D { + { + /* "Other" entry */ + .n_cts_32k =3D { .n =3D 4096, }, + .n_cts_44k1 =3D { .n =3D 6272, }, + .n_cts_48k =3D { .n =3D 6144, }, + }, { + .tmds_clock_khz =3D 25175, + .n_cts_32k =3D { .n =3D 4576, .cts =3D 28125, }, + .n_cts_44k1 =3D { .n =3D 7007, .cts =3D 31250, }, + .n_cts_48k =3D { .n =3D 6864, .cts =3D 28125, }, + }, { + .tmds_clock_khz =3D 25200, + .n_cts_32k =3D { .n =3D 4096, .cts =3D 25200, }, + .n_cts_44k1 =3D { .n =3D 6272, .cts =3D 28000, }, + .n_cts_48k =3D { .n =3D 6144, .cts =3D 25200, }, + }, { + .tmds_clock_khz =3D 27000, + .n_cts_32k =3D { .n =3D 4096, .cts =3D 27000, }, + .n_cts_44k1 =3D { .n =3D 6272, .cts =3D 30000, }, + .n_cts_48k =3D { .n =3D 6144, .cts =3D 27000, }, + }, { + .tmds_clock_khz =3D 27027, + .n_cts_32k =3D { .n =3D 4096, .cts =3D 27027, }, + .n_cts_44k1 =3D { .n =3D 6272, .cts =3D 30030, }, + .n_cts_48k =3D { .n =3D 6144, .cts =3D 27027, }, + }, { + .tmds_clock_khz =3D 54000, + .n_cts_32k =3D { .n =3D 4096, .cts =3D 54000, }, + .n_cts_44k1 =3D { .n =3D 6272, .cts =3D 60000, }, + .n_cts_48k =3D { .n =3D 6144, .cts =3D 54000, }, + }, { + .tmds_clock_khz =3D 54054, + .n_cts_32k =3D { .n =3D 4096, .cts =3D 54054, }, + .n_cts_44k1 =3D { .n =3D 6272, .cts =3D 60060, }, + .n_cts_48k =3D { .n =3D 6144, .cts =3D 54054, }, + }, { + .tmds_clock_khz =3D 74176, + .n_cts_32k =3D { .n =3D 11648, .cts =3D 210937, }, /* and 210938 */ + .n_cts_44k1 =3D { .n =3D 17836, .cts =3D 234375, }, + .n_cts_48k =3D { .n =3D 11648, .cts =3D 140625, }, + }, { + .tmds_clock_khz =3D 74250, + .n_cts_32k =3D { .n =3D 4096, .cts =3D 74250, }, + .n_cts_44k1 =3D { .n =3D 6272, .cts =3D 82500, }, + .n_cts_48k =3D { .n =3D 6144, .cts =3D 74250, }, + }, { + .tmds_clock_khz =3D 148352, + .n_cts_32k =3D { .n =3D 11648, .cts =3D 421875, }, + .n_cts_44k1 =3D { .n =3D 8918, .cts =3D 234375, }, + .n_cts_48k =3D { .n =3D 5824, .cts =3D 140625, }, + }, { + .tmds_clock_khz =3D 148500, + .n_cts_32k =3D { .n =3D 4096, .cts =3D 148500, }, + .n_cts_44k1 =3D { .n =3D 6272, .cts =3D 165000, }, + .n_cts_48k =3D { .n =3D 6144, .cts =3D 148500, }, + }, { + .tmds_clock_khz =3D 296703, + .n_cts_32k =3D { .n =3D 5824, .cts =3D 421875, }, + .n_cts_44k1 =3D { .n =3D 4459, .cts =3D 234375, }, + .n_cts_48k =3D { .n =3D 5824, .cts =3D 281250, }, + }, { + .tmds_clock_khz =3D 297000, + .n_cts_32k =3D { .n =3D 3072, .cts =3D 222750, }, + .n_cts_44k1 =3D { .n =3D 4704, .cts =3D 247500, }, + .n_cts_48k =3D { .n =3D 5120, .cts =3D 247500, }, + }, { + .tmds_clock_khz =3D 593407, + .n_cts_32k =3D { .n =3D 5824, .cts =3D 843750, }, + .n_cts_44k1 =3D { .n =3D 8918, .cts =3D 937500, }, + .n_cts_48k =3D { .n =3D 5824, .cts =3D 562500, }, + }, { + .tmds_clock_khz =3D 594000, + .n_cts_32k =3D { .n =3D 3072, .cts =3D 445500, }, + .n_cts_44k1 =3D { .n =3D 9408, .cts =3D 990000, }, + .n_cts_48k =3D { .n =3D 6144, .cts =3D 594000, }, + }, +}; + +static int drm_hdmi_acr_find_tmds_entry(unsigned long tmds_clock_khz) +{ + int i; + + /* skip the "other" entry */ + for (i =3D 1; i < ARRAY_SIZE(hdmi_acr_n_cts); i++) { + if (hdmi_acr_n_cts[i].tmds_clock_khz =3D=3D tmds_clock_khz) + return i; + } + + return 0; +} + +/** + * drm_hdmi_acr_get_n_cts() - get N and CTS values for Audio Clock Regener= ation + * + * @tmds_char_rate: TMDS clock (char rate) as used by the HDMI connector + * @sample_rate: audio sample rate + * @out_n: a pointer to write the N value + * @out_cts: a pointer to write the CTS value + * + * Get the N and CTS values (either by calculating them or by returning da= ta + * from the tables. This follows the HDMI 1.4b Section 7.2 "Audio Sample C= lock + * Capture and Regeneration". + * + * Note, @sample_rate corresponds to the Fs value, see sections 7.2.4 - 7.= 2.6 + * on how to select Fs for non-L-PCM formats. + */ +void +drm_hdmi_acr_get_n_cts(unsigned long long tmds_char_rate, + unsigned int sample_rate, + unsigned int *out_n, + unsigned int *out_cts) +{ + /* be a bit more tolerant, especially for the 1.001 entries */ + unsigned long tmds_clock_khz =3D DIV_ROUND_CLOSEST_ULL(tmds_char_rate, 10= 00); + const struct drm_hdmi_acr_n_cts_entry *entry; + unsigned int n, cts, mult; + int tmds_idx; + + tmds_idx =3D drm_hdmi_acr_find_tmds_entry(tmds_clock_khz); + + /* + * Don't change the order, 192 kHz is divisible by 48k and 32k, but it + * should use 48k entry. + */ + if (sample_rate % 48000 =3D=3D 0) { + entry =3D &hdmi_acr_n_cts[tmds_idx].n_cts_48k; + mult =3D sample_rate / 48000; + } else if (sample_rate % 44100 =3D=3D 0) { + entry =3D &hdmi_acr_n_cts[tmds_idx].n_cts_44k1; + mult =3D sample_rate / 44100; + } else if (sample_rate % 32000 =3D=3D 0) { + entry =3D &hdmi_acr_n_cts[tmds_idx].n_cts_32k; + mult =3D sample_rate / 32000; + } else { + entry =3D NULL; + } + + if (entry) { + n =3D entry->n * mult; + cts =3D entry->cts; + } else { + /* Recommended optimal value, HDMI 1.4b, Section 7.2.1 */ + n =3D 128 * sample_rate / 1000; + cts =3D 0; + } + + if (!cts) + cts =3D DIV_ROUND_CLOSEST_ULL(tmds_char_rate * n, + 128 * sample_rate); + + *out_n =3D n; + *out_cts =3D cts; +} +EXPORT_SYMBOL(drm_hdmi_acr_get_n_cts); diff --git a/include/drm/display/drm_hdmi_helper.h b/include/drm/display/dr= m_hdmi_helper.h index 57e3b18c15ec79636d89267aba0e88f434c5d4db..09145c9ee9fc0cd839242f2373b= 305940e06e157 100644 --- a/include/drm/display/drm_hdmi_helper.h +++ b/include/drm/display/drm_hdmi_helper.h @@ -28,4 +28,10 @@ unsigned long long drm_hdmi_compute_mode_clock(const struct drm_display_mode *mode, unsigned int bpc, enum hdmi_colorspace fmt); =20 +void +drm_hdmi_acr_get_n_cts(unsigned long long tmds_char_rate, + unsigned int sample_rate, + unsigned int *out_n, + unsigned int *out_cts); + #endif --=20 2.39.5 From nobody Fri Dec 19 18:47:32 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D74C1CB9F0 for ; Tue, 8 Apr 2025 13:54:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744120474; cv=none; b=l06mzQD4h963t6BO2AOkmlKqZ4zgEJmttD5gKFKc7w6s3vFJCcBbedL6I5FNDhvT8Wt6DF6vNCQ5DwPxN47ws1omFJpmKkYgUGirxhcs8FpkyubMVGKAjPpkwof3TJtcm7tuGitupC7tzdOuRMNfguXyBoTlmreCMQNtW36l4/U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744120474; c=relaxed/simple; bh=5Dnaa5nU2/lgYjZ1nimtJqu9UVySqokolcJlX/EhafY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=s7hO9na8jR7Zn39aa1TjMNluXP+Um49V1eCveNogO3VrwQ4rI0XG1C94/yMUwtNK7g2wN5TSL6LUo33tNRTZ/49M+KHCGF+/N48RehakC3heoSpbQE4F35j5ZBEiCYNapDxKyuZ0IjBIkhpLOmdNKYnfuvs6F6fy97FnHdxhjyU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=e1xJhHsw; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="e1xJhHsw" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 538BEVuk014995 for ; Tue, 8 Apr 2025 13:54:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 9jtVHB+LSL7jwpKNp08BEBgDkCQoesKM3+hWFxnCDVk=; b=e1xJhHswOE4j6l6Q eyVWG9RNqdvggvyxUfHyYMcWyYG8eouF53oi6RQuzOm1EgVeHdmOABFXbIHsZ+d2 MaCUoas4gMnvz9VVcnLSXX7fb4FISR4LcwxyRpMJmnuww4CnDUDGYUgBplegeibY qLXnWRSat7pXNcGzfmX603UqDOyuTpaY9XvF8iGnp3fhLRrkQhLu7ugP1YqAFCaT eTwb+XHrNaoNlrPRHrz31UpuIcJ5k26dGtO+Rcp3Pbgshjg3mbvEpCGtD5bXJ2FP DK/TgFgWvILOD3MX/Vt0PMBIrPgTpteKorJ2zfA2btHNE2AF1rmNDTQGP5YWouGk ba6e8g== Received: from mail-qv1-f70.google.com (mail-qv1-f70.google.com [209.85.219.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 45twbug06e-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Tue, 08 Apr 2025 13:54:32 +0000 (GMT) Received: by mail-qv1-f70.google.com with SMTP id 6a1803df08f44-6eb1e240eddso100973736d6.0 for ; Tue, 08 Apr 2025 06:54:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744120471; x=1744725271; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9jtVHB+LSL7jwpKNp08BEBgDkCQoesKM3+hWFxnCDVk=; b=PYzCtjk192RUhf3pkgLPTSS1ubmGexsvD648dJLLcJJPW6eEvf0SWsvIrFy9KRM0BN YMcRlwijMjyc88S3XwpHa3HifNUR4S1+YxWS3JbO5nm7SoxGrvuGpRTMhvt6aVTorKXb 8biYA4Ayf74bpjMhDwwnrFCxdULG7ThpxG5VZ/AJz3naq7/eW9a9vLIHkUyhT/YrNzoZ 1wZobEhspS2GMKWMj2JZh4ryyWxjTZIRGadA5jojKPv3iWpSQJ0xRWaoeINHN8Mxbd+2 5E8Zswd3cRdN74joaY3DazCGGFootOg8PqywFzo7kb0GsomT5zX+PJY1Qt1+vAPv2RtG P/Uw== X-Forwarded-Encrypted: i=1; AJvYcCUIpO2705+oI7C6MjHb8Wj2vIPWuauOxK5c5Af05Yxk+ZJqnkNk0GFvfegUfA396jLMG2ZkbFV8aiFhaPQ=@vger.kernel.org X-Gm-Message-State: AOJu0YxNZE5abdo52BmZnTyU76CmX5LjJS6Thx6DTF2Rd0uRSWzP6NnW lnOvb8zH4HLGCsEryzVH5LAGA8C+abGVld89pJ2gtyE4f4fhxoYObLvE0aVir4xQsTd9LnZfjI7 /+TnGyiLljIKUE8fwnyUVwZcIwA12MEWmEJDH/u/rNbYIuvxAMSEPSXye9iVLYk8= X-Gm-Gg: ASbGncsL6kKHa/SPrdSxy660RBbdP9PTJ06TI3kDBtNjLWHP28yjnTIWVR5otVbriEo lpO2f5uopP8Mqt9siedDQKGeOZt5/JbsDLxBTF6rW0RgdLqO/gFEaEpDoBf/QB18aiHew/iawDd kT9t5D6kErTKcBc23boD4g/r76XE5QH7EpQN2sVV5BN+p43CejBbS4fjWcjxWj1delpoFGxxRaS NyIsGQQwoDXhQn6Wy5fRF3jVWPUbWy6JI/9hgABxo2LzE64yQhhvP5Eeh9ciVvtjoH3+8w9Wbrs iYmeqQk8oDp2nDBo6zJ1pViKZidA4Kfh17WL3C+x0yYLlBJ3I/mr8vO6gdjAHnmjftMn9hj3rlR qq16vQ6FxKGVo1R9I5YI2nMu7VQaK X-Received: by 2002:a05:6214:29e3:b0:6e8:f60c:5879 with SMTP id 6a1803df08f44-6f01e7e9b8emr227190186d6.42.1744120471090; Tue, 08 Apr 2025 06:54:31 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG/mVxtxCHKg/wXvM0W6651vvlIK97AkhY/TbhIAFbIce/NERJC8FY9A2ZvMtOD4hLPH5vZSw== X-Received: by 2002:a05:6214:29e3:b0:6e8:f60c:5879 with SMTP id 6a1803df08f44-6f01e7e9b8emr227189916d6.42.1744120470706; Tue, 08 Apr 2025 06:54:30 -0700 (PDT) Received: from umbar.lan (2001-14ba-a0c3-3a00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54c1e672306sm1515306e87.237.2025.04.08.06.54.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Apr 2025 06:54:28 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 08 Apr 2025 16:54:26 +0300 Subject: [PATCH v2 2/3] drm/msm/hdmi: move msm_hdmi_audio_update() out of msm_hdmi_set_timings() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250408-drm-hdmi-acr-v2-2-dee7298ab1af@oss.qualcomm.com> References: <20250408-drm-hdmi-acr-v2-0-dee7298ab1af@oss.qualcomm.com> In-Reply-To: <20250408-drm-hdmi-acr-v2-0-dee7298ab1af@oss.qualcomm.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , Dave Stevenson , =?utf-8?q?Ma=C3=ADra_Canal?= , Raspberry Pi Kernel Maintenance , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1569; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=5Dnaa5nU2/lgYjZ1nimtJqu9UVySqokolcJlX/EhafY=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBn9SqRdA37uRn+R1KQbc2w0UaLXYPYJwEzzwBtO i0APoP8S+yJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ/UqkQAKCRCLPIo+Aiko 1fCCB/0aE/Zr52AB9WQRb7/JZUkDvI+VrlMax3gl6oDlXBZl57/YmrlWjBrLJthR0kJSWE99L+k vHkJeMBMZ2OchATf4n8Gay6fqxBkWsrP7f7Us7OdenLsDUQvddq9ZAFs3PCez7wM5fkH4xQRjev aQWF1H1XZrusgshbp7SkAQyxqkMF+dGp2zIUiF3G849mTz5JDrK1VGeoYxWm2Nfkb5DbAxmd3by Y5of9TTXw9nqi2UPzunlNUJRf9loWdk9UxUsYPCBVE6UQpd0UZ0VqTzQ7aZyfEiy9Edwb3CTVHo ttmLC/Rwal5LET9cwrI6t6vwn2Wuf/arQZaEydmnSAcNAqNd X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-GUID: n82I2JhTOnrzG5WADEJndiBP_RPkIPJk X-Proofpoint-ORIG-GUID: n82I2JhTOnrzG5WADEJndiBP_RPkIPJk X-Authority-Analysis: v=2.4 cv=dbeA3WXe c=1 sm=1 tr=0 ts=67f52a98 cx=c_pps a=oc9J++0uMp73DTRD5QyR2A==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=EUspDBNiAAAA:8 a=7vAEta9WQHVFImzO9-QA:9 a=QEXdDO2ut3YA:10 a=iYH6xdkBrDN1Jqds4HTS:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-08_06,2025-04-08_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 mlxlogscore=784 phishscore=0 mlxscore=0 spamscore=0 malwarescore=0 clxscore=1015 adultscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504080098 There is a duplication between msm_hdmi_audio_update() calls in msm_hdmi_set_timings() and msm_hdmi_bridge_atomic_pre_enable(). Merge those two calls to be performed unconditionally at msm_hdmi_bridge_atomic_pre_enable(). Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c b/drivers/gpu/drm/msm/h= dmi/hdmi_bridge.c index 1456354c8af4bc7f655e8a47e958e9e0b99b7d29..d1218f2a6e9fd70c0e4e30a620d= aa69e84e12e9f 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c @@ -324,10 +324,11 @@ static void msm_hdmi_bridge_atomic_pre_enable(struct = drm_bridge *bridge, msm_hdmi_phy_resource_enable(phy); msm_hdmi_power_on(bridge); hdmi->power_on =3D true; - if (connector->display_info.is_hdmi) - msm_hdmi_audio_update(hdmi); } =20 + if (connector->display_info.is_hdmi) + msm_hdmi_audio_update(hdmi); + drm_atomic_helper_connector_hdmi_update_infoframes(connector, state); =20 msm_hdmi_phy_powerup(phy, hdmi->pixclock); @@ -411,9 +412,6 @@ static void msm_hdmi_set_timings(struct hdmi *hdmi, frame_ctrl |=3D HDMI_FRAME_CTRL_INTERLACED_EN; DBG("frame_ctrl=3D%08x", frame_ctrl); hdmi_write(hdmi, REG_HDMI_FRAME_CTRL, frame_ctrl); - - if (hdmi->connector->display_info.is_hdmi) - msm_hdmi_audio_update(hdmi); } =20 static const struct drm_edid *msm_hdmi_bridge_edid_read(struct drm_bridge = *bridge, --=20 2.39.5 From nobody Fri Dec 19 18:47:32 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA4361D54FA for ; Tue, 8 Apr 2025 13:54:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744120477; cv=none; b=ku8DfzApkVa4wbcKOEBJb+GDmhZezAkRuY3fbMMFHMwzUxT5ecV8adl5wP2X+lofKFtI8FOFGGTBo1E7YUUxo4hzC3CY+fur34pZODbD1Qke92/p1aW2BN9axYT7cLZ+U/IaDHNlBBNsFA5oSz5J+GiC1jx5ZN43TX2L061jOGw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744120477; c=relaxed/simple; bh=m7dH730YTdioUF5BVViTo6J7jKQSmTmURsxOFoLc+Wo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=q+fuFl2WQ7qOXCbq6ty0598KYSGqyZWqR32QqFjWlAG3ZGA/BR2u4+l2k7qRFI449Irk2obgBsoX1SNTxxx0BeEBS7Ls49sBMQwv8gs/8Z9VDGfy7LIEs318T9A7qO3RLwLde/tmdwGKUa0CTAobiWprRU0J0oljmeHF4UK9vtU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=RnFwscvg; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="RnFwscvg" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 538BCxi2014460 for ; Tue, 8 Apr 2025 13:54:34 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= VoddT4WTJIJT0yNhT4FC4b/bYXrodo9njax9aVNsabE=; b=RnFwscvgRGaY79kn CufrIekzoCXLRuK4GT6Br4LqUZ/MXzkW16QwRiGW94WlUpnHdZy5ZautnWgy9Psc 6xWLFuSZRpua+C2ky1MIoiZOlT7D2CujIvLgdWBwz3TYLPYGZ4JOZubi6yljjAvf JRAKbKwUKl/dBQHt90//P8HYlU/EDekO2TJESAAYxc9Xz1qoLU1Wm8GKiR658qmK 3Elg9YIcVfUQH5VIkyDwqTabJeW23B0wVFQSbuIxFIMilfEXYhYru2vTPUmGGb28 pmBK1FiwuaekPL6PhF31u5BFdOzBNL8D8b43Ysjp5QPdSY9zIekIV1oojEMY6ese 91eQRQ== Received: from mail-qv1-f71.google.com (mail-qv1-f71.google.com [209.85.219.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 45twpm7wq2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Tue, 08 Apr 2025 13:54:34 +0000 (GMT) Received: by mail-qv1-f71.google.com with SMTP id 6a1803df08f44-6e91d8a7165so94871976d6.0 for ; Tue, 08 Apr 2025 06:54:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744120472; x=1744725272; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VoddT4WTJIJT0yNhT4FC4b/bYXrodo9njax9aVNsabE=; b=CwNUhcjbLstycyNOBTJKjMHKovvSwbYztf1EqCZgS1s94kbHQMUxQG928sqSBkyXBU fuLUj6jibq36My3wBuJlrQPc1vbOTnRX/KdzvSI0YYoW6kUoDQR23THymDd/+TRwmWfJ muiYhRZbx2CJ47hzqNg7jX0R5ychygX2IdAzS5BK46tu1Ef9zsUdcuXRfxYmVylUl8AC 7snfpezeWdOi//AJd257W1S+qDQVkFqnBdhM8sinUh2UAj9lO0KlgGpiwO5ltKG1XJrY Xk1mdWrXZgzRNeH7oeXqgrJXiBwl5/m2XrH6hXcDv855y/xgOclnL9Ae/VowRmui6OXt 1/jg== X-Forwarded-Encrypted: i=1; AJvYcCVFGQK6xcaMZIICGiQe4M8Z3VhWGfqMIzjZO/wIKlsXf+97eqh1yFhy97qyQtPafKXgpsZqAziAr6zUkOs=@vger.kernel.org X-Gm-Message-State: AOJu0YzZGiJRzr4/O19GOzt7oB4p1mg9jzFH93AA93VNuML0NOpG1yjq oqXeGm8pnzO9laTS9wJ1a5wCr140C7CxAd9cc4wJWb54gq1w+fFc+x2fz61bjBnLjQBoqfjdem6 gw5VL3pFU7MhBQvbx7LC9aM1QkmYAv8dBCfJ5jASW3u0eMnVH9mPK5nogLovmhEc= X-Gm-Gg: ASbGncsJERKFU1fCiRdkJh5iqg8vY4YrGp7R9BoSte6v3r5vHcm91+k52VyIslmYXUY QFDEpFrLB/t3UjNeJOmlOjvfKrPn41XK6fz0gmG+T87JcXy78ydupHOoqCBUF9YGRkCXo8AZ8kw 2EVEXUsTTVWzhkPiz9RtxcmxhaVSVAGu8xc4ghsbyZBT9lLwP0gjnfPomw5GXNX8xgEmk1Ea5ag i6HTrqwhD+zwBEzUr8sPQe4Lg+2jaF3lU+CqgPDC6+al/qZslV1U1F7SFzy0wajbGCopKLQP/1B dN7iNVehSrBxBlsv+0TwiMl8SxnxB0oegh6ReqVZps+Z1Q3X0b0Qz/SjKJNcCbWA/yysRp4YoT1 wFBuzzuaZTtT5knDL0LleFkna41Ec X-Received: by 2002:ad4:5d6f:0:b0:6e8:f945:ec5 with SMTP id 6a1803df08f44-6f0b74a2698mr150976986d6.24.1744120472376; Tue, 08 Apr 2025 06:54:32 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHo5PtguWrlPQkg7PzNT6JSePd3gmBOQfxAcQUB3c3JU0H5P9uXM23N437IMVVcobqB10EG3g== X-Received: by 2002:ad4:5d6f:0:b0:6e8:f945:ec5 with SMTP id 6a1803df08f44-6f0b74a2698mr150976406d6.24.1744120471980; Tue, 08 Apr 2025 06:54:31 -0700 (PDT) Received: from umbar.lan (2001-14ba-a0c3-3a00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54c1e672306sm1515306e87.237.2025.04.08.06.54.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Apr 2025 06:54:31 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 08 Apr 2025 16:54:27 +0300 Subject: [PATCH v2 3/3] drm/msm/hdmi: use new helper for ACR tables Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250408-drm-hdmi-acr-v2-3-dee7298ab1af@oss.qualcomm.com> References: <20250408-drm-hdmi-acr-v2-0-dee7298ab1af@oss.qualcomm.com> In-Reply-To: <20250408-drm-hdmi-acr-v2-0-dee7298ab1af@oss.qualcomm.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , Dave Stevenson , =?utf-8?q?Ma=C3=ADra_Canal?= , Raspberry Pi Kernel Maintenance , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6543; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=m7dH730YTdioUF5BVViTo6J7jKQSmTmURsxOFoLc+Wo=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBn9SqRUveFfRw04aerqV4P1mxeRUVXtv2YfHPig cIqw6Sz6R+JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ/UqkQAKCRCLPIo+Aiko 1cPYCACXyHEU5d593vgc9iDjQqplYCWxJZ93UbGcZfD1ZH0Xfqdy1Qtquvs1tTi+yEuDsXtp578 EUJZJws/+kRBMjcM95QDIJiWifHuirYizSbSpj6d/qi8qfGh54EK9TEG1azNWdwgwqYjG/VMWDv vt5tJivF4ADAa2D0YzINUtR4WE4/+fuMZsrOchgAecygGGIxEKcQdmgZeZNKIP4pYrKLRw/PluH gVr+B3LM3NMq+VO8GGBsi+F43msoMbFC/t7vUdjdKPMtVm9EcKoTHqyhfeoE0iBVZdOY4zOYagj HzhkW/3QEMqUTUN5r1BmzIglWJ2TUxYe4gtA/qlbCy8TBkaE X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-GUID: l6F5lMMPu3LlrJXVM55gwSB3Vk_D3hyB X-Proofpoint-ORIG-GUID: l6F5lMMPu3LlrJXVM55gwSB3Vk_D3hyB X-Authority-Analysis: v=2.4 cv=MpRS63ae c=1 sm=1 tr=0 ts=67f52a9a cx=c_pps a=UgVkIMxJMSkC9lv97toC5g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=EUspDBNiAAAA:8 a=pGLkceISAAAA:8 a=qxPvP1J6ODAoBo1RHxQA:9 a=QEXdDO2ut3YA:10 a=1HOtulTD9v-eNWfpl4qZ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-08_06,2025-04-08_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxlogscore=999 clxscore=1015 priorityscore=1501 impostorscore=0 spamscore=0 bulkscore=0 suspectscore=0 malwarescore=0 adultscore=0 phishscore=0 mlxscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504080098 Use new drm_hdmi_acr_get_n_cts() helper instead of hand-coding the tables. Instead of storing the rate 'index', store the audio sample rate in hdmi->audio.rate, removing the need for even more defines. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/hdmi/hdmi_audio.c | 107 +++---------------------------= ---- 1 file changed, 9 insertions(+), 98 deletions(-) diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_audio.c b/drivers/gpu/drm/msm/hd= mi/hdmi_audio.c index 8bb975e82c17c1d77217128e9ddbd6a0575bb33d..b9ec14ef2c20ebfa03c30994eb2= 395f21b9502bb 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi_audio.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi_audio.c @@ -4,6 +4,7 @@ * Author: Rob Clark */ =20 +#include #include =20 #include @@ -12,71 +13,9 @@ =20 #include "hdmi.h" =20 -/* Supported HDMI Audio sample rates */ -#define MSM_HDMI_SAMPLE_RATE_32KHZ 0 -#define MSM_HDMI_SAMPLE_RATE_44_1KHZ 1 -#define MSM_HDMI_SAMPLE_RATE_48KHZ 2 -#define MSM_HDMI_SAMPLE_RATE_88_2KHZ 3 -#define MSM_HDMI_SAMPLE_RATE_96KHZ 4 -#define MSM_HDMI_SAMPLE_RATE_176_4KHZ 5 -#define MSM_HDMI_SAMPLE_RATE_192KHZ 6 -#define MSM_HDMI_SAMPLE_RATE_MAX 7 - - -struct hdmi_msm_audio_acr { - uint32_t n; /* N parameter for clock regeneration */ - uint32_t cts; /* CTS parameter for clock regeneration */ -}; - -struct hdmi_msm_audio_arcs { - unsigned long int pixclock; - struct hdmi_msm_audio_acr lut[MSM_HDMI_SAMPLE_RATE_MAX]; -}; - -#define HDMI_MSM_AUDIO_ARCS(pclk, ...) { (1000 * (pclk)), __VA_ARGS__ } - -/* Audio constants lookup table for hdmi_msm_audio_acr_setup */ -/* Valid Pixel-Clock rates: 25.2MHz, 27MHz, 27.03MHz, 74.25MHz, 148.5MHz */ -static const struct hdmi_msm_audio_arcs acr_lut[] =3D { - /* 25.200MHz */ - HDMI_MSM_AUDIO_ARCS(25200, { - {4096, 25200}, {6272, 28000}, {6144, 25200}, {12544, 28000}, - {12288, 25200}, {25088, 28000}, {24576, 25200} }), - /* 27.000MHz */ - HDMI_MSM_AUDIO_ARCS(27000, { - {4096, 27000}, {6272, 30000}, {6144, 27000}, {12544, 30000}, - {12288, 27000}, {25088, 30000}, {24576, 27000} }), - /* 27.027MHz */ - HDMI_MSM_AUDIO_ARCS(27030, { - {4096, 27027}, {6272, 30030}, {6144, 27027}, {12544, 30030}, - {12288, 27027}, {25088, 30030}, {24576, 27027} }), - /* 74.250MHz */ - HDMI_MSM_AUDIO_ARCS(74250, { - {4096, 74250}, {6272, 82500}, {6144, 74250}, {12544, 82500}, - {12288, 74250}, {25088, 82500}, {24576, 74250} }), - /* 148.500MHz */ - HDMI_MSM_AUDIO_ARCS(148500, { - {4096, 148500}, {6272, 165000}, {6144, 148500}, {12544, 165000}, - {12288, 148500}, {25088, 165000}, {24576, 148500} }), -}; - -static const struct hdmi_msm_audio_arcs *get_arcs(unsigned long int pixclo= ck) -{ - int i; - - for (i =3D 0; i < ARRAY_SIZE(acr_lut); i++) { - const struct hdmi_msm_audio_arcs *arcs =3D &acr_lut[i]; - if (arcs->pixclock =3D=3D pixclock) - return arcs; - } - - return NULL; -} - int msm_hdmi_audio_update(struct hdmi *hdmi) { struct hdmi_audio *audio =3D &hdmi->audio; - const struct hdmi_msm_audio_arcs *arcs =3D NULL; bool enabled =3D audio->enabled; uint32_t acr_pkt_ctrl, vbi_pkt_ctrl, aud_pkt_ctrl; uint32_t audio_config; @@ -94,15 +33,6 @@ int msm_hdmi_audio_update(struct hdmi *hdmi) enabled =3D false; } =20 - if (enabled) { - arcs =3D get_arcs(hdmi->pixclock); - if (!arcs) { - DBG("disabling audio: unsupported pixclock: %lu", - hdmi->pixclock); - enabled =3D false; - } - } - /* Read first before writing */ acr_pkt_ctrl =3D hdmi_read(hdmi, REG_HDMI_ACR_PKT_CTRL); vbi_pkt_ctrl =3D hdmi_read(hdmi, REG_HDMI_VBI_PKT_CTRL); @@ -116,15 +46,12 @@ int msm_hdmi_audio_update(struct hdmi *hdmi) uint32_t n, cts, multiplier; enum hdmi_acr_cts select; =20 - n =3D arcs->lut[audio->rate].n; - cts =3D arcs->lut[audio->rate].cts; + drm_hdmi_acr_get_n_cts(hdmi->pixclock, audio->rate, &n, &cts); =20 - if ((MSM_HDMI_SAMPLE_RATE_192KHZ =3D=3D audio->rate) || - (MSM_HDMI_SAMPLE_RATE_176_4KHZ =3D=3D audio->rate)) { + if (audio->rate =3D=3D 192000 || audio->rate =3D=3D 176400) { multiplier =3D 4; n >>=3D 2; /* divide N by 4 and use multiplier */ - } else if ((MSM_HDMI_SAMPLE_RATE_96KHZ =3D=3D audio->rate) || - (MSM_HDMI_SAMPLE_RATE_88_2KHZ =3D=3D audio->rate)) { + } else if (audio->rate =3D=3D 96000 || audio->rate =3D=3D 88200) { multiplier =3D 2; n >>=3D 1; /* divide N by 2 and use multiplier */ } else { @@ -137,13 +64,11 @@ int msm_hdmi_audio_update(struct hdmi *hdmi) acr_pkt_ctrl |=3D HDMI_ACR_PKT_CTRL_AUDIO_PRIORITY; acr_pkt_ctrl |=3D HDMI_ACR_PKT_CTRL_N_MULTIPLIER(multiplier); =20 - if ((MSM_HDMI_SAMPLE_RATE_48KHZ =3D=3D audio->rate) || - (MSM_HDMI_SAMPLE_RATE_96KHZ =3D=3D audio->rate) || - (MSM_HDMI_SAMPLE_RATE_192KHZ =3D=3D audio->rate)) + if (audio->rate =3D=3D 48000 || audio->rate =3D=3D 96000 || + audio->rate =3D=3D 192000) select =3D ACR_48; - else if ((MSM_HDMI_SAMPLE_RATE_44_1KHZ =3D=3D audio->rate) || - (MSM_HDMI_SAMPLE_RATE_88_2KHZ =3D=3D audio->rate) || - (MSM_HDMI_SAMPLE_RATE_176_4KHZ =3D=3D audio->rate)) + else if (audio->rate =3D=3D 44100 || audio->rate =3D=3D 88200 || + audio->rate =3D=3D 176400) select =3D ACR_44; else /* default to 32k */ select =3D ACR_32; @@ -204,7 +129,6 @@ int msm_hdmi_bridge_audio_prepare(struct drm_connector = *connector, { struct hdmi_bridge *hdmi_bridge =3D to_hdmi_bridge(bridge); struct hdmi *hdmi =3D hdmi_bridge->hdmi; - unsigned int rate; int ret; =20 drm_dbg_driver(bridge->dev, "%u Hz, %d bit, %d channels\n", @@ -214,25 +138,12 @@ int msm_hdmi_bridge_audio_prepare(struct drm_connecto= r *connector, =20 switch (params->sample_rate) { case 32000: - rate =3D MSM_HDMI_SAMPLE_RATE_32KHZ; - break; case 44100: - rate =3D MSM_HDMI_SAMPLE_RATE_44_1KHZ; - break; case 48000: - rate =3D MSM_HDMI_SAMPLE_RATE_48KHZ; - break; case 88200: - rate =3D MSM_HDMI_SAMPLE_RATE_88_2KHZ; - break; case 96000: - rate =3D MSM_HDMI_SAMPLE_RATE_96KHZ; - break; case 176400: - rate =3D MSM_HDMI_SAMPLE_RATE_176_4KHZ; - break; case 192000: - rate =3D MSM_HDMI_SAMPLE_RATE_192KHZ; break; default: drm_err(bridge->dev, "rate[%d] not supported!\n", @@ -245,7 +156,7 @@ int msm_hdmi_bridge_audio_prepare(struct drm_connector = *connector, if (ret) return ret; =20 - hdmi->audio.rate =3D rate; + hdmi->audio.rate =3D params->sample_rate; hdmi->audio.channels =3D params->cea.channels; hdmi->audio.enabled =3D true; =20 --=20 2.39.5