From nobody Mon Feb 9 05:59:25 2026 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0C482192E5 for ; Mon, 7 Apr 2025 17:29:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744046978; cv=none; b=XrRgRlcoMJzpvAoV47vbgG/Dibjb9ii6NpYDO6QoTTzc2CHAczXCdCJBj2PU2/UhFR+QdI/b6S/WZcIemy7FCjfZHHXCJeidY9yvFVs9gnhnZs4i+85VopTQoirQFRItPVpINp+zvO8U6CzPNeHajhs9on1rw8nL6oRXL1eYFlY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744046978; c=relaxed/simple; bh=YwQffT1aEOqjVu4z07Zs99qG9yuGlwLKY9+dxNhxdYE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cgKTxKMLsL/SIekg1tGyNvXfqnyeJfSvn4Jk+hNWFFKmezXbvv1xQDvAMhWy5H5y47dQZgK6Mhpa4mwSy0mYOECw2EsQmL9bEcMxo0ZEXpqM13p55atxpoQi8PPONaCB+OWdEXr9kwSDsGVOEVHpK5gXMCumhTr/DmxDH9OOEZI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=bPZm1eTc; arc=none smtp.client-ip=170.10.129.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="bPZm1eTc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1744046976; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Tuo2BZQlvc9qC7nHzNWOv25fLG9mfraZRBCulBhhTKU=; b=bPZm1eTcpGAE8vGc89fwesWgxuQ9WcQJDZfLjHIgawYft+Vk8BDkRCqFbS+hFD+HutE+Ar XtRrKtoct70/nH9OwJynVRFp13Tejlseq9JknNQCnsQpUg4JkqLpxi2egtzfzDfWFFuMby GMYdZKhlZ/8aOodZr5OdwxOJN4s79L4= Received: from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-611-TTjZY9N5OYaat_BzfeyQrQ-1; Mon, 07 Apr 2025 13:29:30 -0400 X-MC-Unique: TTjZY9N5OYaat_BzfeyQrQ-1 X-Mimecast-MFC-AGG-ID: TTjZY9N5OYaat_BzfeyQrQ_1744046968 Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 780A91801A1A; Mon, 7 Apr 2025 17:29:28 +0000 (UTC) Received: from p16v.luc.cera.cz (unknown [10.44.32.4]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id C6684180A803; Mon, 7 Apr 2025 17:29:22 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Michal Schmidt , Vadim Fedorenko , Arkadiusz Kubalewski , Jiri Pirko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Prathosh Satish , Lee Jones , Kees Cook , Andy Shevchenko , Andrew Morton , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: [PATCH 07/28] mfd: zl3073x: Add macro to wait for register value bits to be cleared Date: Mon, 7 Apr 2025 19:28:34 +0200 Message-ID: <20250407172836.1009461-8-ivecera@redhat.com> In-Reply-To: <20250407172836.1009461-1-ivecera@redhat.com> References: <20250407172836.1009461-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Content-Type: text/plain; charset="utf-8" Sometimes in communication with the device is necessary to set certain bit(s) in certain register and then the driver has to wait until these bits are cleared by the device. Add the macro for this functionality, it will be used by later commits. Reviewed-by: Michal Schmidt Signed-off-by: Ivan Vecera --- include/linux/mfd/zl3073x.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/include/linux/mfd/zl3073x.h b/include/linux/mfd/zl3073x.h index 3524426f0e3ba..15dfb0d8bf3cb 100644 --- a/include/linux/mfd/zl3073x.h +++ b/include/linux/mfd/zl3073x.h @@ -143,4 +143,33 @@ int zl3073x_write_##_name(struct zl3073x_dev *zldev, u= nsigned int idx, \ #define ZL3073X_REG48_IDX_DEF(_name, _addr, _num, _stride) \ __ZL3073X_REG_IDX_DEF(_name, _addr, 6, u64, _num, _stride) =20 +/** + * zl3073x_wait_clear_bits - wait for specific bits to be cleared + * _zldev: pointer to device structure + * _reg: register name + * _bits: bits that should be cleared + * _index: optional index for indexed register + * + * The macro waits up to @READ_TIMEOUT_US microseconds for @_bits in @_reg + * to be cleared. + * + * Returns: + * -ETIMEDOUT: if timeout occurred + * <0: for other errors occurred during communication + * 0: success + */ +#define READ_SLEEP_US 10 +#define READ_TIMEOUT_US 2000000 +#define zl3073x_wait_clear_bits(_zldev, _reg, _bits, _index...) \ +({ \ + zl3073x_##_reg##_t __val; \ + int __rc; \ + if (read_poll_timeout(zl3073x_read_##_reg, __rc, \ + __rc || !((_bits) & __val), \ + READ_SLEEP_US, READ_TIMEOUT_US, false, \ + _zldev, ##_index, &__val)) \ + __rc =3D -ETIMEDOUT; \ + __rc; \ +}) + #endif /* __LINUX_MFD_ZL3073X_H */ --=20 2.48.1