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[98.219.206.88]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6ef0f138e15sm57662556d6.82.2025.04.07.06.13.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Apr 2025 06:13:23 -0700 (PDT) From: Brian Masney To: sboyd@kernel.org, mturquette@baylibre.com Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, mripard@redhat.com Subject: [PATCH 7/8] clk: test: introduce test variation for sibling rate changes on a mux Date: Mon, 7 Apr 2025 09:12:57 -0400 Message-ID: <20250407131258.70638-8-bmasney@redhat.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250407131258.70638-1-bmasney@redhat.com> References: <20250407131258.70638-1-bmasney@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce a test variation that creates a parent with two children: a divider and a mux. Ensure that changing the rate of the divider does not affect the rate of the mux. Signed-off-by: Brian Masney --- drivers/clk/clk_test.c | 46 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index d72ce0226dc7..97909caa71b2 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -900,6 +900,48 @@ clk_rate_change_sibling_div_gate_test_init(struct kuni= t *test) return &ctx->clk_ctx; } =20 +struct clk_rate_change_sibling_div_mux_sibling_context { + struct clk_dummy_div child1; + struct clk_multiple_parent_ctx child2_mux; + struct clk_test_rate_change_sibling_clk_ctx clk_ctx; +}; + +static struct clk_test_rate_change_sibling_clk_ctx * +clk_rate_change_sibling_div_mux_test_init(struct kunit *test) +{ + struct clk_rate_change_sibling_div_mux_sibling_context *ctx; + int ret; + + ctx =3D kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return ERR_PTR(-ENOMEM); + test->priv =3D ctx; + + ret =3D clk_init_multiple_parent_ctx(test, &ctx->child2_mux, + "parent0", DUMMY_CLOCK_RATE_24_MHZ, + "parent1", DUMMY_CLOCK_RATE_48_MHZ, + "child2", CLK_SET_RATE_NO_REPARENT, + &clk_multiple_parents_mux_ops); + if (ret) + return ERR_PTR(ret); + + ctx->child1.hw.init =3D CLK_HW_INIT_HW("child1", + &ctx->child2_mux.parents_ctx[0].hw, + &clk_dummy_div_ops, + CLK_SET_RATE_PARENT); + ret =3D clk_hw_register_kunit(test, NULL, &ctx->child1.hw); + if (ret) + return ERR_PTR(ret); + + KUNIT_ASSERT_EQ(test, ret, 0); + + ctx->clk_ctx.parent_clk =3D clk_hw_get_clk(&ctx->child2_mux.parents_ctx[0= ].hw, NULL); + ctx->clk_ctx.child1_clk =3D clk_hw_get_clk(&ctx->child1.hw, NULL); + ctx->clk_ctx.child2_clk =3D clk_hw_get_clk(&ctx->child2_mux.hw, NULL); + + return &ctx->clk_ctx; +} + struct clk_test_rate_change_sibling_test_case { const char *desc; struct clk_test_rate_change_sibling_clk_ctx *(*init)(struct kunit *test); @@ -910,6 +952,10 @@ static struct clk_test_rate_change_sibling_test_case c= lk_test_rate_change_siblin .desc =3D "div_gate", .init =3D clk_rate_change_sibling_div_gate_test_init, }, + { + .desc =3D "div_mux", + .init =3D clk_rate_change_sibling_div_mux_test_init, + }, }; =20 KUNIT_ARRAY_PARAM_DESC(clk_test_rate_change_sibling_test_case, --=20 2.49.0