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[98.219.206.88]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6ef0f138e15sm57662556d6.82.2025.04.07.06.13.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Apr 2025 06:13:09 -0700 (PDT) From: Brian Masney To: sboyd@kernel.org, mturquette@baylibre.com Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, mripard@redhat.com Subject: [PATCH 1/8] clk: test: introduce a few specific rate constants for mock testing Date: Mon, 7 Apr 2025 09:12:51 -0400 Message-ID: <20250407131258.70638-2-bmasney@redhat.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250407131258.70638-1-bmasney@redhat.com> References: <20250407131258.70638-1-bmasney@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some of the mock tests care about the relationship between two different rates, and the specific numbers are important, such as for mocking a divider. Signed-off-by: Brian Masney --- drivers/clk/clk_test.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index f08feeaa3750..1b34d54ec9c6 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -24,6 +24,10 @@ static const struct clk_ops empty_clk_ops =3D { }; #define DUMMY_CLOCK_INIT_RATE (42 * 1000 * 1000) #define DUMMY_CLOCK_RATE_1 (142 * 1000 * 1000) #define DUMMY_CLOCK_RATE_2 (242 * 1000 * 1000) +#define DUMMY_CLOCK_RATE_6_MHZ (6 * 1000 * 1000) +#define DUMMY_CLOCK_RATE_16_MHZ (16 * 1000 * 1000) +#define DUMMY_CLOCK_RATE_24_MHZ (24 * 1000 * 1000) +#define DUMMY_CLOCK_RATE_48_MHZ (48 * 1000 * 1000) =20 struct clk_dummy_context { struct clk_hw hw; --=20 2.49.0 From nobody Sun Feb 8 14:11:23 2026 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D203253B6E for ; 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(c-98-219-206-88.hsd1.pa.comcast.net. [98.219.206.88]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6ef0f138e15sm57662556d6.82.2025.04.07.06.13.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Apr 2025 06:13:11 -0700 (PDT) From: Brian Masney To: sboyd@kernel.org, mturquette@baylibre.com Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, mripard@redhat.com Subject: [PATCH 2/8] clk: test: introduce clk_dummy_div for a mock divider Date: Mon, 7 Apr 2025 09:12:52 -0400 Message-ID: <20250407131258.70638-3-bmasney@redhat.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250407131258.70638-1-bmasney@redhat.com> References: <20250407131258.70638-1-bmasney@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This is used to mock up a divider in the clk kunit tests. Signed-off-by: Brian Masney --- drivers/clk/clk_test.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index 1b34d54ec9c6..4908fb9c0c46 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -140,6 +140,47 @@ static const struct clk_ops clk_dummy_single_parent_op= s =3D { .get_parent =3D clk_dummy_single_get_parent, }; =20 +// 4 ought to be enough for anybody +#define CLK_DUMMY_DIV_WIDTH 4 + +struct clk_dummy_div { + struct clk_hw hw; + unsigned int div; +}; + +static unsigned long clk_dummy_div_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_dummy_div *div =3D container_of(hw, struct clk_dummy_div, hw); + + return divider_recalc_rate(hw, parent_rate, div->div, NULL, + CLK_DIVIDER_ROUND_CLOSEST, CLK_DUMMY_DIV_WIDTH); +} + +static long clk_dummy_div_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + return divider_round_rate(hw, rate, parent_rate, NULL, + CLK_DUMMY_DIV_WIDTH, CLK_DIVIDER_ROUND_CLOSEST); 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[98.219.206.88]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6ef0f138e15sm57662556d6.82.2025.04.07.06.13.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Apr 2025 06:13:13 -0700 (PDT) From: Brian Masney To: sboyd@kernel.org, mturquette@baylibre.com Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, mripard@redhat.com Subject: [PATCH 3/8] clk: test: introduce test suite for sibling rate changes on a divider Date: Mon, 7 Apr 2025 09:12:53 -0400 Message-ID: <20250407131258.70638-4-bmasney@redhat.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250407131258.70638-1-bmasney@redhat.com> References: <20250407131258.70638-1-bmasney@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce a test suite that creates a parent with two divider-only children, and ensure that changing the rate of one child does not affect the rate of the sibling. Some of the tests are disabled until the relevant issue(s) are fixed in the clk core. Signed-off-by: Brian Masney --- drivers/clk/clk_test.c | 135 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 135 insertions(+) diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index 4908fb9c0c46..7d4dd1a559db 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -653,6 +653,140 @@ clk_multiple_parents_mux_test_suite =3D { .test_cases =3D clk_multiple_parents_mux_test_cases, }; =20 +struct clk_rate_change_sibling_div_div_context { + struct clk_dummy_context parent; + struct clk_dummy_div child1, child2; + struct clk *parent_clk, *child1_clk, *child2_clk; +}; + +static int clk_rate_change_sibling_div_div_test_init(struct kunit *test) +{ + struct clk_rate_change_sibling_div_div_context *ctx; + int ret; + + ctx =3D kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + test->priv =3D ctx; + + ctx->parent.hw.init =3D CLK_HW_INIT_NO_PARENT("parent", &clk_dummy_rate_o= ps, 0); + ctx->parent.rate =3D DUMMY_CLOCK_RATE_24_MHZ; + ret =3D clk_hw_register_kunit(test, NULL, &ctx->parent.hw); + if (ret) + return ret; + + ctx->child1.hw.init =3D CLK_HW_INIT_HW("child1", &ctx->parent.hw, + &clk_dummy_div_ops, + CLK_SET_RATE_PARENT); + ret =3D clk_hw_register_kunit(test, NULL, &ctx->child1.hw); + if (ret) + return ret; + + ctx->child2.hw.init =3D CLK_HW_INIT_HW("child2", &ctx->parent.hw, + &clk_dummy_div_ops, + CLK_SET_RATE_PARENT); + ret =3D clk_hw_register_kunit(test, NULL, &ctx->child2.hw); + if (ret) + return ret; + + ctx->parent_clk =3D clk_hw_get_clk(&ctx->parent.hw, NULL); + ctx->child1_clk =3D clk_hw_get_clk(&ctx->child1.hw, NULL); + ctx->child2_clk =3D clk_hw_get_clk(&ctx->child2.hw, NULL); + + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->parent_clk), DUMMY_CLOCK_RATE_24_= MHZ); + + return 0; +} + +static void clk_rate_change_sibling_div_div_test_exit(struct kunit *test) +{ + struct clk_rate_change_sibling_div_div_context *ctx =3D test->priv; + + clk_put(ctx->parent_clk); + clk_put(ctx->child1_clk); + clk_put(ctx->child2_clk); +} + +/* + * Test that, for a parent with two divider-only children and one requests= a + * rate compatible with the existing parent rate, the parent and sibling r= ates + * are not affected. + */ +static void clk_test_rate_change_sibling_div_div_1(struct kunit *test) +{ + struct clk_rate_change_sibling_div_div_context *ctx =3D test->priv; + int ret; + + ret =3D clk_set_rate(ctx->child1_clk, DUMMY_CLOCK_RATE_6_MHZ); + KUNIT_ASSERT_EQ(test, ret, 0); + + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->parent_clk), DUMMY_CLOCK_RATE_24_= MHZ); + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child1_clk), DUMMY_CLOCK_RATE_6_M= HZ); + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child2_clk), DUMMY_CLOCK_RATE_24_= MHZ); +} + +/* + * Test that, for a parent with two divider-only children and one requests= a + * rate incompatible with the existing parent rate, the sibling rate is not + * affected. + */ +static void clk_test_rate_change_sibling_div_div_2(struct kunit *test) +{ + struct clk_rate_change_sibling_div_div_context *ctx =3D test->priv; + int ret; + + kunit_skip(test, "This needs to be fixed in the core."); + + ret =3D clk_set_rate(ctx->child1_clk, DUMMY_CLOCK_RATE_48_MHZ); + KUNIT_ASSERT_EQ(test, ret, 0); + + KUNIT_EXPECT_GE(test, clk_get_rate(ctx->parent_clk), DUMMY_CLOCK_RATE_48_= MHZ); + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child1_clk), DUMMY_CLOCK_RATE_48_= MHZ); + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child2_clk), DUMMY_CLOCK_RATE_24_= MHZ); +} + +/* + * Test that, for a parent with two divider-only children that request rat= es + * incompatible with the existing parent rate, both children end up with t= he + * requested rates. + */ +static void clk_test_rate_change_sibling_div_div_3(struct kunit *test) +{ + struct clk_rate_change_sibling_div_div_context *ctx =3D test->priv; + int ret; + + kunit_skip(test, "This needs to be fixed in the core."); + + ret =3D clk_set_rate(ctx->child1_clk, DUMMY_CLOCK_RATE_16_MHZ); + KUNIT_ASSERT_EQ(test, ret, 0); + + ret =3D clk_set_rate(ctx->child2_clk, DUMMY_CLOCK_RATE_48_MHZ); + KUNIT_ASSERT_EQ(test, ret, 0); + + KUNIT_EXPECT_GE(test, clk_get_rate(ctx->parent_clk), DUMMY_CLOCK_RATE_48_= MHZ); + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child2_clk), DUMMY_CLOCK_RATE_48_= MHZ); + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child1_clk), DUMMY_CLOCK_RATE_16_= MHZ); +} + +static struct kunit_case clk_rate_change_sibling_div_div_cases[] =3D { + KUNIT_CASE(clk_test_rate_change_sibling_div_div_1), + KUNIT_CASE(clk_test_rate_change_sibling_div_div_2), + KUNIT_CASE(clk_test_rate_change_sibling_div_div_3), + {} +}; + +/* + * Test suite that creates a parent with two divider-only children, and + * ensures that changing the rate of one child does not affect the rate + * of the other child. + */ +static struct kunit_suite clk_rate_change_sibling_div_div_test_suite =3D { + .name =3D "clk-rate-change-sibling-div-div", + .init =3D clk_rate_change_sibling_div_div_test_init, + .exit =3D clk_rate_change_sibling_div_div_test_exit, + .test_cases =3D clk_rate_change_sibling_div_div_cases, +}; + static int clk_orphan_transparent_multiple_parent_mux_test_init(struct kunit *test) { @@ -3445,6 +3579,7 @@ kunit_test_suites( &clk_leaf_mux_set_rate_parent_test_suite, &clk_test_suite, &clk_multiple_parents_mux_test_suite, + &clk_rate_change_sibling_div_div_test_suite, &clk_mux_no_reparent_test_suite, &clk_mux_notifier_test_suite, &clk_orphan_transparent_multiple_parent_mux_test_suite, --=20 2.49.0 From nobody Sun Feb 8 14:11:23 2026 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8871B253B53 for ; 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(c-98-219-206-88.hsd1.pa.comcast.net. [98.219.206.88]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6ef0f138e15sm57662556d6.82.2025.04.07.06.13.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Apr 2025 06:13:15 -0700 (PDT) From: Brian Masney To: sboyd@kernel.org, mturquette@baylibre.com Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, mripard@redhat.com Subject: [PATCH 4/8] clk: test: introduce clk_dummy_gate for a mock gate Date: Mon, 7 Apr 2025 09:12:54 -0400 Message-ID: <20250407131258.70638-5-bmasney@redhat.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250407131258.70638-1-bmasney@redhat.com> References: <20250407131258.70638-1-bmasney@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This is used to mock up a gate in the clk kunit tests. Signed-off-by: Brian Masney --- drivers/clk/clk_test.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index 7d4dd1a559db..14ae88df5389 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -181,6 +181,40 @@ static const struct clk_ops clk_dummy_div_ops =3D { .set_rate =3D clk_dummy_div_set_rate, }; =20 +struct clk_dummy_gate { + struct clk_hw hw; + bool enabled; +}; + +static int clk_dummy_gate_enable(struct clk_hw *hw) +{ + struct clk_dummy_gate *gate =3D container_of(hw, struct clk_dummy_gate, h= w); + + gate->enabled =3D true; + + return 0; +} + +static void clk_dummy_gate_disable(struct clk_hw *hw) +{ + struct clk_dummy_gate *gate =3D container_of(hw, struct clk_dummy_gate, h= w); + + gate->enabled =3D false; +} + +static int clk_dummy_gate_is_enabled(struct clk_hw *hw) +{ + struct clk_dummy_gate *gate =3D container_of(hw, struct clk_dummy_gate, h= w); + + return gate->enabled; +} + +static const struct clk_ops clk_dummy_gate_ops =3D { + .enable =3D clk_dummy_gate_enable, + .disable =3D clk_dummy_gate_disable, + .is_enabled =3D clk_dummy_gate_is_enabled, +}; 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[98.219.206.88]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6ef0f138e15sm57662556d6.82.2025.04.07.06.13.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Apr 2025 06:13:18 -0700 (PDT) From: Brian Masney To: sboyd@kernel.org, mturquette@baylibre.com Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, mripard@redhat.com Subject: [PATCH 5/8] clk: test: introduce test suite for sibling rate changes on a gate Date: Mon, 7 Apr 2025 09:12:55 -0400 Message-ID: <20250407131258.70638-6-bmasney@redhat.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250407131258.70638-1-bmasney@redhat.com> References: <20250407131258.70638-1-bmasney@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce a test suite that creates a parent with two children: a divider and a gate. Ensure that changing the rate of one child does not affect the rate of the gate. Some of the tests are disabled until the relevant issue(s) are fixed in the clk core. This is also implemented as a parameterized kunit test since additional test variations will be added. Signed-off-by: Brian Masney --- drivers/clk/clk_test.c | 156 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 156 insertions(+) diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index 14ae88df5389..df5d4b25aa69 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -821,6 +821,161 @@ static struct kunit_suite clk_rate_change_sibling_div= _div_test_suite =3D { .test_cases =3D clk_rate_change_sibling_div_div_cases, }; =20 +struct clk_test_rate_change_sibling_clk_ctx { + struct clk *parent_clk, *child1_clk, *child2_clk; +}; + +static void +clk_test_rate_change_sibling_clk_ctx_put(struct clk_test_rate_change_sibli= ng_clk_ctx *clk_ctx) +{ + clk_put(clk_ctx->parent_clk); + clk_put(clk_ctx->child1_clk); + clk_put(clk_ctx->child2_clk); +} + +struct clk_rate_change_sibling_div_gate_sibling_context { + struct clk_dummy_context parent; + struct clk_dummy_div child1; + struct clk_dummy_gate child2; + struct clk_test_rate_change_sibling_clk_ctx clk_ctx; +}; + +static struct clk_test_rate_change_sibling_clk_ctx * +clk_rate_change_sibling_div_gate_test_init(struct kunit *test) +{ + struct clk_rate_change_sibling_div_gate_sibling_context *ctx; + int ret; + + ctx =3D kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return ERR_PTR(-ENOMEM); + test->priv =3D ctx; + + ctx->parent.hw.init =3D CLK_HW_INIT_NO_PARENT("parent", &clk_dummy_rate_o= ps, 0); + ctx->parent.rate =3D DUMMY_CLOCK_RATE_24_MHZ; + ret =3D clk_hw_register_kunit(test, NULL, &ctx->parent.hw); + if (ret) + return ERR_PTR(ret); + + ctx->child1.hw.init =3D CLK_HW_INIT_HW("child1", &ctx->parent.hw, + &clk_dummy_div_ops, + CLK_SET_RATE_PARENT); + ret =3D clk_hw_register_kunit(test, NULL, &ctx->child1.hw); + if (ret) + return ERR_PTR(ret); + + ctx->child2.hw.init =3D CLK_HW_INIT_HW("child2", &ctx->parent.hw, + &clk_dummy_gate_ops, + CLK_SET_RATE_PARENT); + ret =3D clk_hw_register_kunit(test, NULL, &ctx->child2.hw); + if (ret) + return ERR_PTR(ret); + + ctx->clk_ctx.parent_clk =3D clk_hw_get_clk(&ctx->parent.hw, NULL); + ctx->clk_ctx.child1_clk =3D clk_hw_get_clk(&ctx->child1.hw, NULL); + ctx->clk_ctx.child2_clk =3D clk_hw_get_clk(&ctx->child2.hw, NULL); + + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->clk_ctx.parent_clk), + DUMMY_CLOCK_RATE_24_MHZ); + + return &ctx->clk_ctx; +} + +struct clk_test_rate_change_sibling_test_case { + const char *desc; + struct clk_test_rate_change_sibling_clk_ctx *(*init)(struct kunit *test); +}; + +static struct clk_test_rate_change_sibling_test_case clk_test_rate_change_= sibling_test_cases[] =3D { + { + .desc =3D "div_gate", + .init =3D clk_rate_change_sibling_div_gate_test_init, + }, +}; + +KUNIT_ARRAY_PARAM_DESC(clk_test_rate_change_sibling_test_case, + clk_test_rate_change_sibling_test_cases, desc); + +/* + * Test that, for a parent with two children and one requests a rate chang= e that + * requires a change to the parent rate, the sibling rates are not affecte= d. + */ +static void clk_test_rate_change_sibling_1(struct kunit *test) +{ + struct clk_test_rate_change_sibling_test_case *testcase =3D + (struct clk_test_rate_change_sibling_test_case *) test->param_value; + struct clk_test_rate_change_sibling_clk_ctx *ctx; + int ret; + + kunit_skip(test, "This needs to be fixed in the core."); + + ctx =3D testcase->init(test); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx); + + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child2_clk), DUMMY_CLOCK_RATE_24_= MHZ); + + ret =3D clk_set_rate(ctx->child1_clk, DUMMY_CLOCK_RATE_48_MHZ); + KUNIT_ASSERT_EQ(test, ret, 0); + + KUNIT_EXPECT_GE(test, clk_get_rate(ctx->parent_clk), DUMMY_CLOCK_RATE_48_= MHZ); + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child1_clk), DUMMY_CLOCK_RATE_48_= MHZ); + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child2_clk), DUMMY_CLOCK_RATE_24_= MHZ); + + clk_test_rate_change_sibling_clk_ctx_put(ctx); +} + +/* + * Test that, for a parent with two children where one requests an exclusi= ve + * rate and the other requests a rate change that requires a change to the + * parent rate, the sibling rates are not affected. + */ +static void clk_test_rate_change_sibling_2(struct kunit *test) +{ + struct clk_test_rate_change_sibling_test_case *testcase =3D + (struct clk_test_rate_change_sibling_test_case *)(test->param_value); + struct clk_test_rate_change_sibling_clk_ctx *ctx; + int ret; + + ctx =3D testcase->init(test); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx); + + ret =3D clk_rate_exclusive_get(ctx->child2_clk); + KUNIT_ASSERT_EQ(test, ret, 0); + + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child2_clk), DUMMY_CLOCK_RATE_24_= MHZ); + + ret =3D clk_set_rate(ctx->child1_clk, DUMMY_CLOCK_RATE_48_MHZ); + KUNIT_ASSERT_EQ(test, ret, 0); + + KUNIT_EXPECT_GE(test, clk_get_rate(ctx->parent_clk), DUMMY_CLOCK_RATE_24_= MHZ); + /* child1 is rounded to the closest supported rate */ + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child1_clk), DUMMY_CLOCK_RATE_24_= MHZ); + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child2_clk), DUMMY_CLOCK_RATE_24_= MHZ); + + clk_rate_exclusive_put(ctx->child2_clk); + + clk_test_rate_change_sibling_clk_ctx_put(ctx); +} + + +static struct kunit_case clk_rate_change_sibling_cases[] =3D { + KUNIT_CASE_PARAM(clk_test_rate_change_sibling_1, + clk_test_rate_change_sibling_test_case_gen_params), + KUNIT_CASE_PARAM(clk_test_rate_change_sibling_2, + clk_test_rate_change_sibling_test_case_gen_params), + {} +}; + +/* + * Test suite that creates a parent with two children: a gate and a mux. + * Ensure that changing the rate of one child does affect the rate of the + * other child. + */ +static struct kunit_suite clk_rate_change_sibling_test_suite =3D { + .name =3D "clk-rate-change-sibling", + .test_cases =3D clk_rate_change_sibling_cases, +}; + static int clk_orphan_transparent_multiple_parent_mux_test_init(struct kunit *test) { @@ -3614,6 +3769,7 @@ kunit_test_suites( &clk_test_suite, &clk_multiple_parents_mux_test_suite, &clk_rate_change_sibling_div_div_test_suite, + &clk_rate_change_sibling_test_suite, &clk_mux_no_reparent_test_suite, &clk_mux_notifier_test_suite, &clk_orphan_transparent_multiple_parent_mux_test_suite, --=20 2.49.0 From nobody Sun Feb 8 14:11:23 2026 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0CC81253B7E for ; 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(c-98-219-206-88.hsd1.pa.comcast.net. [98.219.206.88]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6ef0f138e15sm57662556d6.82.2025.04.07.06.13.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Apr 2025 06:13:20 -0700 (PDT) From: Brian Masney To: sboyd@kernel.org, mturquette@baylibre.com Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, mripard@redhat.com Subject: [PATCH 6/8] clk: test: introduce helper to create a mock mux Date: Mon, 7 Apr 2025 09:12:56 -0400 Message-ID: <20250407131258.70638-7-bmasney@redhat.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250407131258.70638-1-bmasney@redhat.com> References: <20250407131258.70638-1-bmasney@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce a helper to create a mock mux to reduce code duplication. This also changes it so that the relevant clk_hws are registered with the kunit framework. Signed-off-by: Brian Masney --- drivers/clk/clk_test.c | 141 +++++++++++++++-------------------------- 1 file changed, 52 insertions(+), 89 deletions(-) diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index df5d4b25aa69..d72ce0226dc7 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -538,45 +538,64 @@ static struct kunit_suite clk_uncached_test_suite =3D= { .test_cases =3D clk_uncached_test_cases, }; =20 -static int -clk_multiple_parents_mux_test_init(struct kunit *test) -{ - struct clk_multiple_parent_ctx *ctx; - const char *parents[2] =3D { "parent-0", "parent-1"}; +static int clk_init_multiple_parent_ctx(struct kunit *test, + struct clk_multiple_parent_ctx *ctx, + const char *parent0_name, + unsigned long parent0_rate, + const char *parent1_name, + unsigned long parent1_rate, + const char *mux_name, int mux_flags, + const struct clk_ops *mux_ops) +{ + const struct clk_hw *parents[2]; int ret; =20 - ctx =3D kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); - if (!ctx) - return -ENOMEM; - test->priv =3D ctx; - - ctx->parents_ctx[0].hw.init =3D CLK_HW_INIT_NO_PARENT("parent-0", + ctx->parents_ctx[0].hw.init =3D CLK_HW_INIT_NO_PARENT(parent0_name, &clk_dummy_rate_ops, 0); - ctx->parents_ctx[0].rate =3D DUMMY_CLOCK_RATE_1; + ctx->parents_ctx[0].rate =3D parent0_rate; ret =3D clk_hw_register_kunit(test, NULL, &ctx->parents_ctx[0].hw); if (ret) return ret; =20 - ctx->parents_ctx[1].hw.init =3D CLK_HW_INIT_NO_PARENT("parent-1", + ctx->parents_ctx[1].hw.init =3D CLK_HW_INIT_NO_PARENT(parent1_name, &clk_dummy_rate_ops, 0); - ctx->parents_ctx[1].rate =3D DUMMY_CLOCK_RATE_2; + ctx->parents_ctx[1].rate =3D parent1_rate; ret =3D clk_hw_register_kunit(test, NULL, &ctx->parents_ctx[1].hw); if (ret) return ret; =20 - ctx->current_parent =3D 0; - ctx->hw.init =3D CLK_HW_INIT_PARENTS("test-mux", parents, - &clk_multiple_parents_mux_ops, - CLK_SET_RATE_PARENT); + parents[0] =3D &ctx->parents_ctx[0].hw; + parents[1] =3D &ctx->parents_ctx[1].hw; + ctx->hw.init =3D CLK_HW_INIT_PARENTS_HW(mux_name, parents, + mux_ops, mux_flags); ret =3D clk_hw_register_kunit(test, NULL, &ctx->hw); if (ret) return ret; =20 + ctx->current_parent =3D 0; + return 0; } =20 +static int +clk_multiple_parents_mux_test_init(struct kunit *test) +{ + struct clk_multiple_parent_ctx *ctx; + + ctx =3D kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + test->priv =3D ctx; + + return clk_init_multiple_parent_ctx(test, ctx, + "parent-0", DUMMY_CLOCK_RATE_1, + "parent-1", DUMMY_CLOCK_RATE_2, + "test-mux", CLK_SET_RATE_PARENT, + &clk_multiple_parents_mux_ops); +} + /* * Test that for a clock with multiple parents, clk_get_parent() * actually returns the current one. @@ -2532,7 +2551,6 @@ static int clk_leaf_mux_set_rate_parent_test_init(struct kunit *test) { struct clk_leaf_mux_ctx *ctx; - const char *top_parents[2] =3D { "parent-0", "parent-1" }; int ret; =20 ctx =3D kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); @@ -2540,27 +2558,11 @@ clk_leaf_mux_set_rate_parent_test_init(struct kunit= *test) return -ENOMEM; test->priv =3D ctx; =20 - ctx->mux_ctx.parents_ctx[0].hw.init =3D CLK_HW_INIT_NO_PARENT("parent-0", - &clk_dummy_rate_ops, - 0); - ctx->mux_ctx.parents_ctx[0].rate =3D DUMMY_CLOCK_RATE_1; - ret =3D clk_hw_register(NULL, &ctx->mux_ctx.parents_ctx[0].hw); - if (ret) - return ret; - - ctx->mux_ctx.parents_ctx[1].hw.init =3D CLK_HW_INIT_NO_PARENT("parent-1", - &clk_dummy_rate_ops, - 0); - ctx->mux_ctx.parents_ctx[1].rate =3D DUMMY_CLOCK_RATE_2; - ret =3D clk_hw_register(NULL, &ctx->mux_ctx.parents_ctx[1].hw); - if (ret) - return ret; - - ctx->mux_ctx.current_parent =3D 0; - ctx->mux_ctx.hw.init =3D CLK_HW_INIT_PARENTS("test-mux", top_parents, - &clk_multiple_parents_mux_ops, - 0); - ret =3D clk_hw_register(NULL, &ctx->mux_ctx.hw); + ret =3D clk_init_multiple_parent_ctx(test, &ctx->mux_ctx, + "parent-0", DUMMY_CLOCK_RATE_1, + "parent-1", DUMMY_CLOCK_RATE_2, + "test-mux", 0, + &clk_multiple_parents_mux_ops); if (ret) return ret; =20 @@ -2748,7 +2750,6 @@ static int clk_mux_notifier_callback(struct notifier_= block *nb, static int clk_mux_notifier_test_init(struct kunit *test) { struct clk_mux_notifier_ctx *ctx; - const char *top_parents[2] =3D { "parent-0", "parent-1" }; int ret; =20 ctx =3D kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); @@ -2759,27 +2760,11 @@ static int clk_mux_notifier_test_init(struct kunit = *test) init_waitqueue_head(&ctx->pre_rate_change.wq); init_waitqueue_head(&ctx->post_rate_change.wq); =20 - ctx->mux_ctx.parents_ctx[0].hw.init =3D CLK_HW_INIT_NO_PARENT("parent-0", - &clk_dummy_rate_ops, - 0); - ctx->mux_ctx.parents_ctx[0].rate =3D DUMMY_CLOCK_RATE_1; - ret =3D clk_hw_register(NULL, &ctx->mux_ctx.parents_ctx[0].hw); - if (ret) - return ret; - - ctx->mux_ctx.parents_ctx[1].hw.init =3D CLK_HW_INIT_NO_PARENT("parent-1", - &clk_dummy_rate_ops, - 0); - ctx->mux_ctx.parents_ctx[1].rate =3D DUMMY_CLOCK_RATE_2; - ret =3D clk_hw_register(NULL, &ctx->mux_ctx.parents_ctx[1].hw); - if (ret) - return ret; - - ctx->mux_ctx.current_parent =3D 0; - ctx->mux_ctx.hw.init =3D CLK_HW_INIT_PARENTS("test-mux", top_parents, - &clk_multiple_parents_mux_ops, - 0); - ret =3D clk_hw_register(NULL, &ctx->mux_ctx.hw); + ret =3D clk_init_multiple_parent_ctx(test, &ctx->mux_ctx, + "parent-0", DUMMY_CLOCK_RATE_1, + "parent-1", DUMMY_CLOCK_RATE_2, + "test-mux", 0, + &clk_multiple_parents_mux_ops); if (ret) return ret; =20 @@ -2862,39 +2847,17 @@ static int clk_mux_no_reparent_test_init(struct kunit *test) { struct clk_multiple_parent_ctx *ctx; - const char *parents[2] =3D { "parent-0", "parent-1"}; - int ret; =20 ctx =3D kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); if (!ctx) return -ENOMEM; test->priv =3D ctx; =20 - ctx->parents_ctx[0].hw.init =3D CLK_HW_INIT_NO_PARENT("parent-0", - &clk_dummy_rate_ops, - 0); - ctx->parents_ctx[0].rate =3D DUMMY_CLOCK_RATE_1; - ret =3D clk_hw_register(NULL, &ctx->parents_ctx[0].hw); - if (ret) - return ret; - - ctx->parents_ctx[1].hw.init =3D CLK_HW_INIT_NO_PARENT("parent-1", - &clk_dummy_rate_ops, - 0); - ctx->parents_ctx[1].rate =3D DUMMY_CLOCK_RATE_2; - ret =3D clk_hw_register(NULL, &ctx->parents_ctx[1].hw); - if (ret) - return ret; - - ctx->current_parent =3D 0; - ctx->hw.init =3D CLK_HW_INIT_PARENTS("test-mux", parents, - &clk_multiple_parents_no_reparent_mux_ops, - 0); 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[98.219.206.88]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6ef0f138e15sm57662556d6.82.2025.04.07.06.13.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Apr 2025 06:13:23 -0700 (PDT) From: Brian Masney To: sboyd@kernel.org, mturquette@baylibre.com Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, mripard@redhat.com Subject: [PATCH 7/8] clk: test: introduce test variation for sibling rate changes on a mux Date: Mon, 7 Apr 2025 09:12:57 -0400 Message-ID: <20250407131258.70638-8-bmasney@redhat.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250407131258.70638-1-bmasney@redhat.com> References: <20250407131258.70638-1-bmasney@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce a test variation that creates a parent with two children: a divider and a mux. Ensure that changing the rate of the divider does not affect the rate of the mux. Signed-off-by: Brian Masney --- drivers/clk/clk_test.c | 46 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index d72ce0226dc7..97909caa71b2 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -900,6 +900,48 @@ clk_rate_change_sibling_div_gate_test_init(struct kuni= t *test) return &ctx->clk_ctx; } =20 +struct clk_rate_change_sibling_div_mux_sibling_context { + struct clk_dummy_div child1; + struct clk_multiple_parent_ctx child2_mux; + struct clk_test_rate_change_sibling_clk_ctx clk_ctx; +}; + +static struct clk_test_rate_change_sibling_clk_ctx * +clk_rate_change_sibling_div_mux_test_init(struct kunit *test) +{ + struct clk_rate_change_sibling_div_mux_sibling_context *ctx; + int ret; + + ctx =3D kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return ERR_PTR(-ENOMEM); + test->priv =3D ctx; + + ret =3D clk_init_multiple_parent_ctx(test, &ctx->child2_mux, + "parent0", DUMMY_CLOCK_RATE_24_MHZ, + "parent1", DUMMY_CLOCK_RATE_48_MHZ, + "child2", CLK_SET_RATE_NO_REPARENT, + &clk_multiple_parents_mux_ops); + if (ret) + return ERR_PTR(ret); + + ctx->child1.hw.init =3D CLK_HW_INIT_HW("child1", + &ctx->child2_mux.parents_ctx[0].hw, + &clk_dummy_div_ops, + CLK_SET_RATE_PARENT); + ret =3D clk_hw_register_kunit(test, NULL, &ctx->child1.hw); + if (ret) + return ERR_PTR(ret); + + KUNIT_ASSERT_EQ(test, ret, 0); + + ctx->clk_ctx.parent_clk =3D clk_hw_get_clk(&ctx->child2_mux.parents_ctx[0= ].hw, NULL); + ctx->clk_ctx.child1_clk =3D clk_hw_get_clk(&ctx->child1.hw, NULL); + ctx->clk_ctx.child2_clk =3D clk_hw_get_clk(&ctx->child2_mux.hw, NULL); + + return &ctx->clk_ctx; +} + struct clk_test_rate_change_sibling_test_case { const char *desc; struct clk_test_rate_change_sibling_clk_ctx *(*init)(struct kunit *test); @@ -910,6 +952,10 @@ static struct clk_test_rate_change_sibling_test_case c= lk_test_rate_change_siblin .desc =3D "div_gate", .init =3D clk_rate_change_sibling_div_gate_test_init, }, + { + .desc =3D "div_mux", + .init =3D clk_rate_change_sibling_div_mux_test_init, + }, }; =20 KUNIT_ARRAY_PARAM_DESC(clk_test_rate_change_sibling_test_case, --=20 2.49.0 From nobody Sun Feb 8 14:11:23 2026 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0DCF9254AED for ; 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[98.219.206.88]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6ef0f138e15sm57662556d6.82.2025.04.07.06.13.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Apr 2025 06:13:25 -0700 (PDT) From: Brian Masney To: sboyd@kernel.org, mturquette@baylibre.com Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, mripard@redhat.com Subject: [PATCH 8/8] clk: test: introduce test variation for sibling rate changes on a gate/mux Date: Mon, 7 Apr 2025 09:12:58 -0400 Message-ID: <20250407131258.70638-9-bmasney@redhat.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250407131258.70638-1-bmasney@redhat.com> References: <20250407131258.70638-1-bmasney@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce a test variation that creates a parent with two children: a gate and a mux. Ensure that changing the rate of the gate does not affect the rate of the mux. Signed-off-by: Brian Masney --- drivers/clk/clk_test.c | 46 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index 97909caa71b2..e6df1d2274b2 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -942,6 +942,48 @@ clk_rate_change_sibling_div_mux_test_init(struct kunit= *test) return &ctx->clk_ctx; } =20 +struct clk_rate_change_sibling_gate_mux_sibling_context { + struct clk_dummy_gate child1; + struct clk_multiple_parent_ctx child2_mux; + struct clk_test_rate_change_sibling_clk_ctx clk_ctx; +}; + +static struct clk_test_rate_change_sibling_clk_ctx * +clk_rate_change_sibling_gate_mux_test_init(struct kunit *test) +{ + struct clk_rate_change_sibling_gate_mux_sibling_context *ctx; + int ret; + + ctx =3D kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return ERR_PTR(-ENOMEM); + test->priv =3D ctx; + + ret =3D clk_init_multiple_parent_ctx(test, &ctx->child2_mux, + "parent0", DUMMY_CLOCK_RATE_24_MHZ, + "parent1", DUMMY_CLOCK_RATE_48_MHZ, + "child2", CLK_SET_RATE_NO_REPARENT, + &clk_multiple_parents_mux_ops); + if (ret) + return ERR_PTR(ret); + + ctx->child1.hw.init =3D CLK_HW_INIT_HW("child1", + &ctx->child2_mux.parents_ctx[0].hw, + &clk_dummy_gate_ops, + CLK_SET_RATE_PARENT); + ret =3D clk_hw_register_kunit(test, NULL, &ctx->child1.hw); + if (ret) + return ERR_PTR(ret); + + KUNIT_ASSERT_EQ(test, ret, 0); + + ctx->clk_ctx.parent_clk =3D clk_hw_get_clk(&ctx->child2_mux.parents_ctx[0= ].hw, NULL); + ctx->clk_ctx.child1_clk =3D clk_hw_get_clk(&ctx->child1.hw, NULL); + ctx->clk_ctx.child2_clk =3D clk_hw_get_clk(&ctx->child2_mux.hw, NULL); + + return &ctx->clk_ctx; +} + struct clk_test_rate_change_sibling_test_case { const char *desc; struct clk_test_rate_change_sibling_clk_ctx *(*init)(struct kunit *test); @@ -956,6 +998,10 @@ static struct clk_test_rate_change_sibling_test_case c= lk_test_rate_change_siblin .desc =3D "div_mux", .init =3D clk_rate_change_sibling_div_mux_test_init, }, + { + .desc =3D "gate_mux", + .init =3D clk_rate_change_sibling_gate_mux_test_init, + }, }; =20 KUNIT_ARRAY_PARAM_DESC(clk_test_rate_change_sibling_test_case, --=20 2.49.0