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In the case of the RK3576, we can make use of a port in the usb2 PHY to detect whether the OTG controller is connected to a type C port and apply some special behaviour accordingly. The usefulness of having different bits of a fully functioning USB stack point to each other is more general though, and not constrained to RK3576 at all, even for this use-case. Add a port property to the binding. Signed-off-by: Nicolas Frattaroli --- Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.ya= ml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml index 6a7ef556414cebad63c10de754778f84fd4486ee..3a662bfc353250a8ad9386ebb55= 75d1e84c1b5ba 100644 --- a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml +++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml @@ -78,6 +78,11 @@ properties: When set the driver will request its phandle as one companion-grf for some special SoCs (e.g rv1108). =20 + port: + $ref: /schemas/graph.yaml#/properties/port + description: + A port node to link the PHY to a USB connector's "high-speed" port. + host-port: type: object additionalProperties: false --=20 2.49.0 From nobody Mon Feb 9 03:52:21 2026 Received: from sender3-pp-f112.zoho.com (sender3-pp-f112.zoho.com [136.143.184.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 298DF22A4F4; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250407-rk3576-sige5-usb-v1-2-67eec166f82f@collabora.com> References: <20250407-rk3576-sige5-usb-v1-0-67eec166f82f@collabora.com> In-Reply-To: <20250407-rk3576-sige5-usb-v1-0-67eec166f82f@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Frank Wang Cc: Sebastian Reichel , kernel@collabora.com, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Nicolas Frattaroli X-Mailer: b4 0.14.2 With USB type C connectors, the vbus detect pin of the OTG controller attached to it is pulled high by a USB Type C controller chip such as the fusb302. This means USB enumeration on Type-C ports never works, as the vbus is always seen as high. Rockchip added some GRF register flags to deal with this situation. The RK3576 TRM calls these "soft_vbusvalid_bvalid" (con0 bit index 15) and "soft_vbusvalid_bvalid_sel" (con0 bit index 14). Downstream introduces a new vendor property which tells the USB 2 PHY that it's connected to a type C port, but we can do better. Since in such an arrangement, we'll have an OF graph connection to the USB connector anyway, we can walk said OF graph and check the connector's compatible to determine this without adding any further vendor properties. Do keep in mind that the usbdp PHY driver seemingly fiddles with these register fields as well, but what it does doesn't appear to be enough for us to get working USB enumeration, presumably because the whole vbus_attach logic needs to be adjusted as well either way. Signed-off-by: Nicolas Frattaroli --- drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 78 +++++++++++++++++++++++= ++-- 1 file changed, 74 insertions(+), 4 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/ro= ckchip/phy-rockchip-inno-usb2.c index b5e6a864deebbcb33375001fc6ed67b2dfee6954..7dc4f53e18fcf0c9d010dd78e5f= cd089b6bae43f 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -114,6 +115,8 @@ struct rockchip_chg_det_reg { /** * struct rockchip_usb2phy_port_cfg - usb-phy port configuration. * @phy_sus: phy suspend register. + * @svbus_en: soft vbus bvalid enable register. + * @svbus_sel: soft vbus bvalid selection register. * @bvalid_det_en: vbus valid rise detection enable register. * @bvalid_det_st: vbus valid rise detection status register. * @bvalid_det_clr: vbus valid rise detection clear register. @@ -140,6 +143,8 @@ struct rockchip_chg_det_reg { */ struct rockchip_usb2phy_port_cfg { struct usb2phy_reg phy_sus; + struct usb2phy_reg svbus_en; + struct usb2phy_reg svbus_sel; struct usb2phy_reg bvalid_det_en; struct usb2phy_reg bvalid_det_st; struct usb2phy_reg bvalid_det_clr; @@ -203,6 +208,7 @@ struct rockchip_usb2phy_cfg { * @event_nb: hold event notification callback. * @state: define OTG enumeration states before device reset. * @mode: the dr_mode of the controller. + * @typec_vbus_det: whether to apply Type C logic to OTG vbus detection. */ struct rockchip_usb2phy_port { struct phy *phy; @@ -222,6 +228,7 @@ struct rockchip_usb2phy_port { struct notifier_block event_nb; enum usb_otg_state state; enum usb_dr_mode mode; + bool typec_vbus_det; }; =20 /** @@ -495,6 +502,13 @@ static int rockchip_usb2phy_init(struct phy *phy) mutex_lock(&rport->mutex); =20 if (rport->port_id =3D=3D USB2PHY_PORT_OTG) { + if (rport->typec_vbus_det) { + if (rport->port_cfg->svbus_en.enable && + rport->port_cfg->svbus_sel.enable) { + property_enable(rphy->grf, &rport->port_cfg->svbus_en, true); + property_enable(rphy->grf, &rport->port_cfg->svbus_sel, true); + } + } if (rport->mode !=3D USB_DR_MODE_HOST && rport->mode !=3D USB_DR_MODE_UNKNOWN) { /* clear bvalid status and enable bvalid detect irq */ @@ -535,8 +549,7 @@ static int rockchip_usb2phy_init(struct phy *phy) if (ret) goto out; =20 - schedule_delayed_work(&rport->otg_sm_work, - OTG_SCHEDULE_DELAY * 3); + schedule_delayed_work(&rport->otg_sm_work, 0); } else { /* If OTG works in host only mode, do nothing. */ dev_dbg(&rport->phy->dev, "mode %d\n", rport->mode); @@ -666,8 +679,17 @@ static void rockchip_usb2phy_otg_sm_work(struct work_s= truct *work) unsigned long delay; bool vbus_attach, sch_work, notify_charger; =20 - vbus_attach =3D property_enabled(rphy->grf, - &rport->port_cfg->utmi_bvalid); + if (rport->port_cfg->svbus_en.enable && rport->typec_vbus_det) { + if (property_enabled(rphy->grf, &rport->port_cfg->svbus_en) && + property_enabled(rphy->grf, &rport->port_cfg->svbus_sel)) { + vbus_attach =3D true; + } else { + vbus_attach =3D false; + } + } else { + vbus_attach =3D property_enabled(rphy->grf, + &rport->port_cfg->utmi_bvalid); + } =20 sch_work =3D false; notify_charger =3D false; @@ -1276,6 +1298,48 @@ static int rockchip_otg_event(struct notifier_block = *nb, return NOTIFY_DONE; } =20 +static const char *const rockchip_usb2phy_typec_cons[] =3D { + "usb-c-connector", + NULL, +}; + +static bool rockchip_usb2phy_otg_is_type_c(struct rockchip_usb2phy *rphy) +{ + struct device_node *node =3D rphy->dev->of_node; + struct device_node *ports; + struct device_node *ep =3D NULL; + struct device_node *parent; + + ports =3D of_get_child_by_name(node, "ports"); + if (ports) + node =3D ports; + + for_each_of_graph_port(node, port) { + ep =3D of_get_child_by_name(port, "endpoint"); + if (!ep) + continue; + + parent =3D of_graph_get_remote_port_parent(ep); + of_node_put(ep); + if (!parent) + continue; + + if (of_device_compatible_match(parent, rockchip_usb2phy_typec_cons)) { + of_node_put(parent); + if (ports) + of_node_put(ports); + return true; + } + + of_node_put(parent); + } + + if (ports) + of_node_put(ports); + + return false; +} + static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy, struct rockchip_usb2phy_port *rport, struct device_node *child_np) @@ -1297,6 +1361,8 @@ static int rockchip_usb2phy_otg_port_init(struct rock= chip_usb2phy *rphy, =20 mutex_init(&rport->mutex); =20 + rport->typec_vbus_det =3D rockchip_usb2phy_otg_is_type_c(rphy); + rport->mode =3D of_usb_get_dr_mode_by_phy(child_np, -1); if (rport->mode =3D=3D USB_DR_MODE_HOST || rport->mode =3D=3D USB_DR_MODE_UNKNOWN) { @@ -1971,6 +2037,8 @@ static const struct rockchip_usb2phy_cfg rk3576_phy_c= fgs[] =3D { .port_cfgs =3D { [USB2PHY_PORT_OTG] =3D { .phy_sus =3D { 0x0000, 8, 0, 0, 0x1d1 }, + .svbus_en =3D { 0x0000, 15, 15, 0, 1 }, + .svbus_sel =3D { 0x0000, 14, 14, 0, 1 }, .bvalid_det_en =3D { 0x00c0, 1, 1, 0, 1 }, .bvalid_det_st =3D { 0x00c4, 1, 1, 0, 1 }, .bvalid_det_clr =3D { 0x00c8, 1, 1, 0, 1 }, @@ -2008,6 +2076,8 @@ static const struct rockchip_usb2phy_cfg rk3576_phy_c= fgs[] =3D { .port_cfgs =3D { [USB2PHY_PORT_OTG] =3D { .phy_sus =3D { 0x2000, 8, 0, 0, 0x1d1 }, + .svbus_en =3D { 0x2000, 15, 15, 0, 1 }, + .svbus_sel =3D { 0x2000, 14, 14, 0, 1 }, .bvalid_det_en =3D { 0x20c0, 1, 1, 0, 1 }, .bvalid_det_st =3D { 0x20c4, 1, 1, 0, 1 }, .bvalid_det_clr =3D { 0x20c8, 1, 1, 0, 1 }, --=20 2.49.0 From nobody Mon Feb 9 03:52:21 2026 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F172222FF2B; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250407-rk3576-sige5-usb-v1-3-67eec166f82f@collabora.com> References: <20250407-rk3576-sige5-usb-v1-0-67eec166f82f@collabora.com> In-Reply-To: <20250407-rk3576-sige5-usb-v1-0-67eec166f82f@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Frank Wang Cc: Sebastian Reichel , kernel@collabora.com, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Nicolas Frattaroli X-Mailer: b4 0.14.2 The dwc3 controllers on RK3576 appear to have some quirky behaviour relating to runtime power suspension. Specifically, they will cause SError aborts on register reads in the xhci code when setting the device role. Downstream appears to work around this by manually checking for the rk3576 compatible in the dwc3 core driver, and then setting the autosuspend delay to 200. This appears to be smaller than what mainline uses, and I'm not quite sure how that fixes it, but I could also be reading the code wrong. The important takeaway is that the RK3399 uses the same codepath. Looking at RK3399 in mainline then, we see that it has one quirk that RK3576 doesn't have in its dwc3 controllers: snps,dis_u2_susphy_quirk. Long story short, adding the snps,dis_u2_susphy_quirk property to rk3576.dtsi's dwc3 controllers fixes the issue. Quite suspicious that this is not needed among usb controllers based on dwc3 in other Rockchip designs, especially other RK35xx ones. Fixes: 23ec57a32da4 ("arm64: dts: rockchip: add usb related nodes for rk357= 6") Signed-off-by: Nicolas Frattaroli --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts= /rockchip/rk3576.dtsi index ebb5fc8bb8b1363127b9d3782801c4a79b678a92..71c71f5a2b77c52b251bea16e4d= eaa4b0109715a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -470,6 +470,7 @@ usb_drd0_dwc3: usb@23000000 { snps,dis-u2-freeclk-exists-quirk; snps,dis-del-phy-power-chg-quirk; snps,dis-tx-ipgap-linecheck-quirk; + snps,dis_u2_susphy_quirk; snps,parkmode-disable-hs-quirk; snps,parkmode-disable-ss-quirk; status =3D "disabled"; @@ -496,6 +497,7 @@ usb_drd1_dwc3: usb@23400000 { snps,dis-del-phy-power-chg-quirk; snps,dis-tx-ipgap-linecheck-quirk; snps,dis_rxdet_inp3_quirk; + snps,dis_u2_susphy_quirk; snps,parkmode-disable-hs-quirk; snps,parkmode-disable-ss-quirk; dma-coherent; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250407-rk3576-sige5-usb-v1-4-67eec166f82f@collabora.com> References: <20250407-rk3576-sige5-usb-v1-0-67eec166f82f@collabora.com> In-Reply-To: <20250407-rk3576-sige5-usb-v1-0-67eec166f82f@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Frank Wang Cc: Sebastian Reichel , kernel@collabora.com, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Nicolas Frattaroli X-Mailer: b4 0.14.2 The ArmSoM Sige5 has several USB ports: a Type-A USB 3 port (USB2 lines going through a hub), a Type-A USB 2.0 port (also going through a hub), a Type-C DC input port that has absolutely no USB data connection and a Type-C port with USB3.2 Gen1x1 that's also the maskrom programming port. Enable these ports, and set the device role to be host for the host ports. The data capable Type-C USB port uses a fusb302 for data role switching. It currently does not have functioning SuperSpeed with certain Type-C cables in one of the two possible orientations. Signed-off-by: Nicolas Frattaroli --- .../boot/dts/rockchip/rk3576-armsom-sige5.dts | 153 +++++++++++++++++= ++++ 1 file changed, 153 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts b/arch/ar= m64/boot/dts/rockchip/rk3576-armsom-sige5.dts index 828bde7fab68dc6bcbd13d75c8a72540b3666071..cdd8f8b2319105b1dae34395be2= 0e50d45cd4431 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts @@ -175,6 +175,33 @@ vcc_3v3_ufs_s0: regulator-vcc-ufs-s0 { regulator-max-microvolt =3D <3300000>; vin-supply =3D <&vcc_5v0_sys>; }; + + vcc_5v0_typec0: regulator-vcc-5v0-typec0 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_otg0_pwren>; + regulator-name =3D "vcc_5v0_typec0"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc_5v0_device>; + }; + vcc_5v0_usbhost: regulator-vcc-5v0-usbhost { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_host_pwren>; + regulator-name =3D "vcc_5v0_usbhost"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc_5v0_device>; + }; +}; + +&combphy1_psu { + status =3D "okay"; }; =20 &cpu_l0 { @@ -605,6 +632,58 @@ regulator-state-mem { &i2c2 { status =3D "okay"; =20 + usbc0: typec-portc@22 { + compatible =3D "fcs,fusb302"; + reg =3D <0x22>; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usbc0_interrupt>; + vbus-supply =3D <&vcc_5v0_typec0>; + + connector { + compatible =3D "usb-c-connector"; + label =3D "USB-C"; + data-role =3D "dual"; + /* fusb302 supports PD Rev 2.0 Ver 1.2 */ + pd-revision =3D /bits/ 8 <0x2 0x0 0x1 0x2>; + power-role =3D "source"; + source-pdos =3D ; + + altmodes { + displayport { + svid =3D /bits/ 16 <0xff01>; + vdo =3D <0xffffffff>; + }; + }; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + usbc0_hs_ep: endpoint { + remote-endpoint =3D <&u2phy0_ep>; + }; + }; + port@1 { + reg =3D <1>; + usbc0_ss_ep: endpoint { + remote-endpoint =3D <&usb_drd0_ep>; + }; + }; + port@2 { + reg =3D <2>; + usbc0_dp_ep: endpoint { + remote-endpoint =3D <&usbdp_phy_ep>; + }; + }; + }; + }; + }; + hym8563: rtc@51 { compatible =3D "haoyu,hym8563"; reg =3D <0x51>; @@ -655,6 +734,24 @@ led_rgb_g: led-green-en { rockchip,pins =3D <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + usb { + usb_host_pwren: usb-host-pwren { + rockchip,pins =3D <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + usb_otg0_pwren: usb-otg0-pwren { + rockchip,pins =3D <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + usbc0_interrupt: usbc0-interrupt { + rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + usbc0_sbu1: usbc0-sbu1 { + rockchip,pins =3D <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + usbc0_sbu2: usbc0-sbu2 { + rockchip,pins =3D <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; }; =20 &sdhci { @@ -683,11 +780,67 @@ &sdmmc { status =3D "okay"; }; =20 +&u2phy0 { + status =3D "okay"; + + port { + u2phy0_ep: endpoint { + remote-endpoint =3D <&usbc0_hs_ep>; + }; + }; +}; + +&u2phy0_otg { + status =3D "okay"; +}; + +&u2phy1 { + status =3D "okay"; +}; + +&u2phy1_otg { + phy-supply =3D <&vcc_5v0_usbhost>; + status =3D "okay"; +}; + &uart0 { pinctrl-0 =3D <&uart0m0_xfer>; status =3D "okay"; }; =20 +&usb_drd0_dwc3 { + usb-role-switch; + dr_mode =3D "otg"; + status =3D "okay"; + + port { + usb_drd0_ep: endpoint { + remote-endpoint =3D <&usbc0_ss_ep>; + }; + }; +}; + +&usb_drd1_dwc3 { + dr_mode =3D "host"; + status =3D "okay"; +}; + +&usbdp_phy { + mode-switch; + orientation-switch; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usbc0_sbu1 &usbc0_sbu2>; + sbu1-dc-gpios =3D <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>; + sbu2-dc-gpios =3D <&gpio2 RK_PA7 GPIO_ACTIVE_HIGH>; + status =3D "okay"; + + port { + usbdp_phy_ep: endpoint { + remote-endpoint =3D <&usbc0_dp_ep>; + }; + }; +}; + &vop { status =3D "okay"; }; --=20 2.49.0