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[76.88.115.8]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-739da0e3184sm2195304b3a.160.2025.04.03.18.45.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 18:45:16 -0700 (PDT) From: Sukrut Bellary To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Sukrut Bellary , Tero Kristo , Kevin Hilman , Andreas Kemnade , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/4] dt-bindings: clock: ti: Convert to yaml Date: Thu, 3 Apr 2025 18:44:57 -0700 Message-Id: <20250404014500.2789830-2-sbellary@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250404014500.2789830-1-sbellary@baylibre.com> References: <20250404014500.2789830-1-sbellary@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Covert TI autoidle clock txt binding to yaml. AutoIdle clock is not an individual clock; it is always a derivate of some basic clock like a gate, divider, or fixed-factor. This binding will be referred in ti,divider-clock.yaml, and ti,fixed-factor-clock.yaml. As all clocks don't support the autoidle feature e.g., in DRA77xx/AM57xx[1], dpll_abe_x2* and dpll_per_x2 don't have autoidle, remove required properties from the binding. Clean up the example to meet the current standards. Add the creator of the original binding as a maintainer. [1] https://www.ti.com/lit/ug/spruhz6l/spruhz6l.pdf Signed-off-by: Sukrut Bellary --- .../devicetree/bindings/clock/ti/autoidle.txt | 37 -------------- .../bindings/clock/ti/ti,autoidle.yaml | 49 +++++++++++++++++++ 2 files changed, 49 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/ti/autoidle.txt create mode 100644 Documentation/devicetree/bindings/clock/ti/ti,autoidle.= yaml diff --git a/Documentation/devicetree/bindings/clock/ti/autoidle.txt b/Docu= mentation/devicetree/bindings/clock/ti/autoidle.txt deleted file mode 100644 index 05645a10a9e3..000000000000 --- a/Documentation/devicetree/bindings/clock/ti/autoidle.txt +++ /dev/null @@ -1,37 +0,0 @@ -Binding for Texas Instruments autoidle clock. - -This binding uses the common clock binding[1]. It assumes a register mapped -clock which can be put to idle automatically by hardware based on the usage -and a configuration bit setting. Autoidle clock is never an individual -clock, it is always a derivative of some basic clock like a gate, divider, -or fixed-factor. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt - -Required properties: -- reg : offset for the register controlling the autoidle -- ti,autoidle-shift : bit shift of the autoidle enable bit -- ti,invert-autoidle-bit : autoidle is enabled by setting the bit to 0 - -Examples: - dpll_core_m4_ck: dpll_core_m4_ck { - #clock-cells =3D <0>; - compatible =3D "ti,divider-clock"; - clocks =3D <&dpll_core_x2_ck>; - ti,max-div =3D <31>; - ti,autoidle-shift =3D <8>; - reg =3D <0x2d38>; - ti,index-starts-at-one; - ti,invert-autoidle-bit; - }; - - dpll_usb_clkdcoldo_ck: dpll_usb_clkdcoldo_ck { - #clock-cells =3D <0>; - compatible =3D "ti,fixed-factor-clock"; - clocks =3D <&dpll_usb_ck>; - ti,clock-div =3D <1>; - ti,autoidle-shift =3D <8>; - reg =3D <0x01b4>; - ti,clock-mult =3D <1>; - ti,invert-autoidle-bit; - }; diff --git a/Documentation/devicetree/bindings/clock/ti/ti,autoidle.yaml b/= Documentation/devicetree/bindings/clock/ti/ti,autoidle.yaml new file mode 100644 index 000000000000..c995dae65cd6 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti/ti,autoidle.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/ti/ti,autoidle.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI autoidle clock + +maintainers: + - Tero Kristo + - Sukrut Bellary + +description: | + In TI SoC, some of the clocks support autoidle feature. + It assumes a register mapped clock which can be put to idle automatically + by hardware based on the usage and a configuration bit setting. + Autoidle clock is never an individual clock, it is always a derivative + of some basic clock like a gate, divider or fixed-factor. + +properties: + reg: + maxItems: 1 + + ti,autoidle-shift: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + bit shift of the autoidle enable bit for the clock + maximum: 31 + default: 0 + + ti,invert-autoidle-bit: + type: boolean + description: + autoidle is enabled by setting the bit to 0 + +additionalProperties: true + +examples: + - | + bus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + clock@1b4 { + reg =3D <0x01b4>; + ti,autoidle-shift =3D <8>; + ti,invert-autoidle-bit; + }; + }; --=20 2.34.1 From nobody Sun Feb 8 13:38:56 2026 Received: from mail-pl1-f181.google.com (mail-pl1-f181.google.com [209.85.214.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E33E1862A for ; Fri, 4 Apr 2025 01:45:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743731120; cv=none; b=NRK7UtzOt8w2gEgvAVDHHc6pkEF4XTIpkW18pLiuelJEWGhonL/Gi+CfTndBHpQggJd9maRoFMaCSD4/CRaLIhzY/NgQWEe8UIcyfWr3W0scyrRBhLEe8xzz2OLIkbA6DueCOwOE/EX7dptsyf2D6/3wI/OwddrE+dJpLF79USE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743731120; c=relaxed/simple; bh=VtZFzV4SFM7hxS9whoKifK0cWBFHUo7gxrtPQ7C+MbU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; 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[76.88.115.8]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-739da0e3184sm2195304b3a.160.2025.04.03.18.45.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 18:45:17 -0700 (PDT) From: Sukrut Bellary To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Sukrut Bellary , Tero Kristo , Kevin Hilman , Andreas Kemnade , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/4] dt-bindings: clock: ti: Convert to yaml Date: Thu, 3 Apr 2025 18:44:58 -0700 Message-Id: <20250404014500.2789830-3-sbellary@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250404014500.2789830-1-sbellary@baylibre.com> References: <20250404014500.2789830-1-sbellary@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This binding doesn't define a new clock binding type, it is used to group the existing clock nodes under the hardware hierarchy. As this is not a provider clock, remove #clock-cells and clock-output-names properties. Though few clockdomain nodes in the dts use these properties, we are not fixing dts here. Clean up the example to meet the current standards. Add the creator of the original binding as a maintainer. Signed-off-by: Sukrut Bellary --- .../bindings/clock/ti/clockdomain.txt | 25 ------------ .../bindings/clock/ti/ti,clockdomain.yaml | 38 +++++++++++++++++++ 2 files changed, 38 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/ti/clockdomain.= txt create mode 100644 Documentation/devicetree/bindings/clock/ti/ti,clockdoma= in.yaml diff --git a/Documentation/devicetree/bindings/clock/ti/clockdomain.txt b/D= ocumentation/devicetree/bindings/clock/ti/clockdomain.txt deleted file mode 100644 index edf0b5d42768..000000000000 --- a/Documentation/devicetree/bindings/clock/ti/clockdomain.txt +++ /dev/null @@ -1,25 +0,0 @@ -Binding for Texas Instruments clockdomain. - -This binding uses the common clock binding[1] in consumer role. -Every clock on TI SoC belongs to one clockdomain, but software -only needs this information for specific clocks which require -their parent clockdomain to be controlled when the clock is -enabled/disabled. This binding doesn't define a new clock -binding type, it is used to group existing clock nodes under -hardware hierarchy. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt - -Required properties: -- compatible : shall be "ti,clockdomain" -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : link phandles of clocks within this domain - -Optional properties: -- clock-output-names : from common clock binding. - -Examples: - dss_clkdm: dss_clkdm { - compatible =3D "ti,clockdomain"; - clocks =3D <&dss1_alwon_fck_3430es2>, <&dss_ick_3430es2>; - }; diff --git a/Documentation/devicetree/bindings/clock/ti/ti,clockdomain.yaml= b/Documentation/devicetree/bindings/clock/ti/ti,clockdomain.yaml new file mode 100644 index 000000000000..2bae2a0f6318 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti/ti,clockdomain.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/ti/ti,clockdomain.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI clock domain + +maintainers: + - Tero Kristo + - Sukrut Bellary + +description: | + Every clock on TI SoC belongs to one clockdomain. For specific clocks, t= he + parent clockdomain has to be controlled when the clock is enabled/disabl= ed. + This binding doesn't define a new clock binding type, it is used to group + the existing clock nodes under hardware hierarchy. + +properties: + compatible: + const: ti,clockdomain + + clocks: + description: + Clocks within this domain + +required: + - compatible + - clocks + +additionalProperties: false + +examples: + - | + l3init_clkdm: l3init_clkdm { + compatible =3D "ti,clockdomain"; + clocks =3D <&dpll_usb_ck>; + }; --=20 2.34.1 From nobody Sun Feb 8 13:38:56 2026 Received: from mail-pf1-f182.google.com (mail-pf1-f182.google.com [209.85.210.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D366540C03 for ; Fri, 4 Apr 2025 01:45:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743731122; cv=none; b=iRwo38qMjTmAp1LslUfek7ZmhthmTnmz4sKCImt5yhc3yjNY4GY2CxGedto8jUpfbuePGU1IW/QsFV9BIpo/kWKuHrLrLq+9sHiXwyTLusU0bGT33cegfKPjuk44ic4rvFBj6eTeU2L2tAhV77Bs5JE4hosRbn4mKpQQX3ji5ro= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743731122; c=relaxed/simple; bh=XyrVjnn9ecQMj9djszVEbyFjbsZwFr+wY/7gWXJsPWg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=TnsiIMGk2CruVI/sXc75TMDI2eTQtJxJXG2zYzu38ykrm5Blp6lRFZ08YYSX5XUI9nEu+lREZYyPpXFPBQUh3qwCoQ1N94R8bL9gl2AgTI6ZejaVmc8WeAqBrRY5Z6ONjcy7Z4uTKUixQMx3qLQPg76r7pHfzPvpqCig8y/KT1Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=2PY+bazA; arc=none smtp.client-ip=209.85.210.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="2PY+bazA" Received: by mail-pf1-f182.google.com with SMTP id d2e1a72fcca58-7390d21bb1cso1548535b3a.2 for ; Thu, 03 Apr 2025 18:45:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1743731120; x=1744335920; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7hxebOweifStf3z6ySwTp+Xen1QFoSr5f3zR234iKrw=; b=2PY+bazAJKUH1xmEGpdz6p1tvfSyEwEcLlSal2nkHjO888ePbfLEdZRTD067SOOK/1 j2QflwAemvw6lIIeqf0zUDMpnWLiw06UroGcvKNiHD7q5BUw5ZluzU7nzVMWb+qPb5wd +LrZqAdsztFfGqqzQXHrbX3/IGXnE9uU9pVVWljjr8q6nJDe7BxmY47d3T4RQ58+G8ah WhfsnYrFaD0wPvqXplx5DNtTAur56tww6IFWlcwrfGCVZogJ1UrfHiuoboLX2vngxn4w MIBRqkM93TsX1ijYY0LBPjSMsNVkn16xtypY8atx+Ywysjp/72JVaomyTxtPjIDA92d2 2jug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743731120; x=1744335920; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7hxebOweifStf3z6ySwTp+Xen1QFoSr5f3zR234iKrw=; b=agUnaUncnYSi52E4+0Kk+MIz1IhF1s0ULyHVIV/oOrXWL36B1JDMBcD8q5VcjFmP9j /JnM9TT2mSHlXAcdMbjsqmoRJFuT7+zQzNHB5lkTAiomgLXockZ2iD7OnZHNz0Aqas7i eD7uMhXyWFQ6OKeKMNOFopx3xLfhgWelh//IKk0DV1u9PC21nPVqC4l5CORE+q++SJwo MWj/Rg+lFRX/86Y/XZM1UlT5JbjiGhzb43qSshDOA7mfPCLemCCn0e2UEC/8Ejn+JTFy k6RG8dmW2dcZM4MVpiRtj4m2jXOZW4EKCsrworkFeo16hBD62Fr/sCuNQZKM7+YZyajR u/kQ== X-Forwarded-Encrypted: i=1; AJvYcCX63W9Rmxdjaiq86zoeyDqnBFYbul89yUTPAnsHPOcTa4IKKkCDVJnSRndaBbcjylr6Q2RIXx6zEzULyjE=@vger.kernel.org X-Gm-Message-State: AOJu0YylEYJagC7/XmMpXNPOtCBju/dlLs01wtNJ3U6MyUF29cE14wYZ b+VemOJBHFXR0i8vJLosSKX1FvHNdDxsYixFXkX+BHoi6qfFbTfdDsnieyyIM1g= X-Gm-Gg: ASbGnctRfKK6Mdk+HJMH7+UZ8OOEpwxa62DPbBqA0/0aFKr2SjXM01NLaYpvx2NndQU ecDO9sM9vEKvye6turu3kjhffSVZrXAqUVtnWsKda6TX2VaQ3aw4jMXHrYLGWMBKu0kJle++ybW 7kshUpyJKYEke+ZQ0jX2pVHC5rcQKudWacI22wHFHN1U6hMlKeW5AWZSRZlQdBfvO6LxYn64/uj yy566u8NMnl+voTW+sw8SqJB0dQsdcOlapohTebXpTFZlKxrCxZ0dPwKT9byVSqWiSLfP7IH7Mi 2DayH6v7/HLtSu7R/joQlh/bFDZ6QmkRZr9jkQEf1VuoQTA8bwV2Snm2kNMSklaPlF8BZL144PV 8dmASPjID8jmoJbLvZA== X-Google-Smtp-Source: AGHT+IEYtyq3ib8Nb7l29LOFumqsz6yP+qE+YaQmefqgCtGNFZVPQip/OmDYNm40WqWnzi/y6S7tzw== X-Received: by 2002:a05:6a00:1701:b0:736:ab1d:83c4 with SMTP id d2e1a72fcca58-739e46ba78cmr2077253b3a.0.1743731120108; Thu, 03 Apr 2025 18:45:20 -0700 (PDT) Received: from dev-linux.. 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[76.88.115.8]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-739da0e3184sm2195304b3a.160.2025.04.03.18.45.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 18:45:19 -0700 (PDT) From: Sukrut Bellary To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Sukrut Bellary , Tero Kristo , Kevin Hilman , Andreas Kemnade , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/4] dt-bindings: clock: ti: Convert fixed-factor-clock to yaml Date: Thu, 3 Apr 2025 18:44:59 -0700 Message-Id: <20250404014500.2789830-4-sbellary@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250404014500.2789830-1-sbellary@baylibre.com> References: <20250404014500.2789830-1-sbellary@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert TI fixed-factor-clock binding to yaml. This uses the ti,autoidle.yaml for clock autoidle support. Clean up the example to meet the current standards. Add the creator of the original binding as a maintainer. Signed-off-by: Sukrut Bellary --- .../bindings/clock/ti/fixed-factor-clock.txt | 42 ---------- .../clock/ti/ti,fixed-factor-clock.yaml | 77 +++++++++++++++++++ 2 files changed, 77 insertions(+), 42 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/ti/fixed-factor= -clock.txt create mode 100644 Documentation/devicetree/bindings/clock/ti/ti,fixed-fac= tor-clock.yaml diff --git a/Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.= txt b/Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt deleted file mode 100644 index dc69477b6e98..000000000000 --- a/Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt +++ /dev/null @@ -1,42 +0,0 @@ -Binding for TI fixed factor rate clock sources. - -This binding uses the common clock binding[1], and also uses the autoidle -support from TI autoidle clock [2]. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Documentation/devicetree/bindings/clock/ti/autoidle.txt - -Required properties: -- compatible : shall be "ti,fixed-factor-clock". -- #clock-cells : from common clock binding; shall be set to 0. -- ti,clock-div: fixed divider. -- ti,clock-mult: fixed multiplier. -- clocks: parent clock. - -Optional properties: -- clock-output-names : from common clock binding. -- ti,autoidle-shift: bit shift of the autoidle enable bit for the clock, - see [2] -- reg: offset for the autoidle register of this clock, see [2] -- ti,invert-autoidle-bit: autoidle is enabled by setting the bit to 0, see= [2] -- ti,set-rate-parent: clk_set_rate is propagated to parent - -Example: - clock { - compatible =3D "ti,fixed-factor-clock"; - clocks =3D <&parentclk>; - #clock-cells =3D <0>; - ti,clock-div =3D <2>; - ti,clock-mult =3D <1>; - }; - - dpll_usb_clkdcoldo_ck: dpll_usb_clkdcoldo_ck { - #clock-cells =3D <0>; - compatible =3D "ti,fixed-factor-clock"; - clocks =3D <&dpll_usb_ck>; - ti,clock-div =3D <1>; - ti,autoidle-shift =3D <8>; - reg =3D <0x01b4>; - ti,clock-mult =3D <1>; - ti,invert-autoidle-bit; - }; diff --git a/Documentation/devicetree/bindings/clock/ti/ti,fixed-factor-clo= ck.yaml b/Documentation/devicetree/bindings/clock/ti/ti,fixed-factor-clock.= yaml new file mode 100644 index 000000000000..f597aedbad05 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti/ti,fixed-factor-clock.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/ti/ti,fixed-factor-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI fixed factor rate clock sources + +maintainers: + - Tero Kristo + - Sukrut Bellary + +description: | + This consists of a divider and a multiplier used to generate + a fixed rate clock. This also uses the autoidle support from + TI autoidle clock. + +allOf: + - $ref: /schemas/clock/ti/ti,autoidle.yaml# + +properties: + compatible: + const: ti,fixed-factor-clock + + "#clock-cells": + const: 0 + + reg: + maxItems: 1 + + ti,clock-div: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Fixed divider + + ti,clock-mult: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Fixed multiplier + + clocks: + description: + Link to phandle of parent clock. + + clock-output-names: + description: + From common clock binding + + ti,set-rate-parent: + description: + Propagate to parent clock + type: boolean + +required: + - compatible + - clocks + - "#clock-cells" + - ti,clock-mult + - ti,clock-div + +unevaluatedProperties: false + +examples: + - | + bus{ + #address-cells =3D <1>; + #size-cells =3D <0>; + + clock@1b4 { + compatible =3D "ti,fixed-factor-clock"; + reg =3D <0x1b4>; + clocks =3D <&dpll_usb_ck>; + #clock-cells =3D <0>; + ti,clock-mult =3D <1>; + ti,clock-div =3D <1>; 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[76.88.115.8]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-739da0e3184sm2195304b3a.160.2025.04.03.18.45.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 18:45:21 -0700 (PDT) From: Sukrut Bellary To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Sukrut Bellary , Tero Kristo , Kevin Hilman , Andreas Kemnade , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] dt-bindings: clock: ti: add ti,autoidle.yaml reference Date: Thu, 3 Apr 2025 18:45:00 -0700 Message-Id: <20250404014500.2789830-5-sbellary@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250404014500.2789830-1-sbellary@baylibre.com> References: <20250404014500.2789830-1-sbellary@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" ti,divider-clock uses properties from ti,autoidle. As we are converting autoidle binding to ti,autoidle.yaml, fix the reference here. Add dual license. Signed-off-by: Sukrut Bellary --- .../bindings/clock/ti/ti,divider-clock.yaml | 24 ++++--------------- 1 file changed, 5 insertions(+), 19 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/ti/ti,divider-clock.ya= ml b/Documentation/devicetree/bindings/clock/ti/ti,divider-clock.yaml index 3fbe236eb565..aba879ae302d 100644 --- a/Documentation/devicetree/bindings/clock/ti/ti,divider-clock.yaml +++ b/Documentation/devicetree/bindings/clock/ti/ti,divider-clock.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0-only +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/ti/ti,divider-clock.yaml# @@ -55,9 +55,10 @@ description: | is missing it is the same as supplying a zero shift. =20 This binding can also optionally provide support to the hardware autoidle - feature, see [1]. + feature. =20 - [1] Documentation/devicetree/bindings/clock/ti/autoidle.txt +allOf: + - $ref: /schemas/clock/ti/ti,autoidle.yaml# =20 properties: compatible: @@ -97,7 +98,6 @@ properties: minimum: 1 default: 1 =20 - ti,max-div: $ref: /schemas/types.yaml#/definitions/uint32 description: @@ -116,20 +116,6 @@ properties: valid divisor programming must be a power of two, only valid if ti,dividers is not defined. =20 - ti,autoidle-shift: - $ref: /schemas/types.yaml#/definitions/uint32 - description: - bit shift of the autoidle enable bit for the clock, - see [1]. - maximum: 31 - default: 0 - - ti,invert-autoidle-bit: - type: boolean - description: - autoidle is enabled by setting the bit to 0, - see [1] - ti,set-rate-parent: type: boolean description: @@ -156,7 +142,7 @@ required: - clocks - reg =20 -additionalProperties: false +unevaluatedProperties: false =20 examples: - | --=20 2.34.1