From nobody Sun Feb 8 12:52:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CB3E82528F1; Thu, 3 Apr 2025 17:28:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743701288; cv=none; b=ehbuaalLQthU4DsJ8s0ugsOTlkzH27AqcmK2J+gPdR5iKYLYwK8udX/ZcPI0KrqwnHcokGGy3c1+sgg7HWVhfgjNHEY2T3tO8xo9aPUde+zI7w8uFqkJ/x2syTDhgXpJRZS+ddimAa4Ea5S6Dnxe27Gm06saiFP95VlwSps5DA8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743701288; c=relaxed/simple; bh=lNQx4uYcGmJ50NZBj4OglO2v21BDs6/BFWbFA4TSbVA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=O4Mp43CXn9gZLvz9U7FRlKwRJIBRiT0eum4c2JkxoBoJFz06mNjdzMV97qeuDtrQbn20PO+GvaEstvK8telGrTh6VBcl/Vn4xHy7kx5RM1av7tpMipyusUHpFFccRyPqJu5vH2LHBpu0VqY2y7R0gjAutDRSX/pTx/gL+WvEUp4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9B9FB15A1; Thu, 3 Apr 2025 10:28:08 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 258CC3F63F; Thu, 3 Apr 2025 10:28:03 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, broonie@kernel.org, anshuman.khandual@arm.com, joey.gouly@arm.com, yury.khrustalev@arm.com, maz@kernel.org, oliver.upton@linux.dev, frederic@kernel.org, shameerali.kolothum.thodi@huawei.com, james.morse@arm.com, mark.rutland@arm.com, huangxiaojia2@huawei.com, akpm@linux-foundation.org, surenb@google.com, robin.murphy@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, nd@arm.com, Yeoreum Yun Subject: [PATCH v2 1/3] arm64: add FEAT_MTE_TAGGED_FAR feature Date: Thu, 3 Apr 2025 18:27:56 +0100 Message-Id: <20250403172758.67106-2-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250403172758.67106-1-yeoreum.yun@arm.com> References: <20250403172758.67106-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add FEAT_MTE_TAGGED_FAR cpucap which makes FAR_ELx report all non-address bits on a synchronous MTE tag check fault since Armv8.9 Signed-off-by: Yeoreum Yun Acked-by: Yury Khrustalev --- Documentation/arch/arm64/elf_hwcaps.rst | 3 +++ Documentation/arch/arm64/tagged-pointers.rst | 11 ++++++----- arch/arm64/include/asm/hwcap.h | 1 + arch/arm64/include/uapi/asm/hwcap.h | 1 + arch/arm64/kernel/cpufeature.c | 9 +++++++++ arch/arm64/kernel/cpuinfo.c | 1 + arch/arm64/tools/cpucaps | 1 + 7 files changed, 22 insertions(+), 5 deletions(-) diff --git a/Documentation/arch/arm64/elf_hwcaps.rst b/Documentation/arch/a= rm64/elf_hwcaps.rst index 69d7afe56853..358f5af035ff 100644 --- a/Documentation/arch/arm64/elf_hwcaps.rst +++ b/Documentation/arch/arm64/elf_hwcaps.rst @@ -435,6 +435,9 @@ HWCAP2_SME_SF8DP4 HWCAP2_POE Functionality implied by ID_AA64MMFR3_EL1.S1POE =3D=3D 0b0001. =20 +HWCAP3_MTE_FAR + Functionality implied by ID_AA64PFR2_EL1.MTEFAR =3D=3D 0b0001. + 4. Unused AT_HWCAP bits ----------------------- =20 diff --git a/Documentation/arch/arm64/tagged-pointers.rst b/Documentation/a= rch/arm64/tagged-pointers.rst index 81b6c2a770dd..73c59a9c7a63 100644 --- a/Documentation/arch/arm64/tagged-pointers.rst +++ b/Documentation/arch/arm64/tagged-pointers.rst @@ -60,11 +60,12 @@ that signal handlers in applications making use of tags= cannot rely on the tag information for user virtual addresses being maintained in these fields unless the flag was set. =20 -Due to architecture limitations, bits 63:60 of the fault address -are not preserved in response to synchronous tag check faults -(SEGV_MTESERR) even if SA_EXPOSE_TAGBITS was set. Applications should -treat the values of these bits as undefined in order to accommodate -future architecture revisions which may preserve the bits. +If FEAT_MTE_TAGGED_FAR (Armv8.9) is supported, bits 63:60 of the fault add= ress +are preserved in response to synchronous tag check faults (SEGV_MTESERR) +otherwise not preserved even if SA_EXPOSE_TAGBITS was set. +Applications should interpret the values of these bits based on +the support for the 'mte_far' hwcap. If the support is not present, +the values of these bits should be considered as undefined otherwise valid. =20 For signals raised in response to watchpoint debug exceptions, the tag information will be preserved regardless of the SA_EXPOSE_TAGBITS diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h index 1c3f9617d54f..28dd1ac29ecc 100644 --- a/arch/arm64/include/asm/hwcap.h +++ b/arch/arm64/include/asm/hwcap.h @@ -176,6 +176,7 @@ #define KERNEL_HWCAP_POE __khwcap2_feature(POE) =20 #define __khwcap3_feature(x) (const_ilog2(HWCAP3_ ## x) + 128) +#define KERNEL_HWCAP_MTE_FAR __khwcap3_feature(MTE_FAR) =20 /* * This yields a mask that user programs can use to figure out what diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/= asm/hwcap.h index 705a7afa8e58..7d22527a7975 100644 --- a/arch/arm64/include/uapi/asm/hwcap.h +++ b/arch/arm64/include/uapi/asm/hwcap.h @@ -143,5 +143,6 @@ /* * HWCAP3 flags - for AT_HWCAP3 */ +#define HWCAP3_MTE_FAR (1UL << 0) =20 #endif /* _UAPI__ASM_HWCAP_H */ diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 9c4d6d552b25..183b4b7e3074 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -312,6 +312,7 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = =3D { =20 static const struct arm64_ftr_bits ftr_id_aa64pfr2[] =3D { ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR2_EL1_F= PMR_SHIFT, 4, 0), + ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR2_EL= 1_MTEFAR_SHIFT, 4, ID_AA64PFR2_EL1_MTEFAR_NI), ARM64_FTR_END, }; =20 @@ -2861,6 +2862,13 @@ static const struct arm64_cpu_capabilities arm64_fea= tures[] =3D { .matches =3D has_cpuid_feature, ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, MTE, MTE3) }, + { + .desc =3D "FAR on MTE Tag Check Fault", + .capability =3D ARM64_MTE_FAR, + .type =3D ARM64_CPUCAP_SYSTEM_FEATURE, + .matches =3D has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, MTEFAR, IMP) + }, #endif /* CONFIG_ARM64_MTE */ { .desc =3D "RCpc load-acquire (LDAPR)", @@ -3191,6 +3199,7 @@ static const struct arm64_cpu_capabilities arm64_elf_= hwcaps[] =3D { #ifdef CONFIG_ARM64_MTE HWCAP_CAP(ID_AA64PFR1_EL1, MTE, MTE2, CAP_HWCAP, KERNEL_HWCAP_MTE), HWCAP_CAP(ID_AA64PFR1_EL1, MTE, MTE3, CAP_HWCAP, KERNEL_HWCAP_MTE3), + HWCAP_CAP(ID_AA64PFR2_EL1, MTEFAR, IMP, CAP_HWCAP, KERNEL_HWCAP_MTE_FAR), #endif /* CONFIG_ARM64_MTE */ HWCAP_CAP(ID_AA64MMFR0_EL1, ECV, IMP, CAP_HWCAP, KERNEL_HWCAP_ECV), HWCAP_CAP(ID_AA64MMFR1_EL1, AFP, IMP, CAP_HWCAP, KERNEL_HWCAP_AFP), diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index 285d7d538342..e2b13454e38a 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -160,6 +160,7 @@ static const char *const hwcap_str[] =3D { [KERNEL_HWCAP_SME_SFEXPA] =3D "smesfexpa", [KERNEL_HWCAP_SME_STMOP] =3D "smestmop", [KERNEL_HWCAP_SME_SMOP4] =3D "smesmop4", + [KERNEL_HWCAP_MTE_FAR] =3D "mte_far", }; =20 #ifdef CONFIG_COMPAT diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index 772c1b008e43..ef62ea04ba37 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -67,6 +67,7 @@ MPAM MPAM_HCR MTE MTE_ASYMM +MTE_FAR SME SME_FA64 SME2 --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sun Feb 8 12:52:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 94AA1252904; Thu, 3 Apr 2025 17:28:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743701291; cv=none; b=YggzuDb4Ypt/1mZlfXjMRmCXDOAH5esk9+8lTb8vtrXmQHU1BsYzRN4/N8OlgCbzBZo+dt0by1w4Hd59lRhd36AKrnOe+HllbMFzoH0tpDmWWwx7jw6VAIqzqZBxLufu3VakzCnpwJmXQqOMRTrzpoEvyx+NR2Jt2Xz8gNF29F8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743701291; c=relaxed/simple; bh=jIPIh1lHsQOSYgLXZXX44bKUpbbsQ11pt9hXUjNS918=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=nMBKFJRp5cAp0yCHvSbnX/rcTmZqwEYPwvG23HP2ROOm5Kbl+DoIwdKNp71jHvKcZJdNqrBHXRg70uHpfI2Wvehfc++qsLT1bfvhXcglM6hCUPU0dAxqAGtb6Q2lVNzbGZoi+xaqN9b5Coo6+V2A1ZQcM/qXhUlRkk7MM87OSec= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BDB5C1C01; Thu, 3 Apr 2025 10:28:11 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 510793F63F; Thu, 3 Apr 2025 10:28:06 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, broonie@kernel.org, anshuman.khandual@arm.com, joey.gouly@arm.com, yury.khrustalev@arm.com, maz@kernel.org, oliver.upton@linux.dev, frederic@kernel.org, shameerali.kolothum.thodi@huawei.com, james.morse@arm.com, mark.rutland@arm.com, huangxiaojia2@huawei.com, akpm@linux-foundation.org, surenb@google.com, robin.murphy@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, nd@arm.com, Yeoreum Yun Subject: [PATCH v2 2/3] arm64/mm/fault: use original FAR_EL1 value when ARM64_MTE_FAR is supported Date: Thu, 3 Apr 2025 18:27:57 +0100 Message-Id: <20250403172758.67106-3-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250403172758.67106-1-yeoreum.yun@arm.com> References: <20250403172758.67106-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use the original FAR_EL1 value when an MTE tag check fault occurs, if ARM64_MTE_FAR is supported. This allows reports to include not only the logical tag (memory tag) but also the address tag information. Applications that require this information should install a signal handler = with the SA_EXPOSE_TAGBITS flag. While this introduces a minor ABI change, most applications do not set this flag and therefore will not be affected. Signed-off-by: Yeoreum Yun --- arch/arm64/mm/fault.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c index ec0a337891dd..f21d972f99b1 100644 --- a/arch/arm64/mm/fault.c +++ b/arch/arm64/mm/fault.c @@ -837,9 +837,12 @@ static int do_tag_check_fault(unsigned long far, unsig= ned long esr, /* * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN * for tag check faults. Set them to corresponding bits in the untagged - * address. + * address if ARM64_MTE_FAR isn't supported. + * Otherwise, bits 63:60 of FAR_EL1 are KNOWN. */ - far =3D (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK); + if (!cpus_have_cap(ARM64_MTE_FAR)) + far =3D (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK); + do_bad_area(far, esr, regs); return 0; } --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sun Feb 8 12:52:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DEE46253325; Thu, 3 Apr 2025 17:28:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743701294; cv=none; b=R12VA9vMxbd/lzit3wJaaiUWtBY3VOuLly8FSD1e74WUtCleLF90I4MuyTrM4mu+J5gP+7KJk2dQMQWfvtwPvSBzpN4IF6fV0+Nglvcyctk2oJwiEboOy8uM4bn6trJmSBC7Qi+1AZhQKyxgoWwdhaZTdEeVop7/P8h15gqNumA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743701294; c=relaxed/simple; bh=hN+y3QBy+q08YTbzo2h8nnqf74NveFeQ628u2dLSsWo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=pGo2eQaFwQpCv0rfjLLsuPl8udmarllMuDndPSBuOQnC3rwBQHhle/ZB7992cCrHEdUPBRFk9oIwUME/IgDtIvqQVOEJln2CcVjlo3wtJslA5FPhaWqI7CFpIGxo8BjzjEXLOnlRNjRQYmCELL10cS9p0x4kciqxRVV29PCrEfw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 143C8106F; Thu, 3 Apr 2025 10:28:15 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7C9CB3F63F; Thu, 3 Apr 2025 10:28:09 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, broonie@kernel.org, anshuman.khandual@arm.com, joey.gouly@arm.com, yury.khrustalev@arm.com, maz@kernel.org, oliver.upton@linux.dev, frederic@kernel.org, shameerali.kolothum.thodi@huawei.com, james.morse@arm.com, mark.rutland@arm.com, huangxiaojia2@huawei.com, akpm@linux-foundation.org, surenb@google.com, robin.murphy@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, nd@arm.com, Yeoreum Yun Subject: [PATCH v2 3/3] tools/kselftest: add MTE_FAR hwcap test Date: Thu, 3 Apr 2025 18:27:58 +0100 Message-Id: <20250403172758.67106-4-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250403172758.67106-1-yeoreum.yun@arm.com> References: <20250403172758.67106-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" add MTE_FAR hwcap test on kselftest. Signed-off-by: Yeoreum Yun Reviewed-by: Mark Brown --- tools/testing/selftests/arm64/abi/hwcap.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/self= tests/arm64/abi/hwcap.c index 35f521e5f41c..a539eeb0bfc0 100644 --- a/tools/testing/selftests/arm64/abi/hwcap.c +++ b/tools/testing/selftests/arm64/abi/hwcap.c @@ -1098,6 +1098,12 @@ static const struct hwcap_data { .sigill_fn =3D hbc_sigill, .sigill_reliable =3D true, }, + { + .name =3D "MTE_FAR", + .at_hwcap =3D AT_HWCAP3, + .hwcap_bit =3D HWCAP3_MTE_FAR, + .cpuinfo =3D "mte_far", + }, }; =20 typedef void (*sighandler_fn)(int, siginfo_t *, void *); --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}