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[31.30.173.141]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec366a699sm15541695e9.38.2025.04.03.04.32.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 04:32:11 -0700 (PDT) From: =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= <rkrcmar@ventanamicro.com> To: kvm-riscv@lists.infradead.org Cc: kvm@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@atishpatra.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Alexandre Ghiti <alex@ghiti.fr>, Andrew Jones <ajones@ventanamicro.com>, Mayuresh Chitale <mchitale@ventanamicro.com> Subject: [PATCH 1/5] KVM: RISC-V: refactor vector state reset Date: Thu, 3 Apr 2025 13:25:20 +0200 Message-ID: <20250403112522.1566629-4-rkrcmar@ventanamicro.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250403112522.1566629-3-rkrcmar@ventanamicro.com> References: <20250403112522.1566629-3-rkrcmar@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Do not depend on the reset structures. vector.datap is a kernel memory pointer that needs to be preserved as it is not a part of the guest vector data. Signed-off-by: Radim Kr=C4=8Dm=C3=A1=C5=99 <rkrcmar@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> --- arch/riscv/include/asm/kvm_vcpu_vector.h | 6 ++---- arch/riscv/kvm/vcpu.c | 5 ++++- arch/riscv/kvm/vcpu_vector.c | 13 +++++++------ 3 files changed, 13 insertions(+), 11 deletions(-) diff --git a/arch/riscv/include/asm/kvm_vcpu_vector.h b/arch/riscv/include/= asm/kvm_vcpu_vector.h index 27f5bccdd8b0..57a798a4cb0d 100644 --- a/arch/riscv/include/asm/kvm_vcpu_vector.h +++ b/arch/riscv/include/asm/kvm_vcpu_vector.h @@ -33,8 +33,7 @@ void kvm_riscv_vcpu_guest_vector_restore(struct kvm_cpu_c= ontext *cntx, unsigned long *isa); void kvm_riscv_vcpu_host_vector_save(struct kvm_cpu_context *cntx); void kvm_riscv_vcpu_host_vector_restore(struct kvm_cpu_context *cntx); -int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcpu, - struct kvm_cpu_context *cntx); +int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcpu); void kvm_riscv_vcpu_free_vector_context(struct kvm_vcpu *vcpu); #else =20 @@ -62,8 +61,7 @@ static inline void kvm_riscv_vcpu_host_vector_restore(str= uct kvm_cpu_context *cn { } =20 -static inline int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcp= u, - struct kvm_cpu_context *cntx) +static inline int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcp= u) { return 0; } diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c index 60d684c76c58..2fb75288ecfe 100644 --- a/arch/riscv/kvm/vcpu.c +++ b/arch/riscv/kvm/vcpu.c @@ -57,6 +57,7 @@ static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu) struct kvm_vcpu_csr *reset_csr =3D &vcpu->arch.guest_reset_csr; struct kvm_cpu_context *cntx =3D &vcpu->arch.guest_context; struct kvm_cpu_context *reset_cntx =3D &vcpu->arch.guest_reset_context; + void *vector_datap =3D cntx->vector.datap; bool loaded; =20 /** @@ -79,6 +80,8 @@ static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu) =20 kvm_riscv_vcpu_fp_reset(vcpu); =20 + /* Restore datap as it's not a part of the guest context. */ + cntx->vector.datap =3D vector_datap; kvm_riscv_vcpu_vector_reset(vcpu); =20 kvm_riscv_vcpu_timer_reset(vcpu); @@ -143,7 +146,7 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu) cntx->hstatus |=3D HSTATUS_SPV; spin_unlock(&vcpu->arch.reset_cntx_lock); =20 - if (kvm_riscv_vcpu_alloc_vector_context(vcpu, cntx)) + if (kvm_riscv_vcpu_alloc_vector_context(vcpu)) return -ENOMEM; =20 /* By default, make CY, TM, and IR counters accessible in VU mode */ diff --git a/arch/riscv/kvm/vcpu_vector.c b/arch/riscv/kvm/vcpu_vector.c index d92d1348045c..a5f88cb717f3 100644 --- a/arch/riscv/kvm/vcpu_vector.c +++ b/arch/riscv/kvm/vcpu_vector.c @@ -22,6 +22,9 @@ void kvm_riscv_vcpu_vector_reset(struct kvm_vcpu *vcpu) struct kvm_cpu_context *cntx =3D &vcpu->arch.guest_context; =20 cntx->sstatus &=3D ~SR_VS; + + cntx->vector.vlenb =3D riscv_v_vsize / 32; + if (riscv_isa_extension_available(isa, v)) { cntx->sstatus |=3D SR_VS_INITIAL; WARN_ON(!cntx->vector.datap); @@ -70,13 +73,11 @@ void kvm_riscv_vcpu_host_vector_restore(struct kvm_cpu_= context *cntx) __kvm_riscv_vector_restore(cntx); } =20 -int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcpu, - struct kvm_cpu_context *cntx) +int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcpu) { - cntx->vector.datap =3D kmalloc(riscv_v_vsize, GFP_KERNEL); - if (!cntx->vector.datap) + vcpu->arch.guest_context.vector.datap =3D kzalloc(riscv_v_vsize, GFP_KERN= EL); + if (!vcpu->arch.guest_context.vector.datap) return -ENOMEM; - cntx->vector.vlenb =3D riscv_v_vsize / 32; =20 vcpu->arch.host_context.vector.datap =3D kzalloc(riscv_v_vsize, GFP_KERNE= L); if (!vcpu->arch.host_context.vector.datap) @@ -87,7 +88,7 @@ int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *= vcpu, =20 void kvm_riscv_vcpu_free_vector_context(struct kvm_vcpu *vcpu) { - kfree(vcpu->arch.guest_reset_context.vector.datap); + kfree(vcpu->arch.guest_context.vector.datap); kfree(vcpu->arch.host_context.vector.datap); } #endif --=20 2.48.1