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From: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>
To: Alexandre Belloni <alexandre.belloni@bootlin.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
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Cc: linux-rtc@vger.kernel.org,
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NXP S32 Linux <s32@nxp.com>,
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Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>,
Bogdan-Gabriel Roman <bogdan-gabriel.roman@nxp.com>,
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
Subject: [PATCH v9 1/4] dt-bindings: rtc: add schema for NXP S32G2/S32G3 SoCs
Date: Thu, 3 Apr 2025 13:33:43 +0300
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From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
RTC tracks clock time during system suspend and it is used as a wakeup
source on S32G2/S32G3 architecture.
RTC from S32G2/S32G3 is not battery-powered and it is not kept alive
during system reset.
Co-developed-by: Bogdan-Gabriel Roman <bogdan-gabriel.roman@nxp.com>
Signed-off-by: Bogdan-Gabriel Roman <bogdan-gabriel.roman@nxp.com>
Co-developed-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
---
.../devicetree/bindings/rtc/nxp,s32g-rtc.yaml | 72 +++++++++++++++++++
1 file changed, 72 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rtc/nxp,s32g-rtc.yaml
diff --git a/Documentation/devicetree/bindings/rtc/nxp,s32g-rtc.yaml b/Docu=
mentation/devicetree/bindings/rtc/nxp,s32g-rtc.yaml
new file mode 100644
index 000000000000..40fd2fa298fe
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/nxp,s32g-rtc.yaml
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rtc/nxp,s32g-rtc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP S32G2/S32G3 Real Time Clock (RTC)
+
+maintainers:
+ - Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
+ - Ciprian Marian Costea <ciprianmarian.costea@nxp.com>
+
+description:
+ RTC hardware module present on S32G2/S32G3 SoCs is used as a wakeup sour=
ce.
+ It is not kept alive during system reset and it is not battery-powered.
+
+allOf:
+ - $ref: rtc.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - nxp,s32g2-rtc
+ - items:
+ - const: nxp,s32g3-rtc
+ - const: nxp,s32g2-rtc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: ipg clock drives the access to the RTC iomapped regis=
ters
+ - description: Clock source for the RTC module. Can be selected betw=
een
+ 4 different clock sources using an integrated hardware mux.
+ On S32G2/S32G3 SoCs, 'source0' is the SIRC clock (~32KHz) and it=
is
+ available during standby and runtime. 'source1' is reserved and =
cannot
+ be used. 'source2' is the FIRC clock and it is only available du=
ring
+ runtime providing a better resolution (~48MHz). 'source3' is an =
external
+ RTC clock source which can be additionally added in hardware.
+
+ clock-names:
+ items:
+ - const: ipg
+ - enum: [ source0, source1, source2, source3 ]
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ rtc@40060000 {
+ compatible =3D "nxp,s32g3-rtc",
+ "nxp,s32g2-rtc";
+ reg =3D <0x40060000 0x1000>;
+ interrupts =3D <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&clks 54>, <&clks 55>;
+ clock-names =3D "ipg", "source0";
+ };
--=20
2.45.2