From nobody Tue May 13 20:21:00 2025 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7082324CEE3 for <linux-kernel@vger.kernel.org>; Thu, 3 Apr 2025 09:19:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743671991; cv=none; b=s4UKHYO83RRhh/4JrQqUYYNkXk5ePysC56dV0ICD3YhZiUdmRqZ2PR+QBAn/vxneygzm+20RWgn7hzO4z9aPLRVlXqegOF1eaCAOHwho7HwZFiVhdyXsQZZ6XF53Gx/6JrFYnm8lYFD6fExSubgDkHPKz0PP1l6AmkOaYKFEhWQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743671991; c=relaxed/simple; bh=GCC5lN6xPnMJyoREjQ/p0M9qdqhfCbqUf3UM3MWI+n4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WttjVYGlx/U/6C6nuwjunLQzHt34IsctaSGTwITThtLmSYClTH9/2V+5PqOLqkPqb92w+SG/wAF7D+qew18BwuIy4NCdILMiyiqOGfNocORVolvGnsdPzKakSU3dtL/XM+t9zr85g/SHMri5WoZGhWHC9GLsIAasfoQomqO5Ew0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Qs7ZMHSf; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Qs7ZMHSf" Received: by mail.gandi.net (Postfix) with ESMTPSA id E186043226; Thu, 3 Apr 2025 09:19:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1743671988; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JRvX3Vs7D+eXAuoSQ2XAv/OCH44SN3rQC84wbbF/K6E=; b=Qs7ZMHSfHvTdOdqFRHLx49lkX+gl8VUkchXOe4wlxVbr0ldsqpcTISUnmMyymP9kDDCw2i k8fvMSpSGT5cRw2BfNtckkyomv9xkgJFLHsDbzEGFMWaaUaz29okwNxV2HES3cTY5KMd3V jYNvU8Z2PifyxskYM1pYh3nGcuKzndqeAnxrbPdybTVtmGvgvUh4OJWbV74VxOTNjebBw2 nc05pNvEP1FRPpSFCV+UU/cZO3IYw+GExgllAvlTlCkZi1Admypscrx3OVMd8ThUSuSg5D liXqkjk97sl6ITpy5xlrhux8V+/835wzcfRrfPH/2Y38I1u/g8FtLS12BZxNpw== From: Miquel Raynal <miquel.raynal@bootlin.com> Date: Thu, 03 Apr 2025 11:19:29 +0200 Subject: [PATCH v2 19/19] mtd: spinand: winbond: Add support for W35N02JW and W35N04JW chips Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250403-winbond-6-14-rc1-octal-v2-19-7846bd88fe83@bootlin.com> References: <20250403-winbond-6-14-rc1-octal-v2-0-7846bd88fe83@bootlin.com> In-Reply-To: <20250403-winbond-6-14-rc1-octal-v2-0-7846bd88fe83@bootlin.com> To: Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Santhosh Kumar K <s-k6@ti.com> Cc: Tudor Ambarus <tudor.ambarus@linaro.org>, Pratyush Yadav <pratyush@kernel.org>, Michael Walle <michael@walle.cc>, Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Steam Lin <stlin2@winbond.com>, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Miquel Raynal <miquel.raynal@bootlin.com> X-Mailer: b4 0.15-dev X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgddukeekudelucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuifetpfffkfdpucggtfgfnhhsuhgsshgtrhhisggvnecuuegrihhlohhuthemuceftddunecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjughrpefhfffugggtgffkfhgjvfevofesthejredtredtjeenucfhrhhomhepofhiqhhuvghlucftrgihnhgrlhcuoehmihhquhgvlhdrrhgrhihnrghlsegsohhothhlihhnrdgtohhmqeenucggtffrrghtthgvrhhnpeelgfehvdduieefieeikeffgffggfdttdeugeffieetheeuleelfeehffdtffetveenucfkphepledvrddukeegrdduuddtrdduleelnecuvehluhhsthgvrhfuihiivgepudeknecurfgrrhgrmhepihhnvghtpeelvddrudekgedruddutddrudelledphhgvlhhopegludelvddrudeikedruddruddtiegnpdhmrghilhhfrhhomhepmhhiqhhuvghlrdhrrgihnhgrlhessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepuddupdhrtghpthhtohepshhtlhhinhdvseifihhnsghonhgurdgtohhmpdhrtghpthhtohepphhrrghthihushhhsehkvghrnhgvlhdrohhrghdprhgtphhtthhopehlihhnuhigqdhmthgusehlihhsthhsrdhinhhfrhgruggvrggurdhorhhgpdhrtghpthhtoheplhhinhhugidqkhgvrhhnvghlsehvghgvrhdrkhgvrhhnvghlrdhorhhgpdhrtghpthhtoheprhhitghhrghru gesnhhougdrrghtpdhrtghpthhtohepmhhiqhhuvghlrdhrrgihnhgrlhessghoohhtlhhinhdrtghomhdprhgtphhtthhopehtuhguohhrrdgrmhgsrghruhhssehlihhnrghrohdrohhrghdprhgtphhtthhopehsqdhkieesthhirdgtohhm X-GND-Sasl: miquel.raynal@bootlin.com These chips support single SPI, octal SPI and octal DDR SPI. For now, only the SDR protocols are supported. Tested with the W35N02JW variant, but the 04 one just has twice more dies and is described in the same datasheet, so we can reasonably expect that it will behave identically. Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/mtd/nand/spi/winbond.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c index c263c9b5affe79a14466bc0e2ef2da53ecfd48cf..19f8dd4a63707e6599068a43fd8= 0dabcd9dd3a57 100644 --- a/drivers/mtd/nand/spi/winbond.c +++ b/drivers/mtd/nand/spi/winbond.c @@ -287,6 +287,24 @@ static const struct spinand_info winbond_spinand_table= [] =3D { &update_cache_octal_variants), 0, SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL)), + SPINAND_INFO("W35N02JW", /* 1.8V */ + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22), + NAND_MEMORG(1, 4096, 128, 64, 512, 10, 2, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants, + &write_cache_octal_variants, + &update_cache_octal_variants), + 0, + SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL)), + SPINAND_INFO("W35N04JW", /* 1.8V */ + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23), + NAND_MEMORG(1, 4096, 128, 64, 512, 10, 4, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants, + &write_cache_octal_variants, + &update_cache_octal_variants), + 0, + SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL)), /* 2G-bit densities */ SPINAND_INFO("W25M02GV", /* 2x1G-bit 3.3V */ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xab, 0x21), --=20 2.48.1