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From: David Woodhouse <dwmw2@infradead.org>
To: virtio-comment@lists.linux.dev
Cc: mst@redhat.com,
hch@infradead.org,
Claire Chang <tientzu@chromium.org>,
linux-devicetree <devicetree@vger.kernel.org>,
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Subject: [RFC PATCH 1/3] content: Add VIRTIO_F_SWIOTLB to negotiate use of
SWIOTLB bounce buffers
Date: Wed, 2 Apr 2025 12:04:45 +0100
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From: David Woodhouse <dwmw@amazon.co.uk>
Device-tree bindings for `restricted-dma-pool` were defined in 2021, which
allow devices to be restricted to a given SWIOTLB pool instead of allowing
DMA to arbitrary system memory:
https://lore.kernel.org/all/20210624155526.2775863-1-tientzu@chromium.org/
This facility was not specific to virtio-mmio, but does apply to it. No
attempt was made to ensure backward-compatibility for virtio-mmio devices.
Define a VIRTIO_F_SWIOTLB feature which allows the device and driver to
agree on the use of the SWIOTLB, if present. This enables the device to
refuse to operate further if the driver does not support the SWIOTLB
requirement expressed in the device-tree.
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
---
content.tex | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/content.tex b/content.tex
index c17ffa6..63d075f 100644
--- a/content.tex
+++ b/content.tex
@@ -773,6 +773,9 @@ \chapter{Reserved Feature Bits}\label{sec:Reserved Feat=
ure Bits}
Currently these device-independent feature bits are defined:
=20
\begin{description}
+ \item[VIRTIO_F_SWIOTLB (27)] This feature indicates that the device
+ transport provides a memory region which is to be used for bounce
+ buffering, rather than permitting direct memory access to system memory.
\item[VIRTIO_F_INDIRECT_DESC (28)] Negotiating this feature indicates
that the driver can use descriptors with the VIRTQ_DESC_F_INDIRECT
flag set, as described in \ref{sec:Basic Facilities of a Virtio
@@ -807,6 +810,9 @@ \chapter{Reserved Feature Bits}\label{sec:Reserved Feat=
ure Bits}
the driver. When clear, this overrides any platform-specific description=
of
whether device access is limited or translated in any way, e.g.
whether an IOMMU may be present.
+ If a the device transport provides a software IOTLB bounce buffer,
+ addresses within its range are not subject to the requirements of
+ VIRTIO_F_ACCESS_PLATFORM as they are considered to be ``on-device''.
\item[VIRTIO_F_RING_PACKED(34)] This feature indicates
support for the packed virtqueue layout as described in
\ref{sec:Basic Facilities of a Virtio Device / Packed Virtqueues}~\namer=
ef{sec:Basic Facilities of a Virtio Device / Packed Virtqueues}.
@@ -885,6 +891,10 @@ \chapter{Reserved Feature Bits}\label{sec:Reserved Fea=
ture Bits}
VIRTIO_F_ACCESS_PLATFORM is not offered, then a driver MUST pass only phys=
ical
addresses to the device.
=20
+A driver SHOULD accept VIRTIO_F_SWIOTLB if it is offered, and it MUST
+then pass only addresses within the Software IOTLB bounce buffer to the
+device.
+
A driver SHOULD accept VIRTIO_F_RING_PACKED if it is offered.
=20
A driver SHOULD accept VIRTIO_F_ORDER_PLATFORM if it is offered.
@@ -921,6 +931,8 @@ \chapter{Reserved Feature Bits}\label{sec:Reserved Feat=
ure Bits}
A device MAY fail to operate further if VIRTIO_F_ACCESS_PLATFORM is not
accepted.
=20
+A device MAY fail to operate further if VIRTIO_F_SWIOTLB is not accepted.
+
If VIRTIO_F_IN_ORDER has been negotiated, a device MUST use
buffers in the same order in which they have been available.
=20
--=20
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From: David Woodhouse <dwmw2@infradead.org>
To: virtio-comment@lists.linux.dev
Cc: mst@redhat.com,
hch@infradead.org,
Claire Chang <tientzu@chromium.org>,
linux-devicetree <devicetree@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
=?UTF-8?q?J=C3=B6rg=20Roedel?= <joro@8bytes.org>,
iommu@lists.linux-foundation.org,
linux-kernel@vger.kernel.org,
graf@amazon.de
Subject: [RFC PATCH 2/3] transport-mmio: Document restricted-dma-pool SWIOTLB
bounce buffer
Date: Wed, 2 Apr 2025 12:04:46 +0100
Message-ID: <20250402112410.2086892-3-dwmw2@infradead.org>
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From: David Woodhouse <dwmw@amazon.co.uk>
Add explicit reference to the `restricted-dma-pool` DT schema in the
virtio-mmio transport options, and define its relationship to the
newly-added VIRTIO_F_SWIOTLB feature negotiation.
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
---
transport-mmio.tex | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/transport-mmio.tex b/transport-mmio.tex
index 94a93a1..300783c 100644
--- a/transport-mmio.tex
+++ b/transport-mmio.tex
@@ -26,6 +26,39 @@ \subsection{MMIO Device Discovery}\label{sec:Virtio Tran=
sport Options / Virtio O
}
\end{lstlisting}
=20
+\subsection{Software IOTLB Bounce Buffer}\label{sec:Virtio Transport Optio=
ns / Virtio Over MMIO / Software IOTLB Bounce Buffer}
+
+The device tree binding schema defines a ``restricted-dma-pool'' region
+which is intended to be used as a pool of restricted DMA buffers for
+specific devices. This allows devices to operate without DMA access to
+arbitrary system memory addresses.
+
+If a ``restricted-dma-pool'' is present, as in the example below, then
+bus addresses within the referenced range are not subject to the
+requirements of the VIRTIO_F_ORDER_PLATFORM capability, if negotiated.
+
+\begin{lstlisting}
+// EXAMPLE: virtio_block device with SWIOTLB bounce buffer at 0x50000000.
+restricted_dma_reserved: restricted-dma-pool@50000000 {
+ compatible =3D "restricted-dma-pool";
+ reg =3D <0x50000000 0x4000000>;
+};
+
+virtio_block@1e000 {
+ compatible =3D "virtio,mmio";
+ memory-region =3D <&restricted-dma-reserved>;
+ reg =3D <0x1e000 0x200>;
+ interrupts =3D <42>;
+};
+\end{lstlisting}
+
+\drivernormative{\subsubsection}{Software IOTLB Bounce Buffer}{Virtio Tran=
sport Options / Virtio Over MMIO / Software IOTLB Bounce Buffer}
+
+The driver SHOULD use the offered buffer in preference to passing system
+memory addresses to the device. If the driver accepts the VIRTIO_F_SWIOTLB
+feature, then the driver MUST use the offered buffer and never pass system
+memory addresses to the device.
+
\subsection{MMIO Device Register Layout}\label{sec:Virtio Transport Option=
s / Virtio Over MMIO / MMIO Device Register Layout}
=20
MMIO virtio devices provide a set of memory mapped control
--=20
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From: David Woodhouse <dwmw2@infradead.org>
To: virtio-comment@lists.linux.dev
Cc: mst@redhat.com,
hch@infradead.org,
Claire Chang <tientzu@chromium.org>,
linux-devicetree <devicetree@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
=?UTF-8?q?J=C3=B6rg=20Roedel?= <joro@8bytes.org>,
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linux-kernel@vger.kernel.org,
graf@amazon.de
Subject: [RFC PATCH 3/3] transport-pci: Add SWIOTLB bounce buffer capability
Date: Wed, 2 Apr 2025 12:04:47 +0100
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From: David Woodhouse <dwmw@amazon.co.uk>
Add a VIRTIO_PCI_CAP_SWIOTLB capability which advertises a SWIOTLB bounce
buffer similar to the existing `restricted-dma-pool` device-tree feature.
The difference is that this is per-device; each device needs to have its
own. Perhaps we should add a UUID to the capability, and have a way for
a device to not *provide* its own buffer, but just to reference the UUID
of a buffer elsewhere?
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
---
transport-pci.tex | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/transport-pci.tex b/transport-pci.tex
index a5c6719..23e0d57 100644
--- a/transport-pci.tex
+++ b/transport-pci.tex
@@ -129,6 +129,7 @@ \subsection{Virtio Structure PCI Capabilities}\label{se=
c:Virtio Transport Option
\item ISR Status
\item Device-specific configuration (optional)
\item PCI configuration access
+\item SWIOTLB bounce buffer
\end{itemize}
=20
Each structure can be mapped by a Base Address register (BAR) belonging to
@@ -188,6 +189,8 @@ \subsection{Virtio Structure PCI Capabilities}\label{se=
c:Virtio Transport Option
#define VIRTIO_PCI_CAP_SHARED_MEMORY_CFG 8
/* Vendor-specific data */
#define VIRTIO_PCI_CAP_VENDOR_CFG 9
+/* Software IOTLB bounce buffer */
+#define VIRTIO_PCI_CAP_SWIOTLB 10
\end{lstlisting}
=20
Any other value is reserved for future use.
@@ -744,6 +747,36 @@ \subsubsection{Vendor data capability}\label{sec:Virtio
The driver MUST qualify the \field{vendor_id} before
interpreting or writing into the Vendor data capability.
=20
+\subsubsection{Software IOTLB bounce buffer capability}\label{sec:Virtio
+Transport Options / Virtio Over PCI Bus / PCI Device Layout /
+Software IOTLB bounce buffer capability}
+
+The optional Software IOTLB bounce buffer capability allows the
+device to provide a memory region which can be used by the driver
+driver for bounce buffering. This allows a device on the PCI
+transport to operate without DMA access to system memory addresses.
+
+The Software IOTLB region is referenced by the
+VIRTIO_PCI_CAP_SWIOTLB capability. Bus addresses within the referenced
+range are not subject to the requirements of the VIRTIO_F_ORDER_PLATFORM
+capability, if negotiated.
+
+\devicenormative{\paragraph}{Software IOTLB bounce buffer capability}{Virt=
io
+Transport Options / Virtio Over PCI Bus / PCI Device Layout /
+Software IOTLB bounce buffer capability}
+
+Devices which present the Software IOTLB bounce buffer capability
+SHOULD also offer the VIRTIO_F_SWIOTLB feature.
+
+\drivernormative{\paragraph}{Software IOTLB bounce buffer capability}{Virt=
io
+Transport Options / Virtio Over PCI Bus / PCI Device Layout /
+Software IOTLB bounce buffer capability}
+
+The driver SHOULD use the offered buffer in preference to passing system
+memory addresses to the device. If the driver accepts the VIRTIO_F_SWIOTLB
+feature, then the driver MUST use the offered buffer and never pass system
+memory addresses to the device.
+
\subsubsection{PCI configuration access capability}\label{sec:Virtio Trans=
port Options / Virtio Over PCI Bus / PCI Device Layout / PCI configuration =
access capability}
=20
The VIRTIO_PCI_CAP_PCI_CFG capability
--=20
2.49.0