From nobody Fri May 9 13:49:38 2025
Received: from us-smtp-delivery-124.mimecast.com
(us-smtp-delivery-124.mimecast.com [170.10.133.124])
(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))
(No client certificate requested)
by smtp.subspace.kernel.org (Postfix) with ESMTPS id B7EB41FBE83
for <linux-kernel@vger.kernel.org>; Tue, 1 Apr 2025 12:58:44 +0000 (UTC)
Authentication-Results: smtp.subspace.kernel.org;
arc=none smtp.client-ip=170.10.133.124
ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;
t=1743512327; cv=none;
b=uKdQtJxMOLvaudy9WYAX8E+ziJLiLfWRa2PG2xC63sT6ipYiOjxmiqALtykLjdQw6K70GOEIH40kF0wpPvYIFbm1ROWrAA/Pl32WSlyfVfZOzc2KVfkh7Dp0fq6qIFGvEW7umEaraPtjlLLyuYyl6IsusuKhiCax8L9DUZ8EYDw=
ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org;
s=arc-20240116; t=1743512327; c=relaxed/simple;
bh=fqxc9+eEnnHlQuergBsYxibkB40FOkfBcREL4rl7lkw=;
h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:
MIME-Version;
b=F58yaevUzeujsuRC0ik0mQ360p3ibltkhe1iQFAUnhzZ082l9CQVD4yko1/LprMxqSID631ZXwXXJwcstNQJNYNL9sYvv9j+a1VohAk/iDpJ9J2gEoTeBmnK1gYlr0o96fF8jCEUIlsBQUv7l6VtVfef3UTPfV/HsddXFp713QE=
ARC-Authentication-Results: i=1; smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com;
spf=pass smtp.mailfrom=redhat.com;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b=YZKkWnOs; arc=none smtp.client-ip=170.10.133.124
Authentication-Results: smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
spf=pass smtp.mailfrom=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b="YZKkWnOs"
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;
s=mimecast20190719; t=1743512323;
h=from:from:reply-to:subject:subject:date:date:message-id:message-id:
to:to:cc:cc:mime-version:mime-version:
content-transfer-encoding:content-transfer-encoding:
in-reply-to:in-reply-to:references:references;
bh=nj3qCzc4f4ifM0KG5d8Lwvc9Y+5K+4gMJTdGUFQF2Is=;
b=YZKkWnOsEXdiuiv6DwVagPS0BXnVzE8Ipfbhhrn6v0qF9xGLyQPBc6mqFynHCFJ4ELFvBJ
Ch/4fN64VRZg3S5Isr1Y8Ogi4UM4690FVOsJx9EqyK97+C7SvA0BiWY9bN5KdV+eH6gmNU
CmYhclcos8iSd/T94ut8kJe7wlqB2Uc=
Received: from mx-prod-mc-04.mail-002.prod.us-west-2.aws.redhat.com
(ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by
relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3,
cipher=TLS_AES_256_GCM_SHA384) id us-mta-78-XiB9IRkjN_OoBOGQpALg7A-1; Tue,
01 Apr 2025 08:58:40 -0400
X-MC-Unique: XiB9IRkjN_OoBOGQpALg7A-1
X-Mimecast-MFC-AGG-ID: XiB9IRkjN_OoBOGQpALg7A_1743512318
Received: from mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com
(mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.15])
(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)
key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest
SHA256)
(No client certificate requested)
by mx-prod-mc-04.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS
id 750461955DDE;
Tue, 1 Apr 2025 12:58:38 +0000 (UTC)
Received: from hydra.redhat.com (unknown [10.44.32.206])
by mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP
id 22F4B1956094;
Tue, 1 Apr 2025 12:58:33 +0000 (UTC)
From: Jocelyn Falempe <jfalempe@redhat.com>
To: Jani Nikula <jani.nikula@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Tvrtko Ursulin <tursulin@ursulin.net>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org,
dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Subject: [PATCH v6 1/8] drm/i915/fbdev: Add intel_fbdev_get_map()
Date: Tue, 1 Apr 2025 14:51:07 +0200
Message-ID: <20250401125818.333033-2-jfalempe@redhat.com>
In-Reply-To: <20250401125818.333033-1-jfalempe@redhat.com>
References: <20250401125818.333033-1-jfalempe@redhat.com>
Precedence: bulk
X-Mailing-List: linux-kernel@vger.kernel.org
List-Id: <linux-kernel.vger.kernel.org>
List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
X-Scanned-By: MIMEDefang 3.0 on 10.30.177.15
Content-Type: text/plain; charset="utf-8"
The vaddr of the fbdev framebuffer is private to the struct
intel_fbdev, so this function is needed to access it for drm_panic.
Also the struct i915_vma is different between i915 and xe, so it
requires a few functions to access fbdev->vma->iomap.
Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---
v2:
* Add intel_fb_get_vaddr() and i915_vma_get_iomap() to build with Xe drive=
r.
=20
v4:
* rename to get_map(), and return the struct iosys_map mapping.
* implement the Xe variant.
drivers/gpu/drm/i915/display/intel_fb_pin.c | 5 +++++
drivers/gpu/drm/i915/display/intel_fb_pin.h | 2 ++
drivers/gpu/drm/i915/display/intel_fbdev.c | 5 +++++
drivers/gpu/drm/i915/display/intel_fbdev.h | 6 +++++-
drivers/gpu/drm/i915/i915_vma.h | 5 +++++
drivers/gpu/drm/xe/display/xe_fb_pin.c | 5 +++++
6 files changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/=
i915/display/intel_fb_pin.c
index c648ab8a93d7..7f1c21eb12e0 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -333,3 +333,8 @@ void intel_plane_unpin_fb(struct intel_plane_state *old=
_plane_state)
intel_dpt_unpin_from_ggtt(fb->dpt_vm);
}
}
+
+void intel_fb_get_map(struct i915_vma *vma, struct iosys_map *map)
+{
+ iosys_map_set_vaddr_iomem(map, i915_vma_get_iomap(vma));
+}
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/=
i915/display/intel_fb_pin.h
index 01770dbba2e0..81ab79da1af7 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
@@ -12,6 +12,7 @@ struct drm_framebuffer;
struct i915_vma;
struct intel_plane_state;
struct i915_gtt_view;
+struct iosys_map;
=20
struct i915_vma *
intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
@@ -27,5 +28,6 @@ void intel_fb_unpin_vma(struct i915_vma *vma, unsigned lo=
ng flags);
int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
const struct intel_plane_state *old_plane_state);
void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
+void intel_fb_get_map(struct i915_vma *vma, struct iosys_map *map);
=20
#endif
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i=
915/display/intel_fbdev.c
index 369f46286e95..5fdf71c3c74e 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -516,3 +516,8 @@ struct i915_vma *intel_fbdev_vma_pointer(struct intel_f=
bdev *fbdev)
{
return fbdev ? fbdev->vma : NULL;
}
+
+void intel_fbdev_get_map(struct intel_fbdev *fbdev, struct iosys_map *map)
+{
+ intel_fb_get_map(fbdev->vma, map);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.h b/drivers/gpu/drm/i=
915/display/intel_fbdev.h
index 89bad3a2b01a..a4b3d6dd538f 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.h
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.h
@@ -13,6 +13,7 @@ struct drm_fb_helper_surface_size;
struct drm_i915_private;
struct intel_fbdev;
struct intel_framebuffer;
+struct iosys_map;
=20
#ifdef CONFIG_DRM_FBDEV_EMULATION
int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
@@ -22,7 +23,7 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *=
helper,
void intel_fbdev_setup(struct drm_i915_private *dev_priv);
struct intel_framebuffer *intel_fbdev_framebuffer(struct intel_fbdev *fbde=
v);
struct i915_vma *intel_fbdev_vma_pointer(struct intel_fbdev *fbdev);
-
+void intel_fbdev_get_map(struct intel_fbdev *fbdev, struct iosys_map *map);
#else
#define INTEL_FBDEV_DRIVER_OPS \
.fbdev_probe =3D NULL
@@ -39,6 +40,9 @@ static inline struct i915_vma *intel_fbdev_vma_pointer(st=
ruct intel_fbdev *fbdev
return NULL;
}
=20
+static inline void intel_fbdev_get_map(struct intel_fbdev *fbdev, struct i=
osys_map *map)
+{
+}
#endif
=20
#endif /* __INTEL_FBDEV_H__ */
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vm=
a.h
index 6a6be8048aa8..4ae610927fa7 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -353,6 +353,11 @@ static inline bool i915_node_color_differs(const struc=
t drm_mm_node *node,
return drm_mm_node_allocated(node) && node->color !=3D color;
}
=20
+static inline void __iomem *i915_vma_get_iomap(struct i915_vma *vma)
+{
+ return READ_ONCE(vma->iomap);
+}
+
/**
* i915_vma_pin_iomap - calls ioremap_wc to map the GGTT VMA via the apert=
ure
* @vma: VMA to iomap
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/di=
splay/xe_fb_pin.c
index b69896baa20c..b10ab7def601 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -463,3 +463,8 @@ u64 intel_dpt_offset(struct i915_vma *dpt_vma)
{
return 0;
}
+
+void intel_fb_get_map(struct i915_vma *vma, struct iosys_map *map)
+{
+ *map =3D vma->bo->vmap;
+}
--=20
2.49.0
From nobody Fri May 9 13:49:38 2025
Received: from us-smtp-delivery-124.mimecast.com
(us-smtp-delivery-124.mimecast.com [170.10.133.124])
(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))
(No client certificate requested)
by smtp.subspace.kernel.org (Postfix) with ESMTPS id E503A1FBE83
for <linux-kernel@vger.kernel.org>; Tue, 1 Apr 2025 12:58:53 +0000 (UTC)
Authentication-Results: smtp.subspace.kernel.org;
arc=none smtp.client-ip=170.10.133.124
ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;
t=1743512336; cv=none;
b=uWLH2rr3dgJ0kAvuYkq7GMHN5vkbs2dk37BsnAT1CyFsdKoJPLA6Priv9PiLW2ErwQFRrDoyc24mVf00X+G+ht2hUye5t5lgJ2g4knsDn5yA5WKm15SLqlSyjePR0CfaIcPa+3fdUyPpmQjvcPik4i6MBGUqGsCqRGT1C8euLFc=
ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org;
s=arc-20240116; t=1743512336; c=relaxed/simple;
bh=p2FAVwUPsOz8nYl+4ZcopZEcxRrGtwUurqOqrmumtc4=;
h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:
MIME-Version;
b=kXL9UCF/U3/dmz2AAcCpBOrOU8XHW88emVWKw3ogqpQWP6fdKZ0e49jVw3imTvJPoYwDmGel+rSkTZG0d4CzWbDIXl5hBJWUISgaj2ufcoh6/ukp3B3AI3tqXrwTwOsOptqw+KL9KuQYQLxsalyWwQeuNohVllWpimjcwso9HRs=
ARC-Authentication-Results: i=1; smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com;
spf=pass smtp.mailfrom=redhat.com;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b=IIhuYqkG; arc=none smtp.client-ip=170.10.133.124
Authentication-Results: smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
spf=pass smtp.mailfrom=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b="IIhuYqkG"
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;
s=mimecast20190719; t=1743512332;
h=from:from:reply-to:subject:subject:date:date:message-id:message-id:
to:to:cc:cc:mime-version:mime-version:
content-transfer-encoding:content-transfer-encoding:
in-reply-to:in-reply-to:references:references;
bh=gdBA6jsJfsrTLL4WUycFDFRP3fmh5ENTflYTA7f8G4c=;
b=IIhuYqkGeRaijy72Sgtv5Gu5Eh5wGrHK6TZzvcQ44TeqLblfT+oqJ1oWgU6tXjV4wAI3vr
CttcOxFocvwy2TX1P/aimpOkUP8wl2Db5EsAzDwpmgWNA88wKe53N1HTaBuUrAPGr96kG4
QnlvWqaxfFmrZozG9YcVEuFQgzl9uNY=
Received: from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com
(ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by
relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3,
cipher=TLS_AES_256_GCM_SHA384) id us-mta-222-zPp512zjMHq5QT4E3xGkMQ-1; Tue,
01 Apr 2025 08:58:49 -0400
X-MC-Unique: zPp512zjMHq5QT4E3xGkMQ-1
X-Mimecast-MFC-AGG-ID: zPp512zjMHq5QT4E3xGkMQ_1743512323
Received: from mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com
(mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.15])
(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)
key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest
SHA256)
(No client certificate requested)
by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS
id 7B36F180AF50;
Tue, 1 Apr 2025 12:58:43 +0000 (UTC)
Received: from hydra.redhat.com (unknown [10.44.32.206])
by mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP
id 1B6231956094;
Tue, 1 Apr 2025 12:58:38 +0000 (UTC)
From: Jocelyn Falempe <jfalempe@redhat.com>
To: Jani Nikula <jani.nikula@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Tvrtko Ursulin <tursulin@ursulin.net>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org,
dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Subject: [PATCH v6 2/8] drm/i915/display/i9xx: Add a disable_tiling() for i9xx
planes
Date: Tue, 1 Apr 2025 14:51:08 +0200
Message-ID: <20250401125818.333033-3-jfalempe@redhat.com>
In-Reply-To: <20250401125818.333033-1-jfalempe@redhat.com>
References: <20250401125818.333033-1-jfalempe@redhat.com>
Precedence: bulk
X-Mailing-List: linux-kernel@vger.kernel.org
List-Id: <linux-kernel.vger.kernel.org>
List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
X-Scanned-By: MIMEDefang 3.0 on 10.30.177.15
Content-Type: text/plain; charset="utf-8"
drm_panic draws in linear framebuffer, so it's easier to re-use the
current framebuffer, and disable tiling in the panic handler, to show
the panic screen.
Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 23 +++++++++++++++++++
.../drm/i915/display/intel_display_types.h | 2 ++
2 files changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i9=
15/display/i9xx_plane.c
index 5e8344fdfc28..9c93d5ac7129 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -908,6 +908,27 @@ static const struct drm_plane_funcs i8xx_plane_funcs =
=3D {
.format_mod_supported =3D i8xx_plane_format_mod_supported,
};
=20
+static void i9xx_disable_tiling(struct intel_plane *plane)
+{
+ struct intel_display *display =3D to_intel_display(plane);
+ enum i9xx_plane_id i9xx_plane =3D plane->i9xx_plane;
+ u32 dspcntr;
+ u32 reg;
+
+ dspcntr =3D intel_de_read_fw(display, DSPCNTR(display, i9xx_plane));
+ dspcntr &=3D ~DISP_TILED;
+ intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);
+
+ if (DISPLAY_VER(display) >=3D 4) {
+ reg =3D intel_de_read_fw(display, DSPSURF(display, i9xx_plane));
+ intel_de_write_fw(display, DSPSURF(display, i9xx_plane), reg);
+
+ } else {
+ reg =3D intel_de_read_fw(display, DSPADDR(display, i9xx_plane));
+ intel_de_write_fw(display, DSPADDR(display, i9xx_plane), reg);
+ }
+}
+
struct intel_plane *
intel_primary_plane_create(struct intel_display *display, enum pipe pipe)
{
@@ -1050,6 +1071,8 @@ intel_primary_plane_create(struct intel_display *disp=
lay, enum pipe pipe)
}
}
=20
+ plane->disable_tiling =3D i9xx_disable_tiling;
+
modifiers =3D intel_fb_plane_get_modifiers(display, INTEL_PLANE_CAP_TILIN=
G_X);
=20
if (DISPLAY_VER(display) >=3D 5 || display->platform.g4x)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/g=
pu/drm/i915/display/intel_display_types.h
index 367b53a9eae2..62d0785c9edf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1512,6 +1512,8 @@ struct intel_plane {
bool async_flip);
void (*enable_flip_done)(struct intel_plane *plane);
void (*disable_flip_done)(struct intel_plane *plane);
+ /* For drm_panic */
+ void (*disable_tiling)(struct intel_plane *plane);
};
=20
#define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state=
, base)
--=20
2.49.0
From nobody Fri May 9 13:49:38 2025
Received: from us-smtp-delivery-124.mimecast.com
(us-smtp-delivery-124.mimecast.com [170.10.133.124])
(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))
(No client certificate requested)
by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A630203719
for <linux-kernel@vger.kernel.org>; Tue, 1 Apr 2025 12:58:55 +0000 (UTC)
Authentication-Results: smtp.subspace.kernel.org;
arc=none smtp.client-ip=170.10.133.124
ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;
t=1743512337; cv=none;
b=kTzaPibaoqmK/n9rUKLfVKps/6IGtFcxc+o7SQjBJfCybtfLIqldSAztYNkpEWdKLyJby+ZhzTqY7yNsCF/gf1MUMB5VvPNJzWilNgKrrbpaE/3A3V8JWbPe6pdir0AvrIdIYzRYFD2s5xsG5pNEmaQFRog24kGT2rdzOPpHj1E=
ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org;
s=arc-20240116; t=1743512337; c=relaxed/simple;
bh=dBs4owfbZOLT49HeLWBMumNZMaB/enY5f7NBNOCMt2Q=;
h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:
MIME-Version;
b=RCtHYzvCPJ2ZPzuDq5MgKdp6qGP4ESDhBijM/f9AfccKeNTOzuJWgtvQrKylEqa2AyTxmRw0N+XvsXrYOdpDEWnOdvm+3Wt8GQe6DOJcDc4g9hM6TLDdtib/3c3fQUEvrX7OggpDbCNl7iplCAqCrVB1A/V+ySwni4DYP3FZST4=
ARC-Authentication-Results: i=1; smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com;
spf=pass smtp.mailfrom=redhat.com;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b=ehDtpnq2; arc=none smtp.client-ip=170.10.133.124
Authentication-Results: smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
spf=pass smtp.mailfrom=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b="ehDtpnq2"
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;
s=mimecast20190719; t=1743512334;
h=from:from:reply-to:subject:subject:date:date:message-id:message-id:
to:to:cc:cc:mime-version:mime-version:
content-transfer-encoding:content-transfer-encoding:
in-reply-to:in-reply-to:references:references;
bh=xsf5mF6lbnqqM1ES1AArIF+WsV/mjamIarjqut5ruTA=;
b=ehDtpnq21uF4SoxB4ggJvyq079Q0Vw6ymGV2SS+r4dqO5nlxvypg92W2oM9egqBhlxlECg
qhotAnc8rYkaw4k/1xBv35DpVLcSGBHRdMvkYmpDlSAvnm9ael1eDo7lAmL7wSE/42Uk2t
PJoOwwkLbVDRa/0NymgFH0LyCEJfSHY=
Received: from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com
(ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by
relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3,
cipher=TLS_AES_256_GCM_SHA384) id us-mta-90-esD6WKM0M3-bb9i6xDkUMg-1; Tue,
01 Apr 2025 08:58:50 -0400
X-MC-Unique: esD6WKM0M3-bb9i6xDkUMg-1
X-Mimecast-MFC-AGG-ID: esD6WKM0M3-bb9i6xDkUMg_1743512329
Received: from mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com
(mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.15])
(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)
key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest
SHA256)
(No client certificate requested)
by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS
id D79D81809CA3;
Tue, 1 Apr 2025 12:58:48 +0000 (UTC)
Received: from hydra.redhat.com (unknown [10.44.32.206])
by mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP
id 426ED1956094;
Tue, 1 Apr 2025 12:58:43 +0000 (UTC)
From: Jocelyn Falempe <jfalempe@redhat.com>
To: Jani Nikula <jani.nikula@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Tvrtko Ursulin <tursulin@ursulin.net>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org,
dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Subject: [PATCH v6 3/8] drm/i915/display: Add a disable_tiling() for skl
planes
Date: Tue, 1 Apr 2025 14:51:09 +0200
Message-ID: <20250401125818.333033-4-jfalempe@redhat.com>
In-Reply-To: <20250401125818.333033-1-jfalempe@redhat.com>
References: <20250401125818.333033-1-jfalempe@redhat.com>
Precedence: bulk
X-Mailing-List: linux-kernel@vger.kernel.org
List-Id: <linux-kernel.vger.kernel.org>
List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
X-Scanned-By: MIMEDefang 3.0 on 10.30.177.15
Content-Type: text/plain; charset="utf-8"
drm_panic draws in linear framebuffer, so it's easier to re-use the
current framebuffer, and disable tiling in the panic handler, to show
the panic screen.
Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---
.../drm/i915/display/skl_universal_plane.c | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/g=
pu/drm/i915/display/skl_universal_plane.c
index 8739195aba69..64a1e8e7122d 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2790,6 +2790,25 @@ static u8 tgl_plane_caps(struct intel_display *displ=
ay,
return caps;
}
=20
+static void skl_disable_tiling(struct intel_plane *plane)
+{
+ struct intel_plane_state *state =3D to_intel_plane_state(plane->base.stat=
e);
+ struct intel_display *display =3D to_intel_display(plane);
+ u32 stride =3D state->view.color_plane[0].scanout_stride / 64;
+ u32 plane_ctl;
+
+ plane_ctl =3D intel_de_read(display, PLANE_CTL(plane->pipe, plane->id));
+ plane_ctl &=3D ~PLANE_CTL_TILED_MASK;
+
+ intel_de_write_fw(display, PLANE_STRIDE(plane->pipe, plane->id),
+ PLANE_STRIDE_(stride));
+
+ intel_de_write_fw(display, PLANE_CTL(plane->pipe, plane->id), plane_ctl);
+
+ intel_de_write_fw(display, PLANE_SURF(plane->pipe, plane->id),
+ skl_plane_surf(state, 0));
+}
+
struct intel_plane *
skl_universal_plane_create(struct intel_display *display,
enum pipe pipe, enum plane_id plane_id)
@@ -2836,6 +2855,7 @@ skl_universal_plane_create(struct intel_display *disp=
lay,
plane->max_height =3D skl_plane_max_height;
plane->min_cdclk =3D skl_plane_min_cdclk;
}
+ plane->disable_tiling =3D skl_disable_tiling;
=20
if (DISPLAY_VER(display) >=3D 13)
plane->max_stride =3D adl_plane_max_stride;
--=20
2.49.0
From nobody Fri May 9 13:49:38 2025
Received: from us-smtp-delivery-124.mimecast.com
(us-smtp-delivery-124.mimecast.com [170.10.133.124])
(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))
(No client certificate requested)
by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2232620371B
for <linux-kernel@vger.kernel.org>; Tue, 1 Apr 2025 12:58:57 +0000 (UTC)
Authentication-Results: smtp.subspace.kernel.org;
arc=none smtp.client-ip=170.10.133.124
ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;
t=1743512339; cv=none;
b=rgOC8nNyre0FUCy+r7GLSmMTDtFvb64Jzg/Bgvfihzk9oth2fLCknzf6KVhmEhRB8jnvU6CVk5bOLpCBG2rDEK7HNl2h4Dl2T5GvpFyaspFJ8nY+Iq93pOSYIRrUpKToyFLmKIiuGbAda3bbfdETvJdgIfxe6B174DuCF52csNw=
ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org;
s=arc-20240116; t=1743512339; c=relaxed/simple;
bh=wTp6xQDqIlx7EHt+MrZ6M1ijSjBcxbudgReH1AQ0UUo=;
h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:
MIME-Version;
b=CW+WLa2XanKqJS9VOCyLygvWJcZxnzBrbEaKN2+uTxqwxjsI8JZxoYPwiuXd7Qy18Mq5vShq/xI2gJFL8vWIEaxGDCxrI2pnEu9htM9u8o08NB5RBWYnWzcgz4tiXm+roMpGiPwfz+MmliHBMXz+aHDsy4BWqzr8+t3IBqe6Mg8=
ARC-Authentication-Results: i=1; smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com;
spf=pass smtp.mailfrom=redhat.com;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b=TbUyIjNq; arc=none smtp.client-ip=170.10.133.124
Authentication-Results: smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
spf=pass smtp.mailfrom=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b="TbUyIjNq"
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;
s=mimecast20190719; t=1743512337;
h=from:from:reply-to:subject:subject:date:date:message-id:message-id:
to:to:cc:cc:mime-version:mime-version:
content-transfer-encoding:content-transfer-encoding:
in-reply-to:in-reply-to:references:references;
bh=b4TyWLMM7H6aXWlkkKdABqYzULjG/pMP6bPbfcdsccY=;
b=TbUyIjNqZBd+v/tyFvSbLa6x2005JnAnQNzrgDKsovXG4+/CNAvzC1ALVtCl6Dkv2lVFbi
E0GiVu2PA65iaxysASDBe9Af3hOdai2ikKOJV2HoBDbwYhfiva0n7hEuAGMTQXGIAvPqIX
Mcr9khroY25nv2ZztCAds2Erafdx62s=
Received: from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com
(ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by
relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3,
cipher=TLS_AES_256_GCM_SHA384) id us-mta-408-H1Nvd6YqNKacleIYUVl8Gg-1; Tue,
01 Apr 2025 08:58:54 -0400
X-MC-Unique: H1Nvd6YqNKacleIYUVl8Gg-1
X-Mimecast-MFC-AGG-ID: H1Nvd6YqNKacleIYUVl8Gg_1743512333
Received: from mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com
(mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.15])
(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)
key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest
SHA256)
(No client certificate requested)
by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS
id 3154D1801A1A;
Tue, 1 Apr 2025 12:58:53 +0000 (UTC)
Received: from hydra.redhat.com (unknown [10.44.32.206])
by mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP
id 6521D1956094;
Tue, 1 Apr 2025 12:58:49 +0000 (UTC)
From: Jocelyn Falempe <jfalempe@redhat.com>
To: Jani Nikula <jani.nikula@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Tvrtko Ursulin <tursulin@ursulin.net>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org,
dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Subject: [PATCH v6 4/8] drm/i915/gem: Add i915_gem_object_panic_map()
Date: Tue, 1 Apr 2025 14:51:10 +0200
Message-ID: <20250401125818.333033-5-jfalempe@redhat.com>
In-Reply-To: <20250401125818.333033-1-jfalempe@redhat.com>
References: <20250401125818.333033-1-jfalempe@redhat.com>
Precedence: bulk
X-Mailing-List: linux-kernel@vger.kernel.org
List-Id: <linux-kernel.vger.kernel.org>
List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
X-Scanned-By: MIMEDefang 3.0 on 10.30.177.15
Content-Type: text/plain; charset="utf-8"
Prepare the work for drm_panic support. This is used to map the
current framebuffer, so the CPU can overwrite it with the panic
message.
Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---
v5:
* Use iosys_map for intel_bo_panic_map().
drivers/gpu/drm/i915/display/intel_bo.c | 5 ++++
drivers/gpu/drm/i915/display/intel_bo.h | 1 +
drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 ++
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 29 ++++++++++++++++++++++
drivers/gpu/drm/xe/display/intel_bo.c | 10 ++++++++
5 files changed, 47 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bo.c b/drivers/gpu/drm/i915=
/display/intel_bo.c
index fbd16d7b58d9..ac904e9ec7d5 100644
--- a/drivers/gpu/drm/i915/display/intel_bo.c
+++ b/drivers/gpu/drm/i915/display/intel_bo.c
@@ -57,3 +57,8 @@ void intel_bo_describe(struct seq_file *m, struct drm_gem=
_object *obj)
{
i915_debugfs_describe_obj(m, to_intel_bo(obj));
}
+
+void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map)
+{
+ i915_gem_object_panic_map(to_intel_bo(obj), map);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_bo.h b/drivers/gpu/drm/i915=
/display/intel_bo.h
index ea7a2253aaa5..5b6c63d99786 100644
--- a/drivers/gpu/drm/i915/display/intel_bo.h
+++ b/drivers/gpu/drm/i915/display/intel_bo.h
@@ -23,5 +23,6 @@ struct intel_frontbuffer *intel_bo_set_frontbuffer(struct=
drm_gem_object *obj,
struct intel_frontbuffer *front);
=20
void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj);
+void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map);
=20
#endif /* __INTEL_BO__ */
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i=
915/gem/i915_gem_object.h
index a5f34542135c..b16092707ea5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -692,6 +692,8 @@ i915_gem_object_unpin_pages(struct drm_i915_gem_object =
*obj)
int __i915_gem_object_put_pages(struct drm_i915_gem_object *obj);
int i915_gem_object_truncate(struct drm_i915_gem_object *obj);
=20
+void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct ios=
ys_map *map);
+
/**
* i915_gem_object_pin_map - return a contiguous mapping of the entire obj=
ect
* @obj: the object to map into kernel address space
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i9=
15/gem/i915_gem_pages.c
index 8780aa243105..718bea6474d7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -355,6 +355,35 @@ static void *i915_gem_object_map_pfn(struct drm_i915_g=
em_object *obj,
return vaddr ?: ERR_PTR(-ENOMEM);
}
=20
+/* Map the current framebuffer for CPU access. Called from panic handler, =
so no
+ * need to pin or cleanup.
+ */
+void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct ios=
ys_map *map)
+{
+ enum i915_map_type has_type;
+ void *ptr;
+
+ ptr =3D page_unpack_bits(obj->mm.mapping, &has_type);
+
+
+ if (!ptr) {
+ if (i915_gem_object_has_struct_page(obj))
+ ptr =3D i915_gem_object_map_page(obj, I915_MAP_WB);
+ else
+ ptr =3D i915_gem_object_map_pfn(obj, I915_MAP_WB);
+
+ if (IS_ERR(ptr))
+ return;
+
+ obj->mm.mapping =3D page_pack_bits(ptr, I915_MAP_WB);
+ }
+
+ if (i915_gem_object_has_iomem(obj))
+ iosys_map_set_vaddr_iomem(map, (void __iomem *) ptr);
+ else
+ iosys_map_set_vaddr(map, ptr);
+}
+
/* get, pin, and map the pages of the object into kernel space */
void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
enum i915_map_type type)
diff --git a/drivers/gpu/drm/xe/display/intel_bo.c b/drivers/gpu/drm/xe/dis=
play/intel_bo.c
index 27437c22bd70..c68166a64336 100644
--- a/drivers/gpu/drm/xe/display/intel_bo.c
+++ b/drivers/gpu/drm/xe/display/intel_bo.c
@@ -59,3 +59,13 @@ void intel_bo_describe(struct seq_file *m, struct drm_ge=
m_object *obj)
{
/* FIXME */
}
+
+void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map)
+{
+ struct xe_bo *bo =3D gem_to_xe_bo(obj);
+ int ret;
+
+ ret =3D ttm_bo_vmap(&bo->ttm, map);
+ if (ret)
+ iosys_map_clear(map);
+}
--=20
2.49.0
From nobody Fri May 9 13:49:38 2025
Received: from us-smtp-delivery-124.mimecast.com
(us-smtp-delivery-124.mimecast.com [170.10.133.124])
(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))
(No client certificate requested)
by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2F2982045AB
for <linux-kernel@vger.kernel.org>; Tue, 1 Apr 2025 12:59:01 +0000 (UTC)
Authentication-Results: smtp.subspace.kernel.org;
arc=none smtp.client-ip=170.10.133.124
ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;
t=1743512343; cv=none;
b=XJmOgdQuLhW8bEERt7FaDW4uWJrBgCrIkHDsIpZWyWZa/s+Tm0CJ2w5WNGemfzIo7uzOqGxLVw30CMf8Ku2IFcbCyN30CbphaS79sGFNVLWhEF8ziqfOG597DqW+B1idEFmTLQHjQe0NjxbAdJs6/snlfhl070ggrVXHKJ1plNM=
ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org;
s=arc-20240116; t=1743512343; c=relaxed/simple;
bh=aIZNii9aFNzRneZjnkQ1G7CA931tiBYTeNMoNTCCzZc=;
h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:
MIME-Version;
b=IL8t6pmqvPKC6a1FVTfSEnO7seFYjT/4qoaN7+Vu/hf/UB+mQYTp3tKtb97H3sB4o6KC8bTqGOlZNI8F9XDPa85mzPTltNH2FZ6vdm6wULoSb7Fd23nRdMrppNn3iOzoMraniCz9TbaCVqLiz5wCsDalBLcUsUBu2xN9pIHmnoI=
ARC-Authentication-Results: i=1; smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com;
spf=pass smtp.mailfrom=redhat.com;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b=WMxwHZ5T; arc=none smtp.client-ip=170.10.133.124
Authentication-Results: smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
spf=pass smtp.mailfrom=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b="WMxwHZ5T"
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;
s=mimecast20190719; t=1743512341;
h=from:from:reply-to:subject:subject:date:date:message-id:message-id:
to:to:cc:cc:mime-version:mime-version:
content-transfer-encoding:content-transfer-encoding:
in-reply-to:in-reply-to:references:references;
bh=juRFea/pWDWsGehITffYxWUdO8hnoeLDNDw7resa+3M=;
b=WMxwHZ5Tgv3qyaTd1/JVINGqfs63dmHpCNcPWkUK34jZi+3Os5uVQyOIcNzRT6jWyksKsW
GfIq5NYruXPONlcrO+AR8WhoWk5LG4J2PAWzXR31RvTj5ICcbNHNnHTVXJfMGyqTjh2MZX
Av/J7mevrlztMD38aAShIQP3G9/VXww=
Received: from mx-prod-mc-04.mail-002.prod.us-west-2.aws.redhat.com
(ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by
relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3,
cipher=TLS_AES_256_GCM_SHA384) id us-mta-510-esvjGG0ZPwuCw92nS2YvLw-1; Tue,
01 Apr 2025 08:58:59 -0400
X-MC-Unique: esvjGG0ZPwuCw92nS2YvLw-1
X-Mimecast-MFC-AGG-ID: esvjGG0ZPwuCw92nS2YvLw_1743512338
Received: from mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com
(mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.15])
(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)
key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest
SHA256)
(No client certificate requested)
by mx-prod-mc-04.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS
id 8EDB01955DCD;
Tue, 1 Apr 2025 12:58:57 +0000 (UTC)
Received: from hydra.redhat.com (unknown [10.44.32.206])
by mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP
id C63BF1956094;
Tue, 1 Apr 2025 12:58:53 +0000 (UTC)
From: Jocelyn Falempe <jfalempe@redhat.com>
To: Jani Nikula <jani.nikula@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Tvrtko Ursulin <tursulin@ursulin.net>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org,
dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Subject: [PATCH v6 5/8] drm/i915/display: Add drm_panic support
Date: Tue, 1 Apr 2025 14:51:11 +0200
Message-ID: <20250401125818.333033-6-jfalempe@redhat.com>
In-Reply-To: <20250401125818.333033-1-jfalempe@redhat.com>
References: <20250401125818.333033-1-jfalempe@redhat.com>
Precedence: bulk
X-Mailing-List: linux-kernel@vger.kernel.org
List-Id: <linux-kernel.vger.kernel.org>
List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
X-Scanned-By: MIMEDefang 3.0 on 10.30.177.15
Content-Type: text/plain; charset="utf-8"
This adds drm_panic support for a wide range of Intel GPU. I've
tested it only on 4 laptops, Haswell (with 128MB of eDRAM),
Comet Lake, Raptor Lake, and Lunar Lake.
For hardware using DPT, it's not possible to disable tiling, as you
will need to reconfigure the way the GPU is accessing the
framebuffer.
Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---
v4:
* Add support for Xe driver.
=20
v6:
* Use struct intel_display instead of drm_i915_private for intel_atomic_pl=
ane.c=20
.../gpu/drm/i915/display/intel_atomic_plane.c | 79 ++++++++++++++++++-
1 file changed, 78 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gp=
u/drm/i915/display/intel_atomic_plane.c
index 7276179df878..eebf20fafaeb 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -33,13 +33,16 @@
=20
#include <linux/dma-fence-chain.h>
#include <linux/dma-resv.h>
+#include <linux/iosys-map.h>
=20
#include <drm/drm_atomic_helper.h>
#include <drm/drm_blend.h>
#include <drm/drm_damage_helper.h>
+#include <drm/drm_cache.h>
#include <drm/drm_fourcc.h>
#include <drm/drm_gem.h>
#include <drm/drm_gem_atomic_helper.h>
+#include <drm/drm_panic.h>
=20
#include "gem/i915_gem_object.h"
#include "i915_config.h"
@@ -47,6 +50,7 @@
#include "i915_vma.h"
#include "i9xx_plane_regs.h"
#include "intel_atomic_plane.h"
+#include "intel_bo.h"
#include "intel_cdclk.h"
#include "intel_cursor.h"
#include "intel_display_rps.h"
@@ -54,6 +58,7 @@
#include "intel_display_types.h"
#include "intel_fb.h"
#include "intel_fb_pin.h"
+#include "intel_fbdev.h"
#include "skl_scaler.h"
#include "skl_universal_plane.h"
#include "skl_watermark.h"
@@ -1251,14 +1256,86 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
intel_plane_unpin_fb(old_plane_state);
}
=20
+/* Only used by drm_panic get_scanout_buffer() and panic_flush(), so it is
+ * protected by the drm panic spinlock
+ */
+static struct iosys_map panic_map;
+
+static void intel_panic_flush(struct drm_plane *plane)
+{
+ struct intel_plane_state *plane_state =3D to_intel_plane_state(plane->sta=
te);
+ struct intel_plane *iplane =3D to_intel_plane(plane);
+ struct intel_display *display =3D to_intel_display(iplane);
+ struct drm_framebuffer *fb =3D plane_state->hw.fb;
+
+ /* Force a cache flush, otherwise the new pixels won't show up */
+ drm_clflush_virt_range(panic_map.vaddr, fb->height * fb->pitches[0]);
+
+ /* Don't disable tiling if it's the fbdev framebuffer.*/
+ if (to_intel_framebuffer(fb) =3D=3D intel_fbdev_framebuffer(display->fbde=
v.fbdev)) {
+ return;
+
+ if (fb->modifier && iplane->disable_tiling)
+ iplane->disable_tiling(iplane);
+}
+
+static int intel_get_scanout_buffer(struct drm_plane *plane,
+ struct drm_scanout_buffer *sb)
+{
+ struct intel_plane_state *plane_state;
+ struct drm_gem_object *obj;
+ struct drm_framebuffer *fb;
+ struct intel_display *display =3D to_intel_display(plane->dev);
+
+ if (!plane->state || !plane->state->fb || !plane->state->visible)
+ return -ENODEV;
+
+ plane_state =3D to_intel_plane_state(plane->state);
+ fb =3D plane_state->hw.fb;
+ obj =3D intel_fb_bo(fb);
+ if (!obj)
+ return -ENODEV;
+
+ iosys_map_clear(&panic_map);
+ if (to_intel_framebuffer(fb) =3D=3D intel_fbdev_framebuffer(display->fbde=
v.fbdev)) {
+ intel_fbdev_get_map(display->fbdev.fbdev, &panic_map);
+ } else {
+ /* Can't disable tiling if DPT is in use */
+ if (intel_fb_uses_dpt(fb))
+ return -EOPNOTSUPP;
+
+ intel_bo_panic_map(obj, &panic_map);
+ }
+ if (iosys_map_is_null(&panic_map))
+ return -ENOMEM;
+
+ sb->map[0] =3D panic_map;
+ sb->width =3D fb->width;
+ sb->height =3D fb->height;
+ sb->format =3D fb->format;
+ sb->pitch[0] =3D fb->pitches[0];
+
+ return 0;
+}
+
static const struct drm_plane_helper_funcs intel_plane_helper_funcs =3D {
.prepare_fb =3D intel_prepare_plane_fb,
.cleanup_fb =3D intel_cleanup_plane_fb,
};
=20
+static const struct drm_plane_helper_funcs intel_primary_plane_helper_func=
s =3D {
+ .prepare_fb =3D intel_prepare_plane_fb,
+ .cleanup_fb =3D intel_cleanup_plane_fb,
+ .get_scanout_buffer =3D intel_get_scanout_buffer,
+ .panic_flush =3D intel_panic_flush,
+};
+
void intel_plane_helper_add(struct intel_plane *plane)
{
- drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);
+ if (plane->base.type =3D=3D DRM_PLANE_TYPE_PRIMARY)
+ drm_plane_helper_add(&plane->base, &intel_primary_plane_helper_funcs);
+ else
+ drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);
}
=20
void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_pla=
ne_state,
--=20
2.49.0
From nobody Fri May 9 13:49:38 2025
Received: from us-smtp-delivery-124.mimecast.com
(us-smtp-delivery-124.mimecast.com [170.10.133.124])
(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))
(No client certificate requested)
by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6417DC2C6
for <linux-kernel@vger.kernel.org>; Tue, 1 Apr 2025 12:59:11 +0000 (UTC)
Authentication-Results: smtp.subspace.kernel.org;
arc=none smtp.client-ip=170.10.133.124
ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;
t=1743512352; cv=none;
b=Fm9Hw6pixOvnMImvWbtwQqa38wHxYQOWyk/1OjN3ttAJkf9OpndYmPCcH8Ey81UNsqT4ZifEKzQByQkw6A2VksDshKyW9/vGASHW3/O7SwxdiGHuhkSnMbt7Z0ibDh+o/wwoNXpQWrL+kbVj141kEHEdK20UYcOMp8pImXIpIVU=
ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org;
s=arc-20240116; t=1743512352; c=relaxed/simple;
bh=G7K88v/Ukq0QK7fXwZmGYBVg8HiiFFo9uWgLwAMSOPk=;
h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:
MIME-Version;
b=jgk0CXPVt6lDyH52KS682IYil2er7FKFJERO7hiCAIkwheNsTXFiVyAj2uJ7K6bQvy47k7EmFl5qj4NV1CblCB+ldP5DnCIV/dbQ41Vt4wpSEWmTjgXVXOe+do1baEMX55zvow9yGmbR4Pj66y2brFMpYdYwPwlQTvr1rm/lM48=
ARC-Authentication-Results: i=1; smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com;
spf=pass smtp.mailfrom=redhat.com;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b=QMk/YLQH; arc=none smtp.client-ip=170.10.133.124
Authentication-Results: smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
spf=pass smtp.mailfrom=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b="QMk/YLQH"
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;
s=mimecast20190719; t=1743512350;
h=from:from:reply-to:subject:subject:date:date:message-id:message-id:
to:to:cc:cc:mime-version:mime-version:
content-transfer-encoding:content-transfer-encoding:
in-reply-to:in-reply-to:references:references;
bh=VJt1hJADaASXpoNz9Tj4QMkqEmjuTvocdG32Mm+j/bU=;
b=QMk/YLQHjjYXa+jPfeYmrAb8n+wIIuKbTNRU9zja7aeFvFZUCuE9rSAamoebo6VzpGbTe2
/vKOUkvWYWrl7+VjGq9+0gU6ZTVTf0DxpozRppelveR5G2KaImTBJEX5hRMm41OlY8qDN1
EL5eWe+OuOSIgSMo9g6qM3PSOXo7iXk=
Received: from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com
(ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by
relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3,
cipher=TLS_AES_256_GCM_SHA384) id us-mta-262-RH5WGiMTPNyCglMqdT544g-1; Tue,
01 Apr 2025 08:59:04 -0400
X-MC-Unique: RH5WGiMTPNyCglMqdT544g-1
X-Mimecast-MFC-AGG-ID: RH5WGiMTPNyCglMqdT544g_1743512342
Received: from mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com
(mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.15])
(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)
key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest
SHA256)
(No client certificate requested)
by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS
id 5E227180AF57;
Tue, 1 Apr 2025 12:59:02 +0000 (UTC)
Received: from hydra.redhat.com (unknown [10.44.32.206])
by mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP
id 1C0081956094;
Tue, 1 Apr 2025 12:58:57 +0000 (UTC)
From: Jocelyn Falempe <jfalempe@redhat.com>
To: Jani Nikula <jani.nikula@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Tvrtko Ursulin <tursulin@ursulin.net>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org,
dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Subject: [PATCH v6 6/8] drm/i915/display: Flush the front buffer in panic
handler
Date: Tue, 1 Apr 2025 14:51:12 +0200
Message-ID: <20250401125818.333033-7-jfalempe@redhat.com>
In-Reply-To: <20250401125818.333033-1-jfalempe@redhat.com>
References: <20250401125818.333033-1-jfalempe@redhat.com>
Precedence: bulk
X-Mailing-List: linux-kernel@vger.kernel.org
List-Id: <linux-kernel.vger.kernel.org>
List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
X-Scanned-By: MIMEDefang 3.0 on 10.30.177.15
Content-Type: text/plain; charset="utf-8"
On Lunar Lake, if the panic occurs when fbcon is active, the panic
screen is only partially visible on the screen. Adding this
intel_frontbuffer_flush() call solves the issue.
It's probably not safe to do that in the panic handler, but that's
still better than nothing.
Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gp=
u/drm/i915/display/intel_atomic_plane.c
index eebf20fafaeb..5dc880b963fd 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -59,6 +59,7 @@
#include "intel_fb.h"
#include "intel_fb_pin.h"
#include "intel_fbdev.h"
+#include "intel_frontbuffer.h"
#include "skl_scaler.h"
#include "skl_universal_plane.h"
#include "skl_watermark.h"
@@ -1273,7 +1274,13 @@ static void intel_panic_flush(struct drm_plane *plan=
e)
=20
/* Don't disable tiling if it's the fbdev framebuffer.*/
if (to_intel_framebuffer(fb) =3D=3D intel_fbdev_framebuffer(display->fbde=
v.fbdev)) {
+ struct intel_frontbuffer *front =3D to_intel_frontbuffer(fb);
+ struct drm_gem_object *obj =3D intel_fb_bo(fb);
+
+ intel_bo_flush_if_display(obj);
+ intel_frontbuffer_flush(front, ORIGIN_DIRTYFB);
return;
+ }
=20
if (fb->modifier && iplane->disable_tiling)
iplane->disable_tiling(iplane);
--=20
2.49.0
From nobody Fri May 9 13:49:38 2025
Received: from us-smtp-delivery-124.mimecast.com
(us-smtp-delivery-124.mimecast.com [170.10.129.124])
(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))
(No client certificate requested)
by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3195A204088
for <linux-kernel@vger.kernel.org>; Tue, 1 Apr 2025 12:59:13 +0000 (UTC)
Authentication-Results: smtp.subspace.kernel.org;
arc=none smtp.client-ip=170.10.129.124
ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;
t=1743512355; cv=none;
b=W2ysKjoiDRQc0I/2gGrW34q29cJ3k7liJys1KF6OODzSCOBL1NHb/S1AqESmCHpLQkGBMWDi9Xn9r0pRRHlVI1kUGRa7SQRsXd3AvkyHqqoOYdP6ioiOkFeXbWinq4phQAFYmIb5l3Xb3H6d+RL+l+H0ImN1crUXurD5pPz9A/s=
ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org;
s=arc-20240116; t=1743512355; c=relaxed/simple;
bh=V1nQVeORuC9BvTX8c+ryBQapcntMaMaicFqaIVVAX8w=;
h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:
MIME-Version;
b=jZv9KwxF85+G2HlvqrJyctn3EJLkMocPzGxqMOpuTwzFMEH4M7BgD6fYUaTWx1G9oxj2DWQNKwioWZaeTzqgK8y1QQNcSXCw7CskSL43P1FGVP/7bv/SB1azLudjKatak49ddXSTvU8bbv4ts2E32QI3DErS2ET3pKIJAqPWf9I=
ARC-Authentication-Results: i=1; smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com;
spf=pass smtp.mailfrom=redhat.com;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b=Hj1B+GT0; arc=none smtp.client-ip=170.10.129.124
Authentication-Results: smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
spf=pass smtp.mailfrom=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b="Hj1B+GT0"
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;
s=mimecast20190719; t=1743512353;
h=from:from:reply-to:subject:subject:date:date:message-id:message-id:
to:to:cc:cc:mime-version:mime-version:
content-transfer-encoding:content-transfer-encoding:
in-reply-to:in-reply-to:references:references;
bh=zioQXFR45W76brR5mzFjXRn1PUWkxy9iylc9xogw/Xg=;
b=Hj1B+GT0HdBBBPntnLAoaN34xFGuFb0awNc2IM/XsJQjs/KPwEJaDOJg9qmNocAebxWKnK
2HANLbA2b1zgF+PAB0t1hJo46vkOKrL26zgSWj6Er62bKGM8Rk2LCWa4mRe+ef52lWhw1e
WviVWZH8zu/PZJH/pUHoysPfTlb2Mcw=
Received: from mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com
(ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by
relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3,
cipher=TLS_AES_256_GCM_SHA384) id us-mta-393-dJNTKICTMjKXQ1mNQVmrcA-1; Tue,
01 Apr 2025 08:59:09 -0400
X-MC-Unique: dJNTKICTMjKXQ1mNQVmrcA-1
X-Mimecast-MFC-AGG-ID: dJNTKICTMjKXQ1mNQVmrcA_1743512348
Received: from mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com
(mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.15])
(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)
key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest
SHA256)
(No client certificate requested)
by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS
id 3C0E91955BC6;
Tue, 1 Apr 2025 12:59:08 +0000 (UTC)
Received: from hydra.redhat.com (unknown [10.44.32.206])
by mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP
id 02DA11956094;
Tue, 1 Apr 2025 12:59:02 +0000 (UTC)
From: Jocelyn Falempe <jfalempe@redhat.com>
To: Jani Nikula <jani.nikula@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Tvrtko Ursulin <tursulin@ursulin.net>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org,
dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Subject: [PATCH v6 7/8] drm/i915/display: Add drm_panic support for Y-tiling
with DPT
Date: Tue, 1 Apr 2025 14:51:13 +0200
Message-ID: <20250401125818.333033-8-jfalempe@redhat.com>
In-Reply-To: <20250401125818.333033-1-jfalempe@redhat.com>
References: <20250401125818.333033-1-jfalempe@redhat.com>
Precedence: bulk
X-Mailing-List: linux-kernel@vger.kernel.org
List-Id: <linux-kernel.vger.kernel.org>
List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
X-Scanned-By: MIMEDefang 3.0 on 10.30.177.15
Content-Type: text/plain; charset="utf-8"
On Alder Lake and later, it's not possible to disable tiling when DPT
is enabled.
So this commit implements Y-Tiling support, to still be able to draw
the panic screen.
Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 69 ++++++++++++++++++-
.../drm/i915/display/skl_universal_plane.c | 15 ++--
2 files changed, 77 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gp=
u/drm/i915/display/intel_atomic_plane.c
index 5dc880b963fd..76c10555c10e 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -1262,6 +1262,33 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
*/
static struct iosys_map panic_map;
=20
+/* Handle Y-tiling, only if DPT is enabled (otherwise disabling tiling is =
easier)
+ * All DPT hardware have 128-bytes width tiling, so Y-tile dimension is 32=
x32
+ * pixels for 32bits pixels.
+ */
+#define YTILE_WIDTH 32
+#define YTILE_HEIGHT 32
+#define YTILE_SIZE (YTILE_WIDTH * YTILE_HEIGHT * 4)
+
+static void intel_ytile_set_pixel(struct drm_scanout_buffer *sb, unsigned =
int x, unsigned int y,
+ u32 color)
+{
+ u32 offset;
+ unsigned int swizzle;
+ unsigned int width_in_blocks =3D DIV_ROUND_UP(sb->width, 32);
+
+ /* Block offset */
+ offset =3D ((y / YTILE_HEIGHT) * width_in_blocks + (x / YTILE_WIDTH)) * Y=
TILE_SIZE;
+
+ x =3D x % YTILE_WIDTH;
+ y =3D y % YTILE_HEIGHT;
+
+ /* bit order inside a block is x4 x3 x2 y4 y3 y2 y1 y0 x1 x0 */
+ swizzle =3D (x & 3) | ((y & 0x1f) << 2) | ((x & 0x1c) << 5);
+ offset +=3D swizzle * 4;
+ iosys_map_wr(&sb->map[0], offset, u32, color);
+}
+
static void intel_panic_flush(struct drm_plane *plane)
{
struct intel_plane_state *plane_state =3D to_intel_plane_state(plane->sta=
te);
@@ -1286,6 +1313,34 @@ static void intel_panic_flush(struct drm_plane *plan=
e)
iplane->disable_tiling(iplane);
}
=20
+static void (*intel_get_tiling_func(u64 fb_modifier))(struct drm_scanout_b=
uffer *sb, unsigned int x,
+ unsigned int y, u32 color)
+{
+ switch (fb_modifier) {
+ case I915_FORMAT_MOD_Y_TILED:
+ case I915_FORMAT_MOD_Y_TILED_CCS:
+ case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
+ case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
+ case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
+ return intel_ytile_set_pixel;
+ case I915_FORMAT_MOD_X_TILED:
+ case I915_FORMAT_MOD_4_TILED:
+ case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
+ case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
+ case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
+ case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS:
+ case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC:
+ case I915_FORMAT_MOD_4_TILED_MTL_MC_CCS:
+ case I915_FORMAT_MOD_4_TILED_BMG_CCS:
+ case I915_FORMAT_MOD_4_TILED_LNL_CCS:
+ case I915_FORMAT_MOD_Yf_TILED:
+ case I915_FORMAT_MOD_Yf_TILED_CCS:
+ default:
+ /* Not supported yet */
+ return NULL;
+ }
+}
+
static int intel_get_scanout_buffer(struct drm_plane *plane,
struct drm_scanout_buffer *sb)
{
@@ -1308,8 +1363,13 @@ static int intel_get_scanout_buffer(struct drm_plane=
*plane,
intel_fbdev_get_map(display->fbdev.fbdev, &panic_map);
} else {
/* Can't disable tiling if DPT is in use */
- if (intel_fb_uses_dpt(fb))
- return -EOPNOTSUPP;
+ if (intel_fb_uses_dpt(fb)) {
+ if (fb->format->cpp[0] !=3D 4)
+ return -EOPNOTSUPP;
+ sb->set_pixel =3D intel_get_tiling_func(fb->modifier);
+ if (!sb->set_pixel)
+ return -EOPNOTSUPP;
+ }
=20
intel_bo_panic_map(obj, &panic_map);
}
@@ -1319,7 +1379,10 @@ static int intel_get_scanout_buffer(struct drm_plane=
*plane,
sb->map[0] =3D panic_map;
sb->width =3D fb->width;
sb->height =3D fb->height;
- sb->format =3D fb->format;
+ /* Use the generic linear format, because tiling, RC, CCS, CC
+ * will be disabled in disable_tiling()
+ */
+ sb->format =3D drm_format_info(fb->format->format);
sb->pitch[0] =3D fb->pitches[0];
=20
return 0;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/g=
pu/drm/i915/display/skl_universal_plane.c
index 64a1e8e7122d..9d84e9aecd93 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2794,15 +2794,22 @@ static void skl_disable_tiling(struct intel_plane *=
plane)
{
struct intel_plane_state *state =3D to_intel_plane_state(plane->base.stat=
e);
struct intel_display *display =3D to_intel_display(plane);
- u32 stride =3D state->view.color_plane[0].scanout_stride / 64;
+ const struct drm_framebuffer *fb =3D state->hw.fb;
u32 plane_ctl;
=20
plane_ctl =3D intel_de_read(display, PLANE_CTL(plane->pipe, plane->id));
- plane_ctl &=3D ~PLANE_CTL_TILED_MASK;
=20
- intel_de_write_fw(display, PLANE_STRIDE(plane->pipe, plane->id),
- PLANE_STRIDE_(stride));
+ if (intel_fb_uses_dpt(fb)) {
+ /* if DPT is enabled, keep tiling, but disable compression */
+ plane_ctl &=3D ~PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;
+ } else {
+ /* if DPT is not supported, disable tiling, and update stride */
+ u32 stride =3D state->view.color_plane[0].scanout_stride / 64;
=20
+ plane_ctl &=3D ~PLANE_CTL_TILED_MASK;
+ intel_de_write_fw(display, PLANE_STRIDE(plane->pipe, plane->id),
+ PLANE_STRIDE_(stride));
+ }
intel_de_write_fw(display, PLANE_CTL(plane->pipe, plane->id), plane_ctl);
=20
intel_de_write_fw(display, PLANE_SURF(plane->pipe, plane->id),
--=20
2.49.0
From nobody Fri May 9 13:49:38 2025
Received: from us-smtp-delivery-124.mimecast.com
(us-smtp-delivery-124.mimecast.com [170.10.133.124])
(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))
(No client certificate requested)
by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2715020458B
for <linux-kernel@vger.kernel.org>; Tue, 1 Apr 2025 12:59:19 +0000 (UTC)
Authentication-Results: smtp.subspace.kernel.org;
arc=none smtp.client-ip=170.10.133.124
ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;
t=1743512361; cv=none;
b=DYJdRoEmaE1Pk+g3U9snxEf1kdR1HtnRw7Fm5juMkuzSZrLrvOepuTSFT7L90nhzOV1DslhVt9GRCjz96DrtIywEzOqNy4L9Ggwe4UosKLrwILFvVrA/laXugn/IRXVZPCnZpmo7AJEAS5sgjy6YR0yPXJKq12UMQA7YWAHn0GY=
ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org;
s=arc-20240116; t=1743512361; c=relaxed/simple;
bh=vij+eg+HoIyKPFNQ6ksMWa1LqriM7MQpY38tfM+d7Vo=;
h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:
MIME-Version;
b=BYIAthGwyN9ZYH0AWEsMmzBGlPpNSyMsqbnJPr2NF7tja6DXFX9TwSu4zXkBB9XmKOcHlpU6ult+Na55hoq+lV7MBSIE+OCrS/pAb0IqzI6rdAxZqdnjR6F2pJPjESFtXxOEa3CSUKS0xgIjyFxQLJ3UZSYuNynjxpRCw4XnsHM=
ARC-Authentication-Results: i=1; smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com;
spf=pass smtp.mailfrom=redhat.com;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b=HDtCAghC; arc=none smtp.client-ip=170.10.133.124
Authentication-Results: smtp.subspace.kernel.org;
dmarc=pass (p=quarantine dis=none) header.from=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
spf=pass smtp.mailfrom=redhat.com
Authentication-Results: smtp.subspace.kernel.org;
dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com
header.b="HDtCAghC"
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;
s=mimecast20190719; t=1743512359;
h=from:from:reply-to:subject:subject:date:date:message-id:message-id:
to:to:cc:cc:mime-version:mime-version:
content-transfer-encoding:content-transfer-encoding:
in-reply-to:in-reply-to:references:references;
bh=4T5YZzFJVFoHxFGDPwj28D6xxyWc9uUCeJgRzddCMdE=;
b=HDtCAghC91tQqPWRGzIDfSF7WE/XhIZWDwQUiA96NTUVffx41Qo08ObwhyJ1zMVVUHYPCz
ynpv5jwlzH46eFpYamW4gLBWJJ5vC9M3vY82Jnwdch86PTQ+WFfqRMkoUx8C26X/w2zK7x
Mg73RwYtZiTyhq5Q0kTdQAy5bFGZXe4=
Received: from mx-prod-mc-02.mail-002.prod.us-west-2.aws.redhat.com
(ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by
relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3,
cipher=TLS_AES_256_GCM_SHA384) id us-mta-54-WXLNX-uMPlipBAMXdygAJQ-1; Tue,
01 Apr 2025 08:59:15 -0400
X-MC-Unique: WXLNX-uMPlipBAMXdygAJQ-1
X-Mimecast-MFC-AGG-ID: WXLNX-uMPlipBAMXdygAJQ_1743512354
Received: from mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com
(mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.15])
(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)
key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest
SHA256)
(No client certificate requested)
by mx-prod-mc-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS
id 53B481956087;
Tue, 1 Apr 2025 12:59:14 +0000 (UTC)
Received: from hydra.redhat.com (unknown [10.44.32.206])
by mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP
id C64871956094;
Tue, 1 Apr 2025 12:59:08 +0000 (UTC)
From: Jocelyn Falempe <jfalempe@redhat.com>
To: Jani Nikula <jani.nikula@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Tvrtko Ursulin <tursulin@ursulin.net>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org,
dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Subject: [PATCH v6 8/8] drm/i915/display: Add drm_panic support for 4-tiling
with DPT
Date: Tue, 1 Apr 2025 14:51:14 +0200
Message-ID: <20250401125818.333033-9-jfalempe@redhat.com>
In-Reply-To: <20250401125818.333033-1-jfalempe@redhat.com>
References: <20250401125818.333033-1-jfalempe@redhat.com>
Precedence: bulk
X-Mailing-List: linux-kernel@vger.kernel.org
List-Id: <linux-kernel.vger.kernel.org>
List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
X-Scanned-By: MIMEDefang 3.0 on 10.30.177.15
Content-Type: text/plain; charset="utf-8"
On Alder Lake and later, it's not possible to disable tiling when DPT
is enabled.
So this commit implements 4-Tiling support, to still be able to draw
the panic screen.
Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 22 ++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gp=
u/drm/i915/display/intel_atomic_plane.c
index 76c10555c10e..68deffe3aa9a 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -1289,6 +1289,25 @@ static void intel_ytile_set_pixel(struct drm_scanout=
_buffer *sb, unsigned int x,
iosys_map_wr(&sb->map[0], offset, u32, color);
}
=20
+static void intel_4tile_set_pixel(struct drm_scanout_buffer *sb, unsigned =
int x, unsigned int y,
+ u32 color)
+{
+ u32 offset;
+ unsigned int swizzle;
+ unsigned int width_in_blocks =3D DIV_ROUND_UP(sb->width, 32);
+
+ /* Block offset */
+ offset =3D ((y / YTILE_HEIGHT) * width_in_blocks + (x / YTILE_WIDTH)) * Y=
TILE_SIZE;
+
+ x =3D x % YTILE_WIDTH;
+ y =3D y % YTILE_HEIGHT;
+
+ /* bit order inside a block is y4 y3 x4 y2 x3 x2 y1 y0 x1 x0 */
+ swizzle =3D (x & 3) | ((y & 3) << 2) | ((x & 0xc) << 2) | (y & 4) << 4 | =
((x & 0x10) << 3) | ((y & 0x18) << 5);
+ offset +=3D swizzle * 4;
+ iosys_map_wr(&sb->map[0], offset, u32, color);
+}
+
static void intel_panic_flush(struct drm_plane *plane)
{
struct intel_plane_state *plane_state =3D to_intel_plane_state(plane->sta=
te);
@@ -1323,7 +1342,6 @@ static void (*intel_get_tiling_func(u64 fb_modifier))=
(struct drm_scanout_buffer
case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
return intel_ytile_set_pixel;
- case I915_FORMAT_MOD_X_TILED:
case I915_FORMAT_MOD_4_TILED:
case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
@@ -1333,6 +1351,8 @@ static void (*intel_get_tiling_func(u64 fb_modifier))=
(struct drm_scanout_buffer
case I915_FORMAT_MOD_4_TILED_MTL_MC_CCS:
case I915_FORMAT_MOD_4_TILED_BMG_CCS:
case I915_FORMAT_MOD_4_TILED_LNL_CCS:
+ return intel_4tile_set_pixel;
+ case I915_FORMAT_MOD_X_TILED:
case I915_FORMAT_MOD_Yf_TILED:
case I915_FORMAT_MOD_Yf_TILED_CCS:
default:
--=20
2.49.0