From nobody Tue Feb 10 02:46:32 2026 Received: from mail-m155101.qiye.163.com (mail-m155101.qiye.163.com [101.71.155.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9021753AC; Tue, 1 Apr 2025 12:00:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=101.71.155.101 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743508832; cv=none; b=YxXBuU1sLWUmkN0WMmsGJF5Z5grfT5hVeIE3OC0aDO2b4tawvbcmBCqNn9wCstUKXpAgcna3sRdT70J/9OqbK8jObcmCsBV2y1iZ7xvn2/2ss0pMQEqAZrOiIH+mxOm1kmQP2L0dbh9hcVw35ZJ4ptb8/+sUNcz0HInKZxfS5DU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743508832; c=relaxed/simple; bh=VaAz2jkWAhWyt0qXo6HfmJwinwx6QtD4gNZRR78qjzU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=d5/EiztLCzZvdytZfzdrqLAwwT8aDl8GNnpU17ZczWAF5fLWo6IQCEh5DxlJln1H3Gev9wUIgoSHcvnNxgj8ahcYQOso1mhQqgYEsmHEMaRvHOt2H+r7ZbNaijqf6y6OhaRykfS6Bbe7XAPRj5YxM8JIarsSyQqL3ZsglqickVo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=101.71.155.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from amadeus-Vostro-3710.lan (unknown [IPV6:240e:3b3:2c00:430:ae31:3177:4f09:da96]) by smtp.qiye.163.com (Hmail) with ESMTP id 1053fa3f0; Tue, 1 Apr 2025 20:00:25 +0800 (GMT+08:00) From: Chukun Pan To: Heiko Stuebner Cc: Yao Zi , Rob Herring , Chukun Pan , Jonas Karlman , Conor Dooley , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 1/2] arm64: dts: rockchip: Add pwm nodes for RK3528 Date: Tue, 1 Apr 2025 20:00:19 +0800 Message-Id: <20250401120020.976343-2-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250401120020.976343-1-amadeus@jmu.edu.cn> References: <20250401120020.976343-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlCGUJOVkpJSEhMSkIYGBhLTFYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlJT0seQUgZSEFJGEtLQU9IS0EaHkhKQUhKTExBTx1LQkEfGkJNWVdZFhoPEh UdFFlBWU9LSFVKS0hKTkxOVUpLS1VKQktLWQY+ X-HM-Tid: 0a95f13964c103a2kunm1053fa3f0 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6OjI6Fjo4HjJICwoUTD0pMBI2 DiNPCjZVSlVKTE9ITktDQ0lNS0NNVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUlP Sx5BSBlIQUkYS0tBT0hLQRoeSEpBSEpMTEFPHUtCQR8aQk1ZV1kIAVlBSENITzcG Content-Type: text/plain; charset="utf-8" Add pwm nodes for RK3528. The PWM core on RK3528 is the same as RK3328, but the driver does not support interrupts yet. Signed-off-by: Chukun Pan Reviewed-by: Jonas Karlman --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 80 ++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts= /rockchip/rk3528.dtsi index 35704d0be37a..47d4f63f11d3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -465,6 +465,86 @@ uart7: serial@ffa28000 { status =3D "disabled"; }; =20 + pwm0: pwm@ffa90000 { + compatible =3D "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg =3D <0x0 0xffa90000 0x0 0x10>; + clocks =3D <&cru CLK_PWM0>, <&cru PCLK_PWM0>; + clock-names =3D "pwm", "pclk"; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + + pwm1: pwm@ffa90010 { + compatible =3D "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg =3D <0x0 0xffa90010 0x0 0x10>; + clocks =3D <&cru CLK_PWM0>, <&cru PCLK_PWM0>; + clock-names =3D "pwm", "pclk"; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + + pwm2: pwm@ffa90020 { + compatible =3D "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg =3D <0x0 0xffa90020 0x0 0x10>; + clocks =3D <&cru CLK_PWM0>, <&cru PCLK_PWM0>; + clock-names =3D "pwm", "pclk"; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + + pwm3: pwm@ffa90030 { + compatible =3D "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg =3D <0x0 0xffa90030 0x0 0x10>; + clocks =3D <&cru CLK_PWM0>, <&cru PCLK_PWM0>; + clock-names =3D "pwm", "pclk"; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + + pwm4: pwm@ffa98000 { + compatible =3D "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg =3D <0x0 0xffa98000 0x0 0x10>; + clocks =3D <&cru CLK_PWM1>, <&cru PCLK_PWM1>; + clock-names =3D "pwm", "pclk"; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + + pwm5: pwm@ffa98010 { + compatible =3D "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg =3D <0x0 0xffa98010 0x0 0x10>; + clocks =3D <&cru CLK_PWM1>, <&cru PCLK_PWM1>; + clock-names =3D "pwm", "pclk"; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + + pwm6: pwm@ffa98020 { + compatible =3D "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg =3D <0x0 0xffa98020 0x0 0x10>; + clocks =3D <&cru CLK_PWM1>, <&cru PCLK_PWM1>; + clock-names =3D "pwm", "pclk"; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + + pwm7: pwm@ffa98030 { + compatible =3D "rockchip,rk3528-pwm", + "rockchip,rk3328-pwm"; + reg =3D <0x0 0xffa98030 0x0 0x10>; + clocks =3D <&cru CLK_PWM1>, <&cru PCLK_PWM1>; + clock-names =3D "pwm", "pclk"; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + saradc: adc@ffae0000 { compatible =3D "rockchip,rk3528-saradc"; reg =3D <0x0 0xffae0000 0x0 0x10000>; --=20 2.25.1