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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
asahi@lists.linux.dev
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Janne Grunau <j@jannau.net>,
Hector Martin <marcan@marcan.st>,
Sven Peter <sven@svenpeter.dev>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
=?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: [PATCH v3 01/13] PCI: apple: Set only available ports up
Date: Tue, 1 Apr 2025 10:17:01 +0100
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From: Janne Grunau <j@jannau.net>
Iterating over disabled ports results in of_irq_parse_raw() parsing
the wrong "interrupt-map" entries, as it takes the status of the node
into account.
This became apparent after disabling unused PCIe ports in the Apple
Silicon device trees instead of deleting them.
Switching from for_each_child_of_node() to for_each_available_child_of_node=
()
solves this issue.
Link: https://lore.kernel.org/asahi/20230214-apple_dts_pcie_disable_unused-=
v1-0-5ea0d3ddcde3@jannau.net/
Link: https://lore.kernel.org/asahi/1ea2107a-bb86-8c22-0bbc-82c453ab08ce@li=
naro.org/
Fixes: 1e33888fbe44 ("PCI: apple: Add initial hardware bring-up")
Fixes: a0189fdfb73d ("arm64: dts: apple: t8103: Disable unused PCIe ports")
Cc: stable@vger.kernel.org
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/controller/pcie-apple.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p=
cie-apple.c
index a7e51bc1c2fe8..842f8cee7c868 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -755,7 +755,7 @@ static int apple_pcie_init(struct pci_config_window *cf=
g)
if (ret)
return ret;
=20
- for_each_child_of_node(dev->of_node, of_port) {
+ for_each_available_child_of_node(dev->of_node, of_port) {
ret =3D apple_pcie_setup_port(pcie, of_port);
if (ret) {
dev_err(pcie->dev, "Port %pOF setup fail: %d\n", of_port, ret);
--=20
2.39.2
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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
asahi@lists.linux.dev
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Janne Grunau <j@jannau.net>,
Hector Martin <marcan@marcan.st>,
Sven Peter <sven@svenpeter.dev>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
=?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: [PATCH v3 02/13] dt-bindings: pci: apple,pcie: Add t6020 compatible
string
Date: Tue, 1 Apr 2025 10:17:02 +0100
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From: Alyssa Rosenzweig <alyssa@rosenzweig.io>
t6020 adds some register ranges compared to t8103, so requires
a new compatible as well as the new PHY registers.
Thanks to Mark and Rob for their helpful suggestions in updating
the binding.
Suggested-by: Mark Kettenis <mark.kettenis@xs4all.nl>
Suggested-by: Rob Herring <robh@kernel.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
[maz: added PHY registers, constraints]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Mark Kettenis <mark.kettenis@xs4all.nl>
---
.../devicetree/bindings/pci/apple,pcie.yaml | 33 +++++++++++++++----
1 file changed, 26 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Docume=
ntation/devicetree/bindings/pci/apple,pcie.yaml
index c8775f9cb0713..c0852be04f6de 100644
--- a/Documentation/devicetree/bindings/pci/apple,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
@@ -17,6 +17,10 @@ description: |
implements its root ports. But the ATU found on most DesignWare
PCIe host bridges is absent.
=20
+ On systems derived from T602x, the PHY registers are in a region
+ separate from the port registers. In that case, there is one PHY
+ register range per port register range.
+
All root ports share a single ECAM space, but separate GPIOs are
used to take the PCI devices on those ports out of reset. Therefore
the standard "reset-gpios" and "max-link-speed" properties appear on
@@ -30,16 +34,18 @@ description: |
=20
properties:
compatible:
- items:
- - enum:
- - apple,t8103-pcie
- - apple,t8112-pcie
- - apple,t6000-pcie
- - const: apple,pcie
+ oneOf:
+ - items:
+ - enum:
+ - apple,t8103-pcie
+ - apple,t8112-pcie
+ - apple,t6000-pcie
+ - const: apple,pcie
+ - const: apple,t6020-pcie
=20
reg:
minItems: 3
- maxItems: 6
+ maxItems: 10
=20
reg-names:
minItems: 3
@@ -50,6 +56,10 @@ properties:
- const: port1
- const: port2
- const: port3
+ - const: phy0
+ - const: phy1
+ - const: phy2
+ - const: phy3
=20
ranges:
minItems: 2
@@ -98,6 +108,15 @@ allOf:
maxItems: 5
interrupts:
maxItems: 3
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: apple,t6020-pcie
+ then:
+ properties:
+ reg-names:
+ minItems: 10
=20
examples:
- |
--=20
2.39.2
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Tue, 01 Apr 2025 10:17:35 +0100
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
asahi@lists.linux.dev
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Janne Grunau <j@jannau.net>,
Hector Martin <marcan@marcan.st>,
Sven Peter <sven@svenpeter.dev>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
=?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: [PATCH v3 03/13] PCI: host-generic: Extract an ecam bridge creation
helper from pci_host_common_probe()
Date: Tue, 1 Apr 2025 10:17:03 +0100
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j@jannau.net, marcan@marcan.st, sven@svenpeter.dev, bhelgaas@google.com,
lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org,
robh@kernel.org, krzk+dt@kernel.org, mark.kettenis@xs4all.nl
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pci_host_common_probe() is an extremely userful helper, as it
abstracts away most of the gunk that a "mostly-ECAM-compliant"
device driver needs.
However, it is structured as a probe function, meaning that a lot
of the driver-specific setup has to happen in a .init() callback,
after the bridge and config space have been instantiated.
This is a bit awkward, and results in a number of convolutions
that could be avoided if the host-common code was more like
a library.
Introduce a pci_host_common_init() helper that does exactly that,
taking the platform device and a struct pci_ecam_op as parameters.
This can then be called from the probe routine, and a lot of the
code that isn't relevant to PCI setup moved away from the .init()
callback. This also removes the dependency on the device match
data, which is an oddity.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/controller/pci-host-common.c | 24 ++++++++++++++++--------
include/linux/pci-ecam.h | 2 ++
2 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/drivers/pci/controller/pci-host-common.c b/drivers/pci/control=
ler/pci-host-common.c
index f441bfd6f96a8..466a1e6a7ffcd 100644
--- a/drivers/pci/controller/pci-host-common.c
+++ b/drivers/pci/controller/pci-host-common.c
@@ -49,23 +49,17 @@ static struct pci_config_window *gen_pci_init(struct de=
vice *dev,
return cfg;
}
=20
-int pci_host_common_probe(struct platform_device *pdev)
+int pci_host_common_init(struct platform_device *pdev,
+ const struct pci_ecam_ops *ops)
{
struct device *dev =3D &pdev->dev;
struct pci_host_bridge *bridge;
struct pci_config_window *cfg;
- const struct pci_ecam_ops *ops;
-
- ops =3D of_device_get_match_data(&pdev->dev);
- if (!ops)
- return -ENODEV;
=20
bridge =3D devm_pci_alloc_host_bridge(dev, 0);
if (!bridge)
return -ENOMEM;
=20
- platform_set_drvdata(pdev, bridge);
-
of_pci_check_probe_only();
=20
/* Parse and map our Configuration Space windows */
@@ -73,6 +67,8 @@ int pci_host_common_probe(struct platform_device *pdev)
if (IS_ERR(cfg))
return PTR_ERR(cfg);
=20
+ platform_set_drvdata(pdev, bridge);
+
bridge->sysdata =3D cfg;
bridge->ops =3D (struct pci_ops *)&ops->pci_ops;
bridge->enable_device =3D ops->enable_device;
@@ -81,6 +77,18 @@ int pci_host_common_probe(struct platform_device *pdev)
=20
return pci_host_probe(bridge);
}
+EXPORT_SYMBOL_GPL(pci_host_common_init);
+
+int pci_host_common_probe(struct platform_device *pdev)
+{
+ const struct pci_ecam_ops *ops;
+
+ ops =3D of_device_get_match_data(&pdev->dev);
+ if (!ops)
+ return -ENODEV;
+
+ return pci_host_common_init(pdev, ops);
+}
EXPORT_SYMBOL_GPL(pci_host_common_probe);
=20
void pci_host_common_remove(struct platform_device *pdev)
diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h
index 3a10f8cfc3ad5..bc2ca2c72ee23 100644
--- a/include/linux/pci-ecam.h
+++ b/include/linux/pci-ecam.h
@@ -97,6 +97,8 @@ extern const struct pci_ecam_ops loongson_pci_ecam_ops; /=
* Loongson PCIe */
#if IS_ENABLED(CONFIG_PCI_HOST_COMMON)
/* for DT-based PCI controllers that support ECAM */
int pci_host_common_probe(struct platform_device *pdev);
+int pci_host_common_init(struct platform_device *pdev,
+ const struct pci_ecam_ops *ops);
void pci_host_common_remove(struct platform_device *pdev);
#endif
#endif
--=20
2.39.2
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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
asahi@lists.linux.dev
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Janne Grunau <j@jannau.net>,
Hector Martin <marcan@marcan.st>,
Sven Peter <sven@svenpeter.dev>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
=?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: [PATCH v3 04/13] PCI: ecam: Allow cfg->priv to be pre-populated from
the root port device
Date: Tue, 1 Apr 2025 10:17:04 +0100
Message-Id: <20250401091713.2765724-5-maz@kernel.org>
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In order to decouple ecam config space creation from probing via
pci_host_common_probe(), allow the private pointer to be populated
via the device drvdata pointer.
Crucially, this is set before calling ops->init(), allowing that
particular callback to have access to probe data.
This should have no impact on existing code which ignores the
current value of cfg->priv.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/ecam.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pci/ecam.c b/drivers/pci/ecam.c
index 260b7de2dbd57..2c5e6446e00ee 100644
--- a/drivers/pci/ecam.c
+++ b/drivers/pci/ecam.c
@@ -84,6 +84,8 @@ struct pci_config_window *pci_ecam_create(struct device *=
dev,
goto err_exit_iomap;
}
=20
+ cfg->priv =3D dev_get_drvdata(dev);
+
if (ops->init) {
err =3D ops->init(cfg);
if (err)
--=20
2.39.2
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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
asahi@lists.linux.dev
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
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=?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: [PATCH v3 05/13] PCI: apple: Move over to standalone probing
Date: Tue, 1 Apr 2025 10:17:05 +0100
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Now that we have the required infrastructure, split the Apple PCIe
setup into two categories:
- stuff that has to do with PCI setup stays in the .init() callback
- stuff that is just driver gunk (such as MSI setup) goes into a
probe routine, which will eventually call into the host-common
code
The result is a far more logical setup process.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/controller/pcie-apple.c | 54 ++++++++++++++++-------------
1 file changed, 30 insertions(+), 24 deletions(-)
diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p=
cie-apple.c
index 842f8cee7c868..d07e488051290 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -730,35 +730,15 @@ static void apple_pcie_disable_device(struct pci_host=
_bridge *bridge, struct pci
=20
static int apple_pcie_init(struct pci_config_window *cfg)
{
+ struct apple_pcie *pcie =3D cfg->priv;
struct device *dev =3D cfg->parent;
- struct platform_device *platform =3D to_platform_device(dev);
struct device_node *of_port;
- struct apple_pcie *pcie;
int ret;
=20
- pcie =3D devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
- if (!pcie)
- return -ENOMEM;
-
- pcie->dev =3D dev;
-
- mutex_init(&pcie->lock);
-
- pcie->base =3D devm_platform_ioremap_resource(platform, 1);
- if (IS_ERR(pcie->base))
- return PTR_ERR(pcie->base);
-
- cfg->priv =3D pcie;
- INIT_LIST_HEAD(&pcie->ports);
-
- ret =3D apple_msi_init(pcie);
- if (ret)
- return ret;
-
for_each_available_child_of_node(dev->of_node, of_port) {
ret =3D apple_pcie_setup_port(pcie, of_port);
if (ret) {
- dev_err(pcie->dev, "Port %pOF setup fail: %d\n", of_port, ret);
+ dev_err(dev, "Port %pOF setup fail: %d\n", of_port, ret);
of_node_put(of_port);
return ret;
}
@@ -778,14 +758,40 @@ static const struct pci_ecam_ops apple_pcie_cfg_ecam_=
ops =3D {
}
};
=20
+static int apple_pcie_probe(struct platform_device *pdev)
+{
+ struct device *dev =3D &pdev->dev;
+ struct apple_pcie *pcie;
+ int ret;
+
+ pcie =3D devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
+ if (!pcie)
+ return -ENOMEM;
+
+ pcie->dev =3D dev;
+ pcie->base =3D devm_platform_ioremap_resource(pdev, 1);
+ if (IS_ERR(pcie->base))
+ return PTR_ERR(pcie->base);
+
+ mutex_init(&pcie->lock);
+ INIT_LIST_HEAD(&pcie->ports);
+ dev_set_drvdata(dev, pcie);
+
+ ret =3D apple_msi_init(pcie);
+ if (ret)
+ return ret;
+
+ return pci_host_common_init(pdev, &apple_pcie_cfg_ecam_ops);
+}
+
static const struct of_device_id apple_pcie_of_match[] =3D {
- { .compatible =3D "apple,pcie", .data =3D &apple_pcie_cfg_ecam_ops },
+ { .compatible =3D "apple,pcie" },
{ }
};
MODULE_DEVICE_TABLE(of, apple_pcie_of_match);
=20
static struct platform_driver apple_pcie_driver =3D {
- .probe =3D pci_host_common_probe,
+ .probe =3D apple_pcie_probe,
.driver =3D {
.name =3D "pcie-apple",
.of_match_table =3D apple_pcie_of_match,
--=20
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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
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devicetree@vger.kernel.org,
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Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
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Krzysztof Kozlowski <krzk+dt@kernel.org>,
Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: [PATCH v3 06/13] PCI: apple: Dynamically allocate RID-to_SID bitmap
Date: Tue, 1 Apr 2025 10:17:06 +0100
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As we move towards supporting SoCs with varying RID-to-SID mapping
capabilities, turn the static SID tracking bitmap into a dynamically
allocated one. The current allocation size is still the same, but
that's about to change.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/controller/pcie-apple.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p=
cie-apple.c
index d07e488051290..6d3aa186d9c5f 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -147,7 +147,7 @@ struct apple_pcie_port {
void __iomem *base;
struct irq_domain *domain;
struct list_head entry;
- DECLARE_BITMAP(sid_map, MAX_RID2SID);
+ unsigned long *sid_map;
int sid_map_sz;
int idx;
};
@@ -524,6 +524,10 @@ static int apple_pcie_setup_port(struct apple_pcie *pc=
ie,
if (!port)
return -ENOMEM;
=20
+ port->sid_map =3D devm_bitmap_zalloc(pcie->dev, MAX_RID2SID, GFP_KERNEL);
+ if (!port->sid_map)
+ return -ENOMEM;
+
ret =3D of_property_read_u32_index(np, "reg", 0, &idx);
if (ret)
return ret;
--=20
2.39.2
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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
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Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
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=?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: [PATCH v3 07/13] PCI: apple: Move away from INTMSK{SET,CLR} for INTx
and private interrupts
Date: Tue, 1 Apr 2025 10:17:07 +0100
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T602x seems to have dropped the rather useful SET/CLR accessors
to the masking register.
Instead, let's use the mask register directly, and wrap it with
a brand new spinlock. No, this isn't moving in the right direction.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/controller/pcie-apple.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p=
cie-apple.c
index 6d3aa186d9c5f..6b04bf0b41dcc 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -142,6 +142,7 @@ struct apple_pcie {
};
=20
struct apple_pcie_port {
+ raw_spinlock_t lock;
struct apple_pcie *pcie;
struct device_node *np;
void __iomem *base;
@@ -261,14 +262,16 @@ static void apple_port_irq_mask(struct irq_data *data)
{
struct apple_pcie_port *port =3D irq_data_get_irq_chip_data(data);
=20
- writel_relaxed(BIT(data->hwirq), port->base + PORT_INTMSKSET);
+ guard(raw_spinlock_irqsave)(&port->lock);
+ rmw_set(BIT(data->hwirq), port->base + PORT_INTMSK);
}
=20
static void apple_port_irq_unmask(struct irq_data *data)
{
struct apple_pcie_port *port =3D irq_data_get_irq_chip_data(data);
=20
- writel_relaxed(BIT(data->hwirq), port->base + PORT_INTMSKCLR);
+ guard(raw_spinlock_irqsave)(&port->lock);
+ rmw_clear(BIT(data->hwirq), port->base + PORT_INTMSK);
}
=20
static bool hwirq_is_intx(unsigned int hwirq)
@@ -387,7 +390,7 @@ static int apple_pcie_port_setup_irq(struct apple_pcie_=
port *port)
return -ENOMEM;
=20
/* Disable all interrupts */
- writel_relaxed(~0, port->base + PORT_INTMSKSET);
+ writel_relaxed(~0, port->base + PORT_INTMSK);
writel_relaxed(~0, port->base + PORT_INTSTAT);
=20
irq_set_chained_handler_and_data(irq, apple_port_irq_handler, port);
@@ -537,6 +540,8 @@ static int apple_pcie_setup_port(struct apple_pcie *pci=
e,
port->pcie =3D pcie;
port->np =3D np;
=20
+ raw_spin_lock_init(&port->lock);
+
port->base =3D devm_platform_ioremap_resource(platform, port->idx + 2);
if (IS_ERR(port->base))
return PTR_ERR(port->base);
--=20
2.39.2
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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
asahi@lists.linux.dev
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Janne Grunau <j@jannau.net>,
Hector Martin <marcan@marcan.st>,
Sven Peter <sven@svenpeter.dev>,
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Lorenzo Pieralisi <lpieralisi@kernel.org>,
=?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: [PATCH v3 08/13] PCI: apple: Fix missing OF node reference in
apple_pcie_setup_port
Date: Tue, 1 Apr 2025 10:17:08 +0100
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From: Hector Martin <marcan@marcan.st>
In the success path, we hang onto a reference to the node, so make sure
to grab one. The caller iterator puts our borrowed reference when we
return.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/controller/pcie-apple.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p=
cie-apple.c
index 6b04bf0b41dcc..23d9f62bd2ad4 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -593,6 +593,9 @@ static int apple_pcie_setup_port(struct apple_pcie *pci=
e,
list_add_tail(&port->entry, &pcie->ports);
init_completion(&pcie->event);
=20
+ /* In the success path, we keep a reference to np around */
+ of_node_get(np);
+
ret =3D apple_pcie_port_register_irqs(port);
WARN_ON(ret);
=20
--=20
2.39.2
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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
asahi@lists.linux.dev
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Janne Grunau <j@jannau.net>,
Hector Martin <marcan@marcan.st>,
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Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: [PATCH v3 09/13] PCI: apple: Move port PHY registers to their own reg
items
Date: Tue, 1 Apr 2025 10:17:09 +0100
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From: Hector Martin <marcan@marcan.st>
T602x PCIe cores move these registers around. Instead of hardcoding in
another offset, let's move them into their own reg entries. This matches
what Apple does on macOS device trees too.
Maintains backwards compatibility with old DTs by using the old offsets.
Note that we open code devm_platform_ioremap_resource_byname() to avoid
error messages on older platforms with missing resources in the pcie
node. ("pcie-apple 590000000.pcie: invalid resource (null)" on probe)
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Janne Grunau <j@jannau.net>
Co-developed-by: Janne Grunau <j@jannau.net>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/controller/pcie-apple.c | 55 +++++++++++++++++++----------
1 file changed, 37 insertions(+), 18 deletions(-)
diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p=
cie-apple.c
index 23d9f62bd2ad4..94c49611b74df 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -39,14 +39,18 @@
#define CORE_RC_STAT_READY BIT(0)
#define CORE_FABRIC_STAT 0x04000
#define CORE_FABRIC_STAT_MASK 0x001F001F
-#define CORE_LANE_CFG(port) (0x84000 + 0x4000 * (port))
-#define CORE_LANE_CFG_REFCLK0REQ BIT(0)
-#define CORE_LANE_CFG_REFCLK1REQ BIT(1)
-#define CORE_LANE_CFG_REFCLK0ACK BIT(2)
-#define CORE_LANE_CFG_REFCLK1ACK BIT(3)
-#define CORE_LANE_CFG_REFCLKEN (BIT(9) | BIT(10))
-#define CORE_LANE_CTL(port) (0x84004 + 0x4000 * (port))
-#define CORE_LANE_CTL_CFGACC BIT(15)
+
+#define CORE_PHY_DEFAULT_BASE(port) (0x84000 + 0x4000 * (port))
+
+#define PHY_LANE_CFG 0x00000
+#define PHY_LANE_CFG_REFCLK0REQ BIT(0)
+#define PHY_LANE_CFG_REFCLK1REQ BIT(1)
+#define PHY_LANE_CFG_REFCLK0ACK BIT(2)
+#define PHY_LANE_CFG_REFCLK1ACK BIT(3)
+#define PHY_LANE_CFG_REFCLKEN (BIT(9) | BIT(10))
+#define PHY_LANE_CFG_REFCLKCGEN (BIT(30) | BIT(31))
+#define PHY_LANE_CTL 0x00004
+#define PHY_LANE_CTL_CFGACC BIT(15)
=20
#define PORT_LTSSMCTL 0x00080
#define PORT_LTSSMCTL_START BIT(0)
@@ -146,6 +150,7 @@ struct apple_pcie_port {
struct apple_pcie *pcie;
struct device_node *np;
void __iomem *base;
+ void __iomem *phy;
struct irq_domain *domain;
struct list_head entry;
unsigned long *sid_map;
@@ -476,26 +481,26 @@ static int apple_pcie_setup_refclk(struct apple_pcie =
*pcie,
if (res < 0)
return res;
=20
- rmw_set(CORE_LANE_CTL_CFGACC, pcie->base + CORE_LANE_CTL(port->idx));
- rmw_set(CORE_LANE_CFG_REFCLK0REQ, pcie->base + CORE_LANE_CFG(port->idx));
+ rmw_set(PHY_LANE_CTL_CFGACC, port->phy + PHY_LANE_CTL);
+ rmw_set(PHY_LANE_CFG_REFCLK0REQ, port->phy + PHY_LANE_CFG);
=20
- res =3D readl_relaxed_poll_timeout(pcie->base + CORE_LANE_CFG(port->idx),
- stat, stat & CORE_LANE_CFG_REFCLK0ACK,
+ res =3D readl_relaxed_poll_timeout(port->phy + PHY_LANE_CFG,
+ stat, stat & PHY_LANE_CFG_REFCLK0ACK,
100, 50000);
if (res < 0)
return res;
=20
- rmw_set(CORE_LANE_CFG_REFCLK1REQ, pcie->base + CORE_LANE_CFG(port->idx));
- res =3D readl_relaxed_poll_timeout(pcie->base + CORE_LANE_CFG(port->idx),
- stat, stat & CORE_LANE_CFG_REFCLK1ACK,
+ rmw_set(PHY_LANE_CFG_REFCLK1REQ, port->phy + PHY_LANE_CFG);
+ res =3D readl_relaxed_poll_timeout(port->phy + PHY_LANE_CFG,
+ stat, stat & PHY_LANE_CFG_REFCLK1ACK,
100, 50000);
=20
if (res < 0)
return res;
=20
- rmw_clear(CORE_LANE_CTL_CFGACC, pcie->base + CORE_LANE_CTL(port->idx));
+ rmw_clear(PHY_LANE_CTL_CFGACC, port->phy + PHY_LANE_CTL);
=20
- rmw_set(CORE_LANE_CFG_REFCLKEN, pcie->base + CORE_LANE_CFG(port->idx));
+ rmw_set(PHY_LANE_CFG_REFCLKEN, port->phy + PHY_LANE_CFG);
rmw_set(PORT_REFCLK_EN, port->base + PORT_REFCLK);
=20
return 0;
@@ -515,6 +520,8 @@ static int apple_pcie_setup_port(struct apple_pcie *pci=
e,
struct platform_device *platform =3D to_platform_device(pcie->dev);
struct apple_pcie_port *port;
struct gpio_desc *reset;
+ struct resource *res;
+ char name[16];
u32 stat, idx;
int ret, i;
=20
@@ -542,10 +549,22 @@ static int apple_pcie_setup_port(struct apple_pcie *p=
cie,
=20
raw_spin_lock_init(&port->lock);
=20
- port->base =3D devm_platform_ioremap_resource(platform, port->idx + 2);
+ snprintf(name, sizeof(name), "port%d", port->idx);
+ res =3D platform_get_resource_byname(platform, IORESOURCE_MEM, name);
+ if (!res)
+ res =3D platform_get_resource(platform, IORESOURCE_MEM, port->idx + 2);
+
+ port->base =3D devm_ioremap_resource(&platform->dev, res);
if (IS_ERR(port->base))
return PTR_ERR(port->base);
=20
+ snprintf(name, sizeof(name), "phy%d", port->idx);
+ res =3D platform_get_resource_byname(platform, IORESOURCE_MEM, name);
+ if (res)
+ port->phy =3D devm_ioremap_resource(&platform->dev, res);
+ else
+ port->phy =3D pcie->base + CORE_PHY_DEFAULT_BASE(port->idx);
+
rmw_set(PORT_APPCLK_EN, port->base + PORT_APPCLK);
=20
/* Assert PERST# before setting up the clock */
--=20
2.39.2
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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
asahi@lists.linux.dev
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Janne Grunau <j@jannau.net>,
Hector Martin <marcan@marcan.st>,
Sven Peter <sven@svenpeter.dev>,
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=?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
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Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: [PATCH v3 10/13] PCI: apple: Drop poll for CORE_RC_PHYIF_STAT_REFCLK
Date: Tue, 1 Apr 2025 10:17:10 +0100
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From: Hector Martin <marcan@marcan.st>
This is checking a core refclk in per-port setup which doesn't make a
lot of sense, and the bootloader needs to have gone through this anyway.
It doesn't work on T602x, so just drop it across the board.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/controller/pcie-apple.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p=
cie-apple.c
index 94c49611b74df..c00ec0781fabc 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -475,12 +475,6 @@ static int apple_pcie_setup_refclk(struct apple_pcie *=
pcie,
u32 stat;
int res;
=20
- res =3D readl_relaxed_poll_timeout(pcie->base + CORE_RC_PHYIF_STAT, stat,
- stat & CORE_RC_PHYIF_STAT_REFCLK,
- 100, 50000);
- if (res < 0)
- return res;
-
rmw_set(PHY_LANE_CTL_CFGACC, port->phy + PHY_LANE_CTL);
rmw_set(PHY_LANE_CFG_REFCLK0REQ, port->phy + PHY_LANE_CFG);
=20
--=20
2.39.2
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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
asahi@lists.linux.dev
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
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Hector Martin <marcan@marcan.st>,
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=?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
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Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: [PATCH v3 11/13] PCI: apple: Use gpiod_set_value_cansleep in probe
flow
Date: Tue, 1 Apr 2025 10:17:11 +0100
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From: Hector Martin <marcan@marcan.st>
We're allowed to sleep here, so tell the GPIO core by using
gpiod_set_value_cansleep instead of gpiod_set_value.
Fixes: 1e33888fbe44 ("PCI: apple: Add initial hardware bring-up")
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/controller/pcie-apple.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p=
cie-apple.c
index c00ec0781fabc..505adf64bd66d 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -562,7 +562,7 @@ static int apple_pcie_setup_port(struct apple_pcie *pci=
e,
rmw_set(PORT_APPCLK_EN, port->base + PORT_APPCLK);
=20
/* Assert PERST# before setting up the clock */
- gpiod_set_value(reset, 1);
+ gpiod_set_value_cansleep(reset, 1);
=20
ret =3D apple_pcie_setup_refclk(pcie, port);
if (ret < 0)
@@ -573,7 +573,7 @@ static int apple_pcie_setup_port(struct apple_pcie *pci=
e,
=20
/* Deassert PERST# */
rmw_set(PORT_PERST_OFF, port->base + PORT_PERST);
- gpiod_set_value(reset, 0);
+ gpiod_set_value_cansleep(reset, 0);
=20
/* Wait for 100ms after PERST# deassertion (PCIe r5.0, 6.6.1) */
msleep(100);
--=20
2.39.2
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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
asahi@lists.linux.dev
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Janne Grunau <j@jannau.net>,
Hector Martin <marcan@marcan.st>,
Sven Peter <sven@svenpeter.dev>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
=?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: [PATCH v3 12/13] PCI: apple: Abstract register offsets via a
SoC-specific structure
Date: Tue, 1 Apr 2025 10:17:12 +0100
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From: Hector Martin <marcan@marcan.st>
Newer versions of the Apple PCIe block have a bunch of small, but
annoying differences.
In order to embrace this diversity of implementations, move the
currently hardcoded offsets into a hw_info structure. Future SoCs
will provide their own structure describing the applicable offsets.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
[maz: split from original patch to only address T8103]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/controller/pcie-apple.c | 89 +++++++++++++++++++++++------
1 file changed, 72 insertions(+), 17 deletions(-)
diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p=
cie-apple.c
index 505adf64bd66d..847cba753d28d 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -18,6 +18,7 @@
* Author: Marc Zyngier <maz@kernel.org>
*/
=20
+#include <linux/bitfield.h>
#include <linux/gpio/consumer.h>
#include <linux/kernel.h>
#include <linux/iopoll.h>
@@ -29,6 +30,7 @@
#include <linux/of_irq.h>
#include <linux/pci-ecam.h>
=20
+/* T8103 (original M1) and related SoCs */
#define CORE_RC_PHYIF_CTL 0x00024
#define CORE_RC_PHYIF_CTL_RUN BIT(0)
#define CORE_RC_PHYIF_STAT 0x00028
@@ -104,7 +106,7 @@
#define PORT_REFCLK_CGDIS BIT(8)
#define PORT_PERST 0x00814
#define PORT_PERST_OFF BIT(0)
-#define PORT_RID2SID(i16) (0x00828 + 4 * (i16))
+#define PORT_RID2SID 0x00828
#define PORT_RID2SID_VALID BIT(31)
#define PORT_RID2SID_SID_SHIFT 16
#define PORT_RID2SID_BUS_SHIFT 8
@@ -122,7 +124,8 @@
#define PORT_TUNSTAT_PERST_ACK_PEND BIT(1)
#define PORT_PREFMEM_ENABLE 0x00994
=20
-#define MAX_RID2SID 64
+#define PORT_MSIMAP_ENABLE BIT(31)
+#define PORT_MSIMAP_TARGET GENMASK(7, 0)
=20
/*
* The doorbell address is set to 0xfffff000, which by convention
@@ -133,10 +136,33 @@
*/
#define DOORBELL_ADDR CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR
=20
+struct hw_info {
+ u32 phy_lane_ctl;
+ u32 port_msiaddr;
+ u32 port_msiaddr_hi;
+ u32 port_refclk;
+ u32 port_perst;
+ u32 port_rid2sid;
+ u32 port_msimap;
+ u32 max_rid2sid;
+};
+
+static const struct hw_info t8103_hw =3D {
+ .phy_lane_ctl =3D PHY_LANE_CTL,
+ .port_msiaddr =3D PORT_MSIADDR,
+ .port_msiaddr_hi =3D 0,
+ .port_refclk =3D PORT_REFCLK,
+ .port_perst =3D PORT_PERST,
+ .port_rid2sid =3D PORT_RID2SID,
+ .port_msimap =3D 0,
+ .max_rid2sid =3D 64,
+};
+
struct apple_pcie {
struct mutex lock;
struct device *dev;
void __iomem *base;
+ const struct hw_info *hw;
struct irq_domain *domain;
unsigned long *bitmap;
struct list_head ports;
@@ -380,7 +406,9 @@ static void apple_port_irq_handler(struct irq_desc *des=
c)
static int apple_pcie_port_setup_irq(struct apple_pcie_port *port)
{
struct fwnode_handle *fwnode =3D &port->np->fwnode;
+ struct apple_pcie *pcie =3D port->pcie;
unsigned int irq;
+ u32 val =3D 0;
=20
/* FIXME: consider moving each interrupt under each port */
irq =3D irq_of_parse_and_map(to_of_node(dev_fwnode(port->pcie->dev)),
@@ -402,13 +430,23 @@ static int apple_pcie_port_setup_irq(struct apple_pci=
e_port *port)
=20
/* Configure MSI base address */
BUILD_BUG_ON(upper_32_bits(DOORBELL_ADDR));
- writel_relaxed(lower_32_bits(DOORBELL_ADDR), port->base + PORT_MSIADDR);
+ writel_relaxed(lower_32_bits(DOORBELL_ADDR),
+ port->base + pcie->hw->port_msiaddr);
+ if (pcie->hw->port_msiaddr_hi)
+ writel_relaxed(0, port->base + pcie->hw->port_msiaddr_hi);
=20
/* Enable MSIs, shared between all ports */
- writel_relaxed(0, port->base + PORT_MSIBASE);
- writel_relaxed((ilog2(port->pcie->nvecs) << PORT_MSICFG_L2MSINUM_SHIFT) |
- PORT_MSICFG_EN, port->base + PORT_MSICFG);
+ if (pcie->hw->port_msimap) {
+ for (int i =3D 0; i < pcie->nvecs; i++)
+ writel_relaxed(FIELD_PREP(PORT_MSIMAP_TARGET, i) |
+ PORT_MSIMAP_ENABLE,
+ port->base + pcie->hw->port_msimap + 4 * i);
+ } else {
+ writel_relaxed(0, port->base + PORT_MSIBASE);
+ val =3D ilog2(pcie->nvecs) << PORT_MSICFG_L2MSINUM_SHIFT;
+ }
=20
+ writel_relaxed(val | PORT_MSICFG_EN, port->base + PORT_MSICFG);
return 0;
}
=20
@@ -475,7 +513,9 @@ static int apple_pcie_setup_refclk(struct apple_pcie *p=
cie,
u32 stat;
int res;
=20
- rmw_set(PHY_LANE_CTL_CFGACC, port->phy + PHY_LANE_CTL);
+ if (pcie->hw->phy_lane_ctl)
+ rmw_set(PHY_LANE_CTL_CFGACC, port->phy + pcie->hw->phy_lane_ctl);
+
rmw_set(PHY_LANE_CFG_REFCLK0REQ, port->phy + PHY_LANE_CFG);
=20
res =3D readl_relaxed_poll_timeout(port->phy + PHY_LANE_CFG,
@@ -492,20 +532,28 @@ static int apple_pcie_setup_refclk(struct apple_pcie =
*pcie,
if (res < 0)
return res;
=20
- rmw_clear(PHY_LANE_CTL_CFGACC, port->phy + PHY_LANE_CTL);
+ if (pcie->hw->phy_lane_ctl)
+ rmw_clear(PHY_LANE_CTL_CFGACC, port->phy + pcie->hw->phy_lane_ctl);
=20
rmw_set(PHY_LANE_CFG_REFCLKEN, port->phy + PHY_LANE_CFG);
- rmw_set(PORT_REFCLK_EN, port->base + PORT_REFCLK);
+
+ if (pcie->hw->port_refclk)
+ rmw_set(PORT_REFCLK_EN, port->base + pcie->hw->port_refclk);
=20
return 0;
}
=20
+static void __iomem *port_rid2sid_addr(struct apple_pcie_port *port, int i=
dx)
+{
+ return port->base + port->pcie->hw->port_rid2sid + 4 * idx;
+}
+
static u32 apple_pcie_rid2sid_write(struct apple_pcie_port *port,
int idx, u32 val)
{
- writel_relaxed(val, port->base + PORT_RID2SID(idx));
+ writel_relaxed(val, port_rid2sid_addr(port, idx));
/* Read back to ensure completion of the write */
- return readl_relaxed(port->base + PORT_RID2SID(idx));
+ return readl_relaxed(port_rid2sid_addr(port, idx));
}
=20
static int apple_pcie_setup_port(struct apple_pcie *pcie,
@@ -528,7 +576,7 @@ static int apple_pcie_setup_port(struct apple_pcie *pci=
e,
if (!port)
return -ENOMEM;
=20
- port->sid_map =3D devm_bitmap_zalloc(pcie->dev, MAX_RID2SID, GFP_KERNEL);
+ port->sid_map =3D devm_bitmap_zalloc(pcie->dev, pcie->hw->max_rid2sid, GF=
P_KERNEL);
if (!port->sid_map)
return -ENOMEM;
=20
@@ -572,7 +620,7 @@ static int apple_pcie_setup_port(struct apple_pcie *pci=
e,
usleep_range(100, 200);
=20
/* Deassert PERST# */
- rmw_set(PORT_PERST_OFF, port->base + PORT_PERST);
+ rmw_set(PORT_PERST_OFF, port->base + pcie->hw->port_perst);
gpiod_set_value_cansleep(reset, 0);
=20
/* Wait for 100ms after PERST# deassertion (PCIe r5.0, 6.6.1) */
@@ -585,7 +633,11 @@ static int apple_pcie_setup_port(struct apple_pcie *pc=
ie,
return ret;
}
=20
- rmw_clear(PORT_REFCLK_CGDIS, port->base + PORT_REFCLK);
+ if (pcie->hw->port_refclk)
+ rmw_clear(PORT_REFCLK_CGDIS, port->base + pcie->hw->port_refclk);
+ else
+ rmw_set(PHY_LANE_CFG_REFCLKCGEN, port->phy + PHY_LANE_CFG);
+
rmw_clear(PORT_APPCLK_CGDIS, port->base + PORT_APPCLK);
=20
ret =3D apple_pcie_port_setup_irq(port);
@@ -593,7 +645,7 @@ static int apple_pcie_setup_port(struct apple_pcie *pci=
e,
return ret;
=20
/* Reset all RID/SID mappings, and check for RAZ/WI registers */
- for (i =3D 0; i < MAX_RID2SID; i++) {
+ for (i =3D 0; i < pcie->hw->max_rid2sid; i++) {
if (apple_pcie_rid2sid_write(port, i, 0xbad1d) !=3D 0xbad1d)
break;
apple_pcie_rid2sid_write(port, i, 0);
@@ -741,7 +793,7 @@ static void apple_pcie_disable_device(struct pci_host_b=
ridge *bridge, struct pci
for_each_set_bit(idx, port->sid_map, port->sid_map_sz) {
u32 val;
=20
- val =3D readl_relaxed(port->base + PORT_RID2SID(idx));
+ val =3D readl_relaxed(port_rid2sid_addr(port, idx));
if ((val & 0xffff) =3D=3D rid) {
apple_pcie_rid2sid_write(port, idx, 0);
bitmap_release_region(port->sid_map, idx, 0);
@@ -794,6 +846,9 @@ static int apple_pcie_probe(struct platform_device *pde=
v)
return -ENOMEM;
=20
pcie->dev =3D dev;
+ pcie->hw =3D of_device_get_match_data(dev);
+ if (!pcie->hw)
+ return -ENODEV;
pcie->base =3D devm_platform_ioremap_resource(pdev, 1);
if (IS_ERR(pcie->base))
return PTR_ERR(pcie->base);
@@ -810,7 +865,7 @@ static int apple_pcie_probe(struct platform_device *pde=
v)
}
=20
static const struct of_device_id apple_pcie_of_match[] =3D {
- { .compatible =3D "apple,pcie" },
+ { .compatible =3D "apple,pcie", .data =3D &t8103_hw },
{ }
};
MODULE_DEVICE_TABLE(of, apple_pcie_of_match);
--=20
2.39.2
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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
asahi@lists.linux.dev
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Janne Grunau <j@jannau.net>,
Hector Martin <marcan@marcan.st>,
Sven Peter <sven@svenpeter.dev>,
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Lorenzo Pieralisi <lpieralisi@kernel.org>,
=?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: [PATCH v3 13/13] PCI: apple: Add T602x PCIe support
Date: Tue, 1 Apr 2025 10:17:13 +0100
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From: Hector Martin <marcan@marcan.st>
This version of the hardware moved around a bunch of registers, so we
avoid the old compatible for these and introduce register offset
structures to handle the differences.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/controller/pcie-apple.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p=
cie-apple.c
index 847cba753d28d..5b85d9497070c 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -124,6 +124,13 @@
#define PORT_TUNSTAT_PERST_ACK_PEND BIT(1)
#define PORT_PREFMEM_ENABLE 0x00994
=20
+/* T602x (M2-pro and co) */
+#define PORT_T602X_MSIADDR 0x016c
+#define PORT_T602X_MSIADDR_HI 0x0170
+#define PORT_T602X_PERST 0x082c
+#define PORT_T602X_RID2SID 0x3000
+#define PORT_T602X_MSIMAP 0x3800
+
#define PORT_MSIMAP_ENABLE BIT(31)
#define PORT_MSIMAP_TARGET GENMASK(7, 0)
=20
@@ -158,6 +165,18 @@ static const struct hw_info t8103_hw =3D {
.max_rid2sid =3D 64,
};
=20
+static const struct hw_info t602x_hw =3D {
+ .phy_lane_ctl =3D 0,
+ .port_msiaddr =3D PORT_T602X_MSIADDR,
+ .port_msiaddr_hi =3D PORT_T602X_MSIADDR_HI,
+ .port_refclk =3D 0,
+ .port_perst =3D PORT_T602X_PERST,
+ .port_rid2sid =3D PORT_T602X_RID2SID,
+ .port_msimap =3D PORT_T602X_MSIMAP,
+ /* 16 on t602x, guess for autodetect on future HW */
+ .max_rid2sid =3D 512,
+};
+
struct apple_pcie {
struct mutex lock;
struct device *dev;
@@ -425,6 +444,7 @@ static int apple_pcie_port_setup_irq(struct apple_pcie_=
port *port)
/* Disable all interrupts */
writel_relaxed(~0, port->base + PORT_INTMSK);
writel_relaxed(~0, port->base + PORT_INTSTAT);
+ writel_relaxed(~0, port->base + PORT_LINKCMDSTS);
=20
irq_set_chained_handler_and_data(irq, apple_port_irq_handler, port);
=20
@@ -865,6 +885,7 @@ static int apple_pcie_probe(struct platform_device *pde=
v)
}
=20
static const struct of_device_id apple_pcie_of_match[] =3D {
+ { .compatible =3D "apple,t6020-pcie", .data =3D &t602x_hw },
{ .compatible =3D "apple,pcie", .data =3D &t8103_hw },
{ }
};
--=20
2.39.2