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Fri, 28 Mar 2025 03:59:33 -0700 (PDT) From: Jensen Huang To: Shawn Lin , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Philipp Zabel , Anand Moon Cc: Jensen Huang , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] PCI: rockchip: Fix order of rockchip_pci_core_rsts Date: Fri, 28 Mar 2025 18:58:22 +0800 Message-ID: <20250328105822.3946767-1-jensenhuang@friendlyarm.com> X-Mailer: git-send-email 2.49.0-1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The order of rockchip_pci_core_rsts follows the previous comments suggesting to avoid reordering. However, reset_control_bulk_deassert() applies resets = in reverse, which may lead to the link downgrading to 2.5 GT/s. This patch restores the deassert order and comments for core_rsts, introduc= ed in commit 58c6990c5ee7 ("PCI: rockchip: Improve the deassert sequence of four = reset pins"). Tested on NanoPC-T4 with Samsung 970 Pro. Fixes: 18715931a5c0 ("PCI: rockchip: Simplify reset control handling by usi= ng reset_control_bulk*() function") Signed-off-by: Jensen Huang Acked-by: Shawn Lin Reviewed-by: Anand Moon Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/pcie-rockchip.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controlle= r/pcie-rockchip.h index 11def598534b..4f63a03d535c 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -320,11 +320,15 @@ static const char * const rockchip_pci_pm_rsts[] =3D { "aclk", }; =20 +/* + * Please don't reorder the deassert sequence of the following + * four reset pins. + */ static const char * const rockchip_pci_core_rsts[] =3D { - "mgmt-sticky", - "core", - "mgmt", "pipe", + "mgmt", + "core", + "mgmt-sticky", }; =20 struct rockchip_pcie { --=20 2.49.0-1