From nobody Wed Dec 17 08:56:35 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2AA83190678 for ; Thu, 27 Mar 2025 23:49:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743119345; cv=none; b=fv7EaOQIMPDUJngG9Tr5MuXL6NMfSPQfGiC1nF+lBNHfkH441jX6nRCVNnp4jp+7ISsMPkEaqf/Gi2o+2FZg5wWa0wc8Rxjwn/8+GBl/n7evGPgWKP1sbrXlkStkBrZQ7n/aiwgtdL4A3pOf0VRn0PiOLE+iDOgCz+6Dw24ZMXQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743119345; c=relaxed/simple; bh=uepe58rlJokDRKPexFwxVylPyUYlgTKWcHSYAsLyv24=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=l1/jLxYwQPZGr8EJuEkfzA4bttILe285SCuPy2czU4dZpV54GFDYUAZXLAcXPBlEYvvB0XBt3O1I8FLRxyeeG6cH/2EcajWIbmzgQVLGCSojj72lh+vG6h7HC8UbYt9w2Pw5/E4xlU8qNT+rAzVrX+5+JViiRp2Rsp7pvHbEYcw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=GE4LxAET; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="GE4LxAET" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1743119344; x=1774655344; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uepe58rlJokDRKPexFwxVylPyUYlgTKWcHSYAsLyv24=; b=GE4LxAETAu1H+y0VEwqJ62C/5ZD6HXSErrRh3aqwc+KhCPXtEJwPlcQw JpEVR8lqyWa52igaXJKtKlm1bNqYV/XxLTjh2KPw70rP/8NvROw4GgEYk bCcdHFSN/tFkuZhz9RGe+B4NvWJ+y9yr4IXUm/I1SuwvnT1fMVBOKwnqP 0qeA/du8F2wVJbKsINEnQ4xkFuP488rR9w2Mtyma2/HfyNbahN/3bOCHB LbKtcHy+i9fLhKaWMNB/gfp80puE2YPl/c+d+bT4/2gilqiGW6qPi36Xg Qf5EA6OLVpV7MLkX1Qxb39lCLZCYI77xq2gB9U0XNTgqwoA4MTQSLtfJ5 A==; X-CSE-ConnectionGUID: vKzR8HSiTHCjeFB4Rnwssg== X-CSE-MsgGUID: kdWr7J3eR+6/bipe2PpT2g== X-IronPort-AV: E=McAfee;i="6700,10204,11385"; a="43627935" X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="43627935" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2025 16:49:03 -0700 X-CSE-ConnectionGUID: 2r9u8XkwTKOCT9WHr/C2FQ== X-CSE-MsgGUID: h9Y2L34+QNWIajNAsy+3bQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="130150470" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa003.jf.intel.com with ESMTP; 27 Mar 2025 16:49:02 -0700 From: Sohil Mehta To: x86@kernel.org, Thomas Gleixner , Ingo Molnar Cc: Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , Sohil Mehta , "Kirill A . Shutemov" , Kai Huang , Sebastian Andrzej Siewior , Mike Rapoport , Petr Mladek , Jani Nikula , Tony Luck , Xin Li , linux-kernel@vger.kernel.org Subject: [PATCH 1/9] x86/nmi: Simplify unknown NMI panic handling Date: Thu, 27 Mar 2025 23:46:21 +0000 Message-ID: <20250327234629.3953536-2-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250327234629.3953536-1-sohil.mehta@intel.com> References: <20250327234629.3953536-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The unknown_nmi_panic variable is used to control whether the kernel should panic on unknown NMIs. There is a sysctl entry for the same, which can be used to change the behavior at runtime. However, it seems that in some places, the option unnecessarily depends on CONFIG_X86_LOCAL_APIC. Other code in nmi.c uses unknown_nmi_panic without such a dependency. This results in a few messy #ifdefs splattered across the code. The dependency was likely introduce due to a potential compile issue [1] reported a long time ago. Such an issue no longer exists. Also, similar NMI panic options, such as panic_on_unrecovered_nmi and panic_on_io_nmi, do not have an explicit dependency on the local APIC. Though, it's hard to imagine a production system without the local APIC configuration, making a specific NMI sysctl option dependent on it doesn't make sense. Remove the explicit dependency between unknown NMI handling and the local APIC to make the code cleaner and more consistent. While at it, reorder the header includes to maintain alphabetical order. [1]: https://lore.kernel.org/lkml/40BC67F9.3000609@myrealbox.com/ Signed-off-by: Sohil Mehta Acked-by: Peter Zijlstra (Intel) Reviewed-by: Nikolay Borisov --- arch/x86/include/asm/nmi.h | 4 ++-- arch/x86/kernel/setup.c | 37 ++++++++++++++++--------------------- 2 files changed, 18 insertions(+), 23 deletions(-) diff --git a/arch/x86/include/asm/nmi.h b/arch/x86/include/asm/nmi.h index f677382093f3..9cf96cce02fc 100644 --- a/arch/x86/include/asm/nmi.h +++ b/arch/x86/include/asm/nmi.h @@ -14,10 +14,10 @@ extern void release_perfctr_nmi(unsigned int); extern int reserve_evntsel_nmi(unsigned int); extern void release_evntsel_nmi(unsigned int); =20 -extern int unknown_nmi_panic; - #endif /* CONFIG_X86_LOCAL_APIC */ =20 +extern int unknown_nmi_panic; + #define NMI_FLAG_FIRST 1 =20 enum { diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index c7164a8de983..c3e1ae7373e9 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -7,10 +7,11 @@ */ #include #include -#include #include +#include #include #include +#include #include #include #include @@ -18,21 +19,19 @@ #include #include #include +#include #include -#include -#include -#include #include #include -#include +#include +#include +#include =20 #include =20 #include =20 #include -#include -#include #include #include #include @@ -47,18 +46,16 @@ #include #include #include -#include +#include +#include #include #include #include #include +#include #include #include #include -#include -#if defined(CONFIG_X86_LOCAL_APIC) -#include -#endif =20 /* * max_low_pfn_mapped: highest directly mapped pfn < 4 GB @@ -150,6 +147,13 @@ static size_t ima_kexec_buffer_size; int bootloader_type, bootloader_version; =20 static const struct ctl_table x86_sysctl_table[] =3D { + { + .procname =3D "unknown_nmi_panic", + .data =3D &unknown_nmi_panic, + .maxlen =3D sizeof(int), + .mode =3D 0644, + .proc_handler =3D proc_dointvec, + }, { .procname =3D "panic_on_unrecovered_nmi", .data =3D &panic_on_unrecovered_nmi, @@ -185,15 +189,6 @@ static const struct ctl_table x86_sysctl_table[] =3D { .mode =3D 0644, .proc_handler =3D proc_dointvec, }, -#if defined(CONFIG_X86_LOCAL_APIC) - { - .procname =3D "unknown_nmi_panic", - .data =3D &unknown_nmi_panic, - .maxlen =3D sizeof(int), - .mode =3D 0644, - .proc_handler =3D proc_dointvec, - }, -#endif #if defined(CONFIG_ACPI_SLEEP) { .procname =3D "acpi_video_flags", --=20 2.43.0 From nobody Wed Dec 17 08:56:35 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B4C781A5BA6 for ; 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a="43627944" X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="43627944" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2025 16:49:03 -0700 X-CSE-ConnectionGUID: KztX+AkOTFqbOyG3DIGQnw== X-CSE-MsgGUID: umq3vZ2tTvSV7FCUBX1bQg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="130150473" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa003.jf.intel.com with ESMTP; 27 Mar 2025 16:49:03 -0700 From: Sohil Mehta To: x86@kernel.org, Thomas Gleixner , Ingo Molnar Cc: Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , Sohil Mehta , "Kirill A . Shutemov" , Kai Huang , Sebastian Andrzej Siewior , Mike Rapoport , Petr Mladek , Jani Nikula , Tony Luck , Xin Li , linux-kernel@vger.kernel.org Subject: [PATCH 2/9] x86/nmi: Consolidate NMI panic variables Date: Thu, 27 Mar 2025 23:46:22 +0000 Message-ID: <20250327234629.3953536-3-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250327234629.3953536-1-sohil.mehta@intel.com> References: <20250327234629.3953536-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Commit feeaf5512947 ("x86: Move sysctls into arch/x86") recently moved the sysctl handling of panic_on_unrecovered_nmi and panic_on_io_nmi to x86-specific code. These variables no longer need to be declared in the generic header file. Relocate the variable definitions and declarations closer to where they are used. This makes all the NMI panic options consistent and easier to track. Signed-off-by: Sohil Mehta Acked-by: Peter Zijlstra (Intel) Reviewed-by: Kai Huang Reviewed-by: Nikolay Borisov --- arch/x86/include/asm/nmi.h | 2 ++ arch/x86/kernel/dumpstack.c | 2 -- arch/x86/kernel/nmi.c | 3 +++ include/linux/panic.h | 2 -- 4 files changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/nmi.h b/arch/x86/include/asm/nmi.h index 9cf96cce02fc..f85aea7bf7f1 100644 --- a/arch/x86/include/asm/nmi.h +++ b/arch/x86/include/asm/nmi.h @@ -17,6 +17,8 @@ extern void release_evntsel_nmi(unsigned int); #endif /* CONFIG_X86_LOCAL_APIC */ =20 extern int unknown_nmi_panic; +extern int panic_on_unrecovered_nmi; +extern int panic_on_io_nmi; =20 #define NMI_FLAG_FIRST 1 =20 diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c index 91639d1e4ec2..4abc9153e8a4 100644 --- a/arch/x86/kernel/dumpstack.c +++ b/arch/x86/kernel/dumpstack.c @@ -23,8 +23,6 @@ #include #include =20 -int panic_on_unrecovered_nmi; -int panic_on_io_nmi; static int die_counter; =20 static struct pt_regs exec_summary_regs; diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c index 9a95d00f1423..671d846ed620 100644 --- a/arch/x86/kernel/nmi.c +++ b/arch/x86/kernel/nmi.c @@ -91,6 +91,9 @@ static DEFINE_PER_CPU(struct nmi_stats, nmi_stats); static int ignore_nmis __read_mostly; =20 int unknown_nmi_panic; +int panic_on_unrecovered_nmi; +int panic_on_io_nmi; + /* * Prevent NMI reason port (0x61) being accessed simultaneously, can * only be used in NMI handler. diff --git a/include/linux/panic.h b/include/linux/panic.h index 54d90b6c5f47..b0ec89a9a966 100644 --- a/include/linux/panic.h +++ b/include/linux/panic.h @@ -20,8 +20,6 @@ extern bool panic_triggering_all_cpu_backtrace; extern int panic_timeout; extern unsigned long panic_print; extern int panic_on_oops; -extern int panic_on_unrecovered_nmi; -extern int panic_on_io_nmi; extern int panic_on_warn; =20 extern unsigned long panic_on_taint; --=20 2.43.0 From nobody Wed Dec 17 08:56:35 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 409151E1E03 for ; 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a="43627952" X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="43627952" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2025 16:49:04 -0700 X-CSE-ConnectionGUID: Px/1vkkUSveQc0G5MFfmLw== X-CSE-MsgGUID: QcY37n7uQr+fK9U6ILkzUA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="130150502" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa003.jf.intel.com with ESMTP; 27 Mar 2025 16:49:03 -0700 From: Sohil Mehta To: x86@kernel.org, Thomas Gleixner , Ingo Molnar Cc: Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , Sohil Mehta , "Kirill A . Shutemov" , Kai Huang , Sebastian Andrzej Siewior , Mike Rapoport , Petr Mladek , Jani Nikula , Tony Luck , Xin Li , linux-kernel@vger.kernel.org Subject: [PATCH 3/9] x86/nmi: Use a macro to initialize NMI descriptors Date: Thu, 27 Mar 2025 23:46:23 +0000 Message-ID: <20250327234629.3953536-4-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250327234629.3953536-1-sohil.mehta@intel.com> References: <20250327234629.3953536-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The NMI descriptors for each NMI type are stored in an array. However, they are currently initialized using raw numbers, which makes it difficult to understand the code. Introduce a macro to initialize the NMI descriptors using the NMI type enum values to make the code more readable. No functional change. Signed-off-by: Sohil Mehta Acked-by: Peter Zijlstra (Intel) Reviewed-by: Kai Huang Reviewed-by: Nikolay Borisov --- arch/x86/kernel/nmi.c | 31 +++++++++++-------------------- 1 file changed, 11 insertions(+), 20 deletions(-) diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c index 671d846ed620..6a5dc35522c8 100644 --- a/arch/x86/kernel/nmi.c +++ b/arch/x86/kernel/nmi.c @@ -49,27 +49,20 @@ struct nmi_desc { struct list_head head; }; =20 -static struct nmi_desc nmi_desc[NMI_MAX] =3D=20 -{ - { - .lock =3D __RAW_SPIN_LOCK_UNLOCKED(&nmi_desc[0].lock), - .head =3D LIST_HEAD_INIT(nmi_desc[0].head), - }, - { - .lock =3D __RAW_SPIN_LOCK_UNLOCKED(&nmi_desc[1].lock), - .head =3D LIST_HEAD_INIT(nmi_desc[1].head), - }, - { - .lock =3D __RAW_SPIN_LOCK_UNLOCKED(&nmi_desc[2].lock), - .head =3D LIST_HEAD_INIT(nmi_desc[2].head), - }, - { - .lock =3D __RAW_SPIN_LOCK_UNLOCKED(&nmi_desc[3].lock), - .head =3D LIST_HEAD_INIT(nmi_desc[3].head), - }, +#define NMI_DESC_INIT(type) { \ + .lock =3D __RAW_SPIN_LOCK_UNLOCKED(&nmi_desc[type].lock), \ + .head =3D LIST_HEAD_INIT(nmi_desc[type].head), \ +} =20 +static struct nmi_desc nmi_desc[NMI_MAX] =3D { + NMI_DESC_INIT(NMI_LOCAL), + NMI_DESC_INIT(NMI_UNKNOWN), + NMI_DESC_INIT(NMI_SERR), + NMI_DESC_INIT(NMI_IO_CHECK), }; =20 +#define nmi_to_desc(type) (&nmi_desc[type]) + struct nmi_stats { unsigned int normal; unsigned int unknown; @@ -107,8 +100,6 @@ static int __init setup_unknown_nmi_panic(char *str) } __setup("unknown_nmi_panic", setup_unknown_nmi_panic); =20 -#define nmi_to_desc(type) (&nmi_desc[type]) - static u64 nmi_longest_ns =3D 1 * NSEC_PER_MSEC; =20 static int __init nmi_warning_debugfs(void) --=20 2.43.0 From nobody Wed Dec 17 08:56:35 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F41CB1DE2AA for ; Thu, 27 Mar 2025 23:49:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743119347; cv=none; b=mm1cRTS6fpoA4OqIEUexdlfARiyK090m8tPs0nhtYfnw1TUH0yeG8xC9XyeUP38oMWZMNlvH6VgqCJHQrer1Pe15y9tzC43NyWcVonCsBQXkAjoixOE50BHXz1dnIJ0ierQWskAuXjycoe6h6z7OmVQ/RqlXejn25JhxIQlnXuA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743119347; c=relaxed/simple; bh=K0PUC8y3AWFT3Wsxw+URBsGPPKBxMUuTV9nQ9RtYid4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=O5Xf8scrElM+gvW5zXiiA9k2vVz4DiO6i8Gk+jMaNgQBu/uIUa3RYzz6BHJq+5CGxLCbM3SkB2w8rr/wYrPjtvXgj2BiqDCWhcbcqDZa941FLel2cvwqBqRNoZ+R0ZR7NYL4hxps8Izc+0ZqsqfD8OFCK6Tm2SUuhPj2UyhmMXo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=US8M1FF/; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="US8M1FF/" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1743119346; x=1774655346; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=K0PUC8y3AWFT3Wsxw+URBsGPPKBxMUuTV9nQ9RtYid4=; b=US8M1FF/bRXAGm6YDkqucgzySU/KqM+hsmT6sj3Y0g54OfuEd2lpsiLy i/eMyHXqTkqcqI5LwEbNYytewUYRNG4zz9JBbbdxu4fJCtXn4dNx2ylp2 7aPW8v8R5CcwiHRN4BhrnZwYpLFXD388vl5iYxWDoxV/srOfiqVlyOkFj Dsww4QBIqWS8uCKbbGxDFP3ns/4anlIjWOKrgOU67TG7igaaRzqYjuOW1 RDUpoRCTOUABaDCExs6igO/huLhuwp1h2jfJANawdwA62jHW0tpTej/6R LDgpi1r1rlfooyJWYZXBn6K+Aa6L+lXM+t/YprEtBO3qWJk0es6NkCOYM Q==; X-CSE-ConnectionGUID: 0nz6xZAKRWCTAiTE5F3ViA== X-CSE-MsgGUID: zzjef1VQTRC23JxzViNjTw== X-IronPort-AV: E=McAfee;i="6700,10204,11385"; a="43627960" X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="43627960" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2025 16:49:05 -0700 X-CSE-ConnectionGUID: R+aUmq0URmarRD2JGQXGgA== X-CSE-MsgGUID: 5wOeVWHmQIyrX2iVczI81g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="130150505" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa003.jf.intel.com with ESMTP; 27 Mar 2025 16:49:04 -0700 From: Sohil Mehta To: x86@kernel.org, Thomas Gleixner , Ingo Molnar Cc: Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , Sohil Mehta , "Kirill A . Shutemov" , Kai Huang , Sebastian Andrzej Siewior , Mike Rapoport , Petr Mladek , Jani Nikula , Tony Luck , Xin Li , linux-kernel@vger.kernel.org Subject: [PATCH 4/9] x86/nmi: Remove export of local_touch_nmi() Date: Thu, 27 Mar 2025 23:46:24 +0000 Message-ID: <20250327234629.3953536-5-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250327234629.3953536-1-sohil.mehta@intel.com> References: <20250327234629.3953536-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Commit feb6cd6a0f9f ("thermal/intel_powerclamp: stop sched tick in forced idle") got rid of the last exported user of local_touch_nmi() a while back. Remove the unnecessary export. Signed-off-by: Sohil Mehta Acked-by: Peter Zijlstra (Intel) Reviewed-by: Kai Huang Reviewed-by: Nikolay Borisov --- arch/x86/kernel/nmi.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c index 6a5dc35522c8..cdfb3864d59a 100644 --- a/arch/x86/kernel/nmi.c +++ b/arch/x86/kernel/nmi.c @@ -745,4 +745,3 @@ void local_touch_nmi(void) { __this_cpu_write(last_nmi_rip, 0); } -EXPORT_SYMBOL_GPL(local_touch_nmi); --=20 2.43.0 From nobody Wed Dec 17 08:56:35 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6BCA01E51EF for ; Thu, 27 Mar 2025 23:49:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743119348; cv=none; b=EyiSF08Si/I2Sh77xH5UD5vA6wyB+VlZI7O5djOdt+1j7jZstDDxmNxjnbai/gM0eQ4M578OCmAZdw6vi/Hu69sflQxNDFLderMHBzCs3ACUoQKrY8oeInSrg0qucXmrmXow4WRoXQn+KDC0v0kiWSlURiiTKjcYtcEjfMkzoXU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743119348; c=relaxed/simple; bh=7xuzZW2SqsDXU4zjPwI8U9yRxCTuvO3b39KZjUIDomI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SqvREG2LX+zsm/rCKTNBER/E+uKftAuqSQ6J6GXLET2408aTSxVNYJzA3O/8occRpt6qQwD5KTfQp7q6Jaw84+hmWecrUIr9zV3lQY3O8A+K6j0eBVmnu85Xd4BvhP6BmGm+b/yBg2ivqZ3WUGFs6BDYyWnVuR4LMNSkqUaaxpk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Ri7E7Cel; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Ri7E7Cel" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1743119346; x=1774655346; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7xuzZW2SqsDXU4zjPwI8U9yRxCTuvO3b39KZjUIDomI=; b=Ri7E7Cel2lt5C+EKuTGQwAXsfU3PjeWqiWJRhG+5c1hqvyshApez/W83 A31FjYeEiFqnJ8OBArzNWdHSQXFa07PueiRgXs2PHDZOjgPQGVz5ivyqj 1HLr/Qwj9xf8+W7B0WqGHlPaXTirWPMrwBO+iYeegFoLhup9c1rxI3nUp ApSs6ZJes25hiFPkq+2zrwaz3iPMJVZTyCWUKu2Mot9qzNwUbq/4QHMzA L518Eg02akcVlG/4ahJdcAIa2D/B0jMksVbU7GWhAvq9tkGi262KosEAv NGIortuoKU5ZcoW+JjTHue7ExtYh190t/pXHK+S0I2LVyrx3/pC+mj3SJ w==; X-CSE-ConnectionGUID: 0AacVKE4Qu+HL113RSG+mA== X-CSE-MsgGUID: Gpl5T9IzT32cX7qWCQB+Lw== X-IronPort-AV: E=McAfee;i="6700,10204,11385"; a="43627969" X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="43627969" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2025 16:49:06 -0700 X-CSE-ConnectionGUID: hlCx5Ep1RzqDemWLjN/Y4Q== X-CSE-MsgGUID: /mVI/4q0RuCuJqWcB/y1Aw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="130150512" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa003.jf.intel.com with ESMTP; 27 Mar 2025 16:49:05 -0700 From: Sohil Mehta To: x86@kernel.org, Thomas Gleixner , Ingo Molnar Cc: Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , Sohil Mehta , "Kirill A . Shutemov" , Kai Huang , Sebastian Andrzej Siewior , Mike Rapoport , Petr Mladek , Jani Nikula , Tony Luck , Xin Li , linux-kernel@vger.kernel.org Subject: [PATCH 5/9] x86/nmi: Fix comment in unknown NMI handling Date: Thu, 27 Mar 2025 23:46:25 +0000 Message-ID: <20250327234629.3953536-6-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250327234629.3953536-1-sohil.mehta@intel.com> References: <20250327234629.3953536-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The comment in unknown NMI handling is incorrect and misleading. There is no longer a restriction on having a single Unknown NMI handler. Also, nmi_handle() does not use the 'b2b' parameter anymore. The changes that made the comment outdated are: commit 0d443b70cc92 ("x86/platform: Remove warning message for duplicate NMI handlers") commit bf9f2ee28d47 ("x86/nmi: Remove the 'b2b' parameter from nmi_handle()") Remove the old comment and update it to reflect the current intention. Signed-off-by: Sohil Mehta Acked-by: Peter Zijlstra (Intel) Reviewed-by: Kai Huang Reviewed-by: Nikolay Borisov --- arch/x86/kernel/nmi.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c index cdfb3864d59a..2a07c9adc6a6 100644 --- a/arch/x86/kernel/nmi.c +++ b/arch/x86/kernel/nmi.c @@ -327,10 +327,9 @@ unknown_nmi_error(unsigned char reason, struct pt_regs= *regs) int handled; =20 /* - * Use 'false' as back-to-back NMIs are dealt with one level up. - * Of course this makes having multiple 'unknown' handlers useless - * as only the first one is ever run (unless it can actually determine - * if it caused the NMI) + * As a last resort, let the "unknown" handlers make a + * best-effort attempt to figure out if they can claim + * responsibility for this Unknown NMI. */ handled =3D nmi_handle(NMI_UNKNOWN, regs); if (handled) { --=20 2.43.0 From nobody Wed Dec 17 08:56:35 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 940CC1EB5F8 for ; Thu, 27 Mar 2025 23:49:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743119349; cv=none; b=sv412k1amup4DgrOOAcDnns1JnPVB4cRDSgTE3oSvsXZz4+xpupFGtvin+rcD+aUCJ2ZvgACucqbnXRztPIx+aqidwpJOxthe8EFgT22vFy3QcfesbIJxlaX0x1dssGnrXg9nMqglLekLFCY8Da4gmJKO4LnC5TqOJYS1ZNjvsA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743119349; c=relaxed/simple; bh=A3O1dUKmIFuVaH825Y+VuzOrdI2MI1HzpdnxKXVvGdw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bbr6L7itRxCKQ3kqypBcfKemv/66MMVCwO1b69mKZ/VgnRXBUDTokm2YFGNzy83Fk9HOrxRA4khD7CQt4pZDbfD3RMpB4F1Q8hlEBgJcPQ765u9bezRy5TxofSMCmW5g7q2IvFOAtWgmADQ/XSmJ0cerfy7O3y/Vtg7riVt04Zc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=QqW3Nm9s; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="QqW3Nm9s" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1743119348; x=1774655348; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=A3O1dUKmIFuVaH825Y+VuzOrdI2MI1HzpdnxKXVvGdw=; b=QqW3Nm9sp6zjTb9Eh+PfKxf7Trm657oHQXzCpxdMDK4i/lNRE4KN2BQP UDSLURSb4EQNrDot/eOMAOoN0ky1VJ+XAAIWdlfLYsFHaZdv7rSq5E9Gq /IjXTTGEmxTjvTKRtVtdFUu24BuwW3GN0CW/TiSN/kAoYBjDutfR775zA gfKcy918jzBvSMNSeU9UFOfuLmuiKokPRu9NX+9SDBU7nZc/T8lRGFwJt NPL4PH4CRWGtGJVD8LC2HcTy+8Rnrng7IxNm9DnPtMtZSrwFRS/Im6iVP qrNn/pDXsvREicAqqQ563Gi8cXv77wyYLHtygwJWdM0vazVOyFhPIV0nm Q==; X-CSE-ConnectionGUID: DTHHjLJwT/SrRSEUvbCgkA== X-CSE-MsgGUID: iRXBtmPWRpqHfopFg5ib5g== X-IronPort-AV: E=McAfee;i="6700,10204,11385"; a="43627978" X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="43627978" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2025 16:49:06 -0700 X-CSE-ConnectionGUID: ih1UoK6lRQe+aHr+xwxxQg== X-CSE-MsgGUID: AwOdvOnjSLG9tgZz5Sn2ag== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="130150516" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa003.jf.intel.com with ESMTP; 27 Mar 2025 16:49:06 -0700 From: Sohil Mehta To: x86@kernel.org, Thomas Gleixner , Ingo Molnar Cc: Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , Sohil Mehta , "Kirill A . Shutemov" , Kai Huang , Sebastian Andrzej Siewior , Mike Rapoport , Petr Mladek , Jani Nikula , Tony Luck , Xin Li , linux-kernel@vger.kernel.org Subject: [PATCH 6/9] x86/nmi: Improve and relocate NMI handler comments Date: Thu, 27 Mar 2025 23:46:26 +0000 Message-ID: <20250327234629.3953536-7-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250327234629.3953536-1-sohil.mehta@intel.com> References: <20250327234629.3953536-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some of the comments in the default NMI handling code are out of place or inadequate. Move them to the appropriate locations and update them as needed. Move the comment related to CPU-specific NMIs closer to the actual code. Also, add more details about how back-to-back NMIs are detected since that isn't immediately obvious. Opportunistically, replace an #ifdef section in the vicinity with an IS_ENABLED() check to make the code easier to read. Signed-off-by: Sohil Mehta Acked-by: Kai Huang Acked-by: Peter Zijlstra (Intel) Reviewed-by: Nikolay Borisov --- arch/x86/kernel/nmi.c | 35 +++++++++++++++++++++-------------- 1 file changed, 21 insertions(+), 14 deletions(-) diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c index 2a07c9adc6a6..59ed74ec010e 100644 --- a/arch/x86/kernel/nmi.c +++ b/arch/x86/kernel/nmi.c @@ -359,17 +359,18 @@ static noinstr void default_do_nmi(struct pt_regs *re= gs) bool b2b =3D false; =20 /* - * CPU-specific NMI must be processed before non-CPU-specific - * NMI, otherwise we may lose it, because the CPU-specific - * NMI can not be detected/processed on other CPUs. - */ - - /* - * Back-to-back NMIs are interesting because they can either - * be two NMI or more than two NMIs (any thing over two is dropped - * due to NMI being edge-triggered). If this is the second half - * of the back-to-back NMI, assume we dropped things and process - * more handlers. Otherwise reset the 'swallow' NMI behaviour + * Back-to-back NMIs are detected by comparing the RIP of the + * current NMI with that of the previous NMI. If it is the same, + * it is assumed that the CPU did not have a chance to jump back + * into a non-NMI context and execute code in between the two + * NMIs. + * + * They are interesting because even if there are more than two, + * only a maximum of two can be detected (anything over two is + * dropped due to NMI being edge-triggered). If this is the + * second half of the back-to-back NMI, assume we dropped things + * and process more handlers. Otherwise, reset the 'swallow' NMI + * behavior. */ if (regs->ip =3D=3D __this_cpu_read(last_nmi_rip)) b2b =3D true; @@ -383,6 +384,11 @@ static noinstr void default_do_nmi(struct pt_regs *reg= s) if (microcode_nmi_handler_enabled() && microcode_nmi_handler()) goto out; =20 + /* + * CPU-specific NMI must be processed before non-CPU-specific + * NMI, otherwise we may lose it, because the CPU-specific + * NMI can not be detected/processed on other CPUs. + */ handled =3D nmi_handle(NMI_LOCAL, regs); __this_cpu_add(nmi_stats.normal, handled); if (handled) { @@ -419,13 +425,14 @@ static noinstr void default_do_nmi(struct pt_regs *re= gs) pci_serr_error(reason, regs); else if (reason & NMI_REASON_IOCHK) io_check_error(reason, regs); -#ifdef CONFIG_X86_32 + /* * Reassert NMI in case it became active * meanwhile as it's edge-triggered: */ - reassert_nmi(); -#endif + if (IS_ENABLED(CONFIG_X86_32)) + reassert_nmi(); + __this_cpu_add(nmi_stats.external, 1); raw_spin_unlock(&nmi_reason_lock); goto out; --=20 2.43.0 From nobody Wed Dec 17 08:56:35 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1F43B1EF362 for ; Thu, 27 Mar 2025 23:49:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743119349; cv=none; b=RfSHWuWQ9vt9EPVs9n/oIfJnI6YoYfz6bsuQXASeNhBM8wcbPWcvm9CGU5g+JpcbozqdEcUqLvQ1j7fcD4WOc+Uy5Swor3tu6FknBkh+P3sP5bpKISukZ8HIKKTdymM8jyYkb7UkLk+1vMVoTYhmbayahGHIcFFZ68kFIjnpHRU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743119349; c=relaxed/simple; bh=/CgPMf8wtEuea1xGS63wyhGK02cSK32ve8/CqT0Th04=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JV+2XP4WHgu6fc0lFZnzeX1J8DIaMyFHSYXMlzZP1pTN7LIqZl9gDqwUWftiR4CkiBgTNjKMD+U3IkwvV1Io8kRSt2/B7e2H8hmWHT6qlsdrf3D2Q8DSMF54PS/aus6eJOg6neiSSV/Jvb01ZuAgnrkPyNgcGKFGMA90VM8jllM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ibWw2Qmz; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ibWw2Qmz" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1743119348; x=1774655348; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/CgPMf8wtEuea1xGS63wyhGK02cSK32ve8/CqT0Th04=; b=ibWw2QmzfRfg9/A2IQXq7mRxgLcCyqcBAcbx5vFKPSOESkevnhBrq3ZC yKx7K+dPDkQbvymapDFyTABTuzZB7S4a4g5F/Ws82NZyLO259GrggX6uL XCzXj65llw3O0BcMlVU48H43Eg3UMEpRZ7rR9Ifa2Ogq9raQ/jNwRGYcH C/qtSqXYN53XyX3EWp2u8PpZbI10MGI0HCevuKHG++KJHE+CbJrNz78YJ OykGOu0gFmsHaeNsRxze847dwN7h5dpgRU1MFl5KMjq8m0zrP66tqA9L4 5uEI9Q7MqIu65WKTnW0wds1YsjAHcLWbZJjwyY+utiTHFrHqKzpgyihQ2 Q==; X-CSE-ConnectionGUID: 0fUKbC4LQI+AcmiysGUKUg== X-CSE-MsgGUID: Qv2rCQLdSD+BW9C7yZb+vw== X-IronPort-AV: E=McAfee;i="6700,10204,11385"; a="43627988" X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="43627988" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2025 16:49:07 -0700 X-CSE-ConnectionGUID: KOC1Jhe2Ttm0iHNQtjWLqw== X-CSE-MsgGUID: hWLMyaizRIiC4tkj3ptVCg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="130150522" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa003.jf.intel.com with ESMTP; 27 Mar 2025 16:49:07 -0700 From: Sohil Mehta To: x86@kernel.org, Thomas Gleixner , Ingo Molnar Cc: Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , Sohil Mehta , "Kirill A . Shutemov" , Kai Huang , Sebastian Andrzej Siewior , Mike Rapoport , Petr Mladek , Jani Nikula , Tony Luck , Xin Li , linux-kernel@vger.kernel.org Subject: [PATCH 7/9] x86/nmi: Improve NMI header documentation Date: Thu, 27 Mar 2025 23:46:27 +0000 Message-ID: <20250327234629.3953536-8-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250327234629.3953536-1-sohil.mehta@intel.com> References: <20250327234629.3953536-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" NMI handlers can be registered by various subsystems, including drivers. However, the interface for registering and unregistering such handlers is not clearly documented. In the future, the interface may need to be extended to identify the source of the NMI. Add documentation to make the current API more understandable and easier to use. Signed-off-by: Sohil Mehta Acked-by: Peter Zijlstra (Intel) Reviewed-by: Nikolay Borisov --- arch/x86/include/asm/nmi.h | 43 ++++++++++++++++++++++++++++++++- arch/x86/include/asm/x86_init.h | 1 + 2 files changed, 43 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/nmi.h b/arch/x86/include/asm/nmi.h index f85aea7bf7f1..79d88d12c8fb 100644 --- a/arch/x86/include/asm/nmi.h +++ b/arch/x86/include/asm/nmi.h @@ -20,8 +20,20 @@ extern int unknown_nmi_panic; extern int panic_on_unrecovered_nmi; extern int panic_on_io_nmi; =20 +/* NMI handler flags */ #define NMI_FLAG_FIRST 1 =20 +/** + * enum - NMI types. + * @NMI_LOCAL: Local NMI, CPU-specific NMI generated by the Local APIC. + * @NMI_UNKNOWN: Unknown NMI, the source of the NMI may not be identified. + * @NMI_SERR: System Error NMI, typically triggered by PCI errors. + * @NMI_IO_CHECK: I/O Check NMI, related to I/O errors. + * @NMI_MAX: Maximum value for NMI types. + * + * NMI types are used to categorize NMIs and to dispatch them to the + * appropriate handler. + */ enum { NMI_LOCAL=3D0, NMI_UNKNOWN, @@ -30,6 +42,7 @@ enum { NMI_MAX }; =20 +/* NMI handler return values */ #define NMI_DONE 0 #define NMI_HANDLED 1 =20 @@ -43,6 +56,25 @@ struct nmiaction { const char *name; }; =20 +/** + * register_nmi_handler - Register a handler for a specific NMI type + * @t: NMI type (e.g. NMI_LOCAL) + * @fn: The NMI handler + * @fg: Flags associated with the NMI handler + * @n: Name of the NMI handler + * @init: Optional __init* attributes for struct nmiaction + * + * Adds the provided handler to the list of handlers for the specified + * NMI type. Handlers flagged with NMI_FLAG_FIRST would be executed first. + * + * Sometimes the source of an NMI can't be reliably determined which + * results in an NMI being tagged as "unknown". Register an additional + * handler using the NMI type - NMI_UNKNOWN to handle such cases. The + * caller would get one last chance to assume responsibility for the + * NMI. + * + * Return: 0 on success, or an error code on failure. + */ #define register_nmi_handler(t, fn, fg, n, init...) \ ({ \ static struct nmiaction init fn##_na =3D { \ @@ -56,7 +88,16 @@ struct nmiaction { =20 int __register_nmi_handler(unsigned int, struct nmiaction *); =20 -void unregister_nmi_handler(unsigned int, const char *); +/** + * unregister_nmi_handler - Unregister a handler for a specific NMI type + * @type: NMI type (e.g. NMI_LOCAL) + * @name: Name of the NMI handler used during registration + * + * Removes the handler associated with the specified NMI type from the + * NMI handler list. The "name" is used as a lookup key to identify the + * handler. + */ +void unregister_nmi_handler(unsigned int type, const char *name); =20 void set_emergency_nmi_handler(unsigned int type, nmi_handler_t handler); =20 diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_ini= t.h index 213cf5379a5a..36698cc9fb44 100644 --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h @@ -292,6 +292,7 @@ struct x86_hyper_runtime { * @set_wallclock: set time back to HW clock * @is_untracked_pat_range exclude from PAT logic * @nmi_init enable NMI on cpus + * @get_nmi_reason get the reason an NMI was received * @save_sched_clock_state: save state for sched_clock() on suspend * @restore_sched_clock_state: restore state for sched_clock() on resume * @apic_post_init: adjust apic if needed --=20 2.43.0 From nobody Wed Dec 17 08:56:35 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1933E1F099B for ; Thu, 27 Mar 2025 23:49:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743119350; cv=none; b=YWrFyRjYpxcSiGkFF8UBluZ2pYGeulA7Dc5IcN1buCvgFwLJ0VUkFcZg1sGfzA7zTrUCtDsq5xWm9OeR42//PGT1bnwMuL+GBNrYScyruxPUtRDX9oRfD4bzM84jICizCYxuHaWp/pdrhJ8LhUwDwJMUlU8g4lbXDV4+uhqw52E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743119350; c=relaxed/simple; bh=VfaXKtN83UCKXqTetLMi6KmG0sbuDIPOw3k0Gwy1EjU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ai7nOfCUfAjrlTSIhX2Qdchf4+z32ick7KzvzM1khwMJEd9/UOtStEB89O/j75aeDWmPkYrm0O3/8ocwCs951WA9wOrXVSr++93gzcHrsgP6ymUsD0QrqRWrMsZ6A3WK3xSyIbRUi2KH1KppNxx613GoQIZwUopxncSsp0o7zIM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=iIwu6QQ7; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="iIwu6QQ7" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1743119349; x=1774655349; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VfaXKtN83UCKXqTetLMi6KmG0sbuDIPOw3k0Gwy1EjU=; b=iIwu6QQ7QNKrhOPZ2xSqJARkgYXBd3irat+ZTwdk1100wDb9NoLTgZ0v 1tMWca/pqeneMspVqTKGgKxZmxiH9jlI5OiOJsEL+kiHQiFnHuFHuSdaG q5yzGHCdyZXlqtOY3SVTbk+TteB1mepy9c2JO5yStNageXyFwvryXppi0 nPM96ALAEmoZPFe1GXOTcxpch14hTQLv6CV8BxUyZuykBDrHoaExBXY9L RD6040bezJuyRipxk9zSLHMe/bPUg4Chesq2VSCRU4imBQQH8BHki8FqO 0sPGO44+McqosZ9uo2M0ZA3DfW8zQN+W32W+H7DbhFuR+x0Wj45HShv6t A==; X-CSE-ConnectionGUID: 1oETKyeQQ0y8sXzFAOq/dQ== X-CSE-MsgGUID: li+FO+AGSlCxaUl2O79Hbg== X-IronPort-AV: E=McAfee;i="6700,10204,11385"; a="43627997" X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="43627997" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2025 16:49:08 -0700 X-CSE-ConnectionGUID: ZM1lalVuStWkW10SjCIn7A== X-CSE-MsgGUID: iEDfi0/IQ7CVaEDpZKHoLg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,281,1736841600"; d="scan'208";a="130150528" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa003.jf.intel.com with ESMTP; 27 Mar 2025 16:49:07 -0700 From: Sohil Mehta To: x86@kernel.org, Thomas Gleixner , Ingo Molnar Cc: Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , Sohil Mehta , "Kirill A . Shutemov" , Kai Huang , Sebastian Andrzej Siewior , Mike Rapoport , Petr Mladek , Jani Nikula , Tony Luck , Xin Li , linux-kernel@vger.kernel.org Subject: [PATCH 8/9] x86/nmi: Clean up NMI selftest Date: Thu, 27 Mar 2025 23:46:28 +0000 Message-ID: <20250327234629.3953536-9-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250327234629.3953536-1-sohil.mehta@intel.com> References: <20250327234629.3953536-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The expected_testcase_failures variable in the NMI selftest has never been set since its introduction. Remove this unused variable along with the related checks to simplify the code. While at it, replace printk() with the corresponding pr_{cont,info}() calls. Also, get rid of the superfluous testname wrapper and the redundant file path comment. Signed-off-by: Sohil Mehta Acked-by: Peter Zijlstra (Intel) Reviewed-by: Nikolay Borisov --- arch/x86/kernel/nmi_selftest.c | 52 +++++++++++----------------------- 1 file changed, 16 insertions(+), 36 deletions(-) diff --git a/arch/x86/kernel/nmi_selftest.c b/arch/x86/kernel/nmi_selftest.c index e93a8545c74d..a010e9d062bf 100644 --- a/arch/x86/kernel/nmi_selftest.c +++ b/arch/x86/kernel/nmi_selftest.c @@ -1,7 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 /* - * arch/x86/kernel/nmi-selftest.c - * * Testsuite for NMI: IPIs * * Started by Don Zickus: @@ -30,7 +28,6 @@ static DECLARE_BITMAP(nmi_ipi_mask, NR_CPUS) __initdata; =20 static int __initdata testcase_total; static int __initdata testcase_successes; -static int __initdata expected_testcase_failures; static int __initdata unexpected_testcase_failures; static int __initdata unexpected_testcase_unknowns; =20 @@ -120,26 +117,22 @@ static void __init dotest(void (*testcase_fn)(void), = int expected) unexpected_testcase_failures++; =20 if (nmi_fail =3D=3D FAILURE) - printk(KERN_CONT "FAILED |"); + pr_cont("FAILED |"); else if (nmi_fail =3D=3D TIMEOUT) - printk(KERN_CONT "TIMEOUT|"); + pr_cont("TIMEOUT|"); else - printk(KERN_CONT "ERROR |"); + pr_cont("ERROR |"); dump_stack(); } else { testcase_successes++; - printk(KERN_CONT " ok |"); + pr_cont(" ok |"); } - testcase_total++; + pr_cont("\n"); =20 + testcase_total++; reset_nmi(); } =20 -static inline void __init print_testname(const char *testname) -{ - printk("%12s:", testname); -} - void __init nmi_selftest(void) { init_nmi_testsuite(); @@ -147,38 +140,25 @@ void __init nmi_selftest(void) /* * Run the testsuite: */ - printk("----------------\n"); - printk("| NMI testsuite:\n"); - printk("--------------------\n"); + pr_info("----------------\n"); + pr_info("| NMI testsuite:\n"); + pr_info("--------------------\n"); =20 - print_testname("remote IPI"); + pr_info("%12s:", "remote IPI"); dotest(remote_ipi, SUCCESS); - printk(KERN_CONT "\n"); - print_testname("local IPI"); + + pr_info("%12s:", "local IPI"); dotest(local_ipi, SUCCESS); - printk(KERN_CONT "\n"); =20 cleanup_nmi_testsuite(); =20 + pr_info("--------------------\n"); if (unexpected_testcase_failures) { - printk("--------------------\n"); - printk("BUG: %3d unexpected failures (out of %3d) - debugging disabled! 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Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , Sohil Mehta , "Kirill A . Shutemov" , Kai Huang , Sebastian Andrzej Siewior , Mike Rapoport , Petr Mladek , Jani Nikula , Tony Luck , Xin Li , linux-kernel@vger.kernel.org Subject: [PATCH 9/9] x86/nmi: Improve NMI duration console print Date: Thu, 27 Mar 2025 23:46:29 +0000 Message-ID: <20250327234629.3953536-10-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250327234629.3953536-1-sohil.mehta@intel.com> References: <20250327234629.3953536-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert the last remaining printk() in nmi.c to pr_info(). Along with it, use timespec macros to calculate the NMI handler duration. Signed-off-by: Sohil Mehta Acked-by: Peter Zijlstra (Intel) Reviewed-by: Kai Huang Reviewed-by: Nikolay Borisov --- arch/x86/kernel/nmi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c index 59ed74ec010e..be93ec7255bf 100644 --- a/arch/x86/kernel/nmi.c +++ b/arch/x86/kernel/nmi.c @@ -119,12 +119,12 @@ static void nmi_check_duration(struct nmiaction *acti= on, u64 duration) =20 action->max_duration =3D duration; =20 - remainder_ns =3D do_div(duration, (1000 * 1000)); - decimal_msecs =3D remainder_ns / 1000; + /* Convert duration from nsec to msec */ + remainder_ns =3D do_div(duration, NSEC_PER_MSEC); + decimal_msecs =3D remainder_ns / NSEC_PER_USEC; =20 - printk_ratelimited(KERN_INFO - "INFO: NMI handler (%ps) took too long to run: %lld.%03d msecs\n", - action->handler, duration, decimal_msecs); + pr_info_ratelimited("INFO: NMI handler (%ps) took too long to run: %lld.%= 03d msecs\n", + action->handler, duration, decimal_msecs); } =20 static int nmi_handle(unsigned int type, struct pt_regs *regs) --=20 2.43.0