From nobody Fri Dec 19 10:44:01 2025 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 941D4192D8F; Wed, 26 Mar 2025 06:31:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742970663; cv=none; b=otqKi3QldHS+lTtczoPq1FtUIsPoDbAGUi/SFFfEDqPgUqqOXE/NwdefUNdZ2UZZfqD8ovmfsjaanlwBySYywi14uxM2mwHIw3ymudumwyamsRFJaGNy9Ihh7FTYXoQmvW/pl2hAl9pL0oSCWChCQ7oM3QcEFu7Z558Rjs7X/3U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742970663; c=relaxed/simple; bh=x+xLqlfeFggbbQaVXOaeqkjIa1WCGHKMjOEbJ2krYpM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=X5mXiT/WIcroo09lE46rKFD3sEsZPs+hJ1PAfsRFv8SfOJuqtmG4kVQTAZfqMoPzd8m1Roy3xllxrOuo177TI3P8vO1VojQbyEwizbnYE1Rq++1eKm8ILzGE+rhHEtSzXUiW4qkGJXAe+Erept+nqbztXOuTsaLHqj+BWHpkpgU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=Unj0yZxZ; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Unj0yZxZ" X-UUID: dc063c660a0b11f0aae1fd9735fae912-20250326 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=m+5GZqVRNpSuieco+5vRc0my9hNrDxuZaC3K9GsJiX4=; b=Unj0yZxZYyAyF1FWzsUWT5eb2Vj1l/WbxjMcKioFA81jmdXJc57Oai2TLL8I1wHdLn+M7AKFnp292vI5d4PlVQo4IDPtCuBloiIWNr4WcR691kH4Bo2Ai/oeY1NZP7LWzMCb7irovu1qXC3Yn1EgsNHlr9Y0+RFa7hXapg7Nvho=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.2.1,REQID:7f2cbecf-9b3e-4f45-aa6a-114f7a94ff15,IP:0,UR L:25,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:25 X-CID-META: VersionHash:0ef645f,CLOUDID:0955cfc6-16da-468a-87f7-8ca8d6b3b9f7,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:nil,Content:0|50,EDM:-3 ,IP:nil,URL:11|83|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OS A:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: dc063c660a0b11f0aae1fd9735fae912-20250326 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 572327551; Wed, 26 Mar 2025 14:30:50 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Wed, 26 Mar 2025 14:30:48 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Wed, 26 Mar 2025 14:30:48 +0800 From: Crystal Guo To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Crystal Guo CC: , , , , Subject: [v3,1/2] dt-bindings: memory-controllers: Add MediaTek DRAM controller interface Date: Wed, 26 Mar 2025 14:30:31 +0800 Message-ID: <20250326063041.7126-2-crystal.guo@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250326063041.7126-1-crystal.guo@mediatek.com> References: <20250326063041.7126-1-crystal.guo@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" A MediaTek DRAM controller interface to provide the current DDR data rate. Signed-off-by: Crystal Guo --- .../memory-controllers/mediatek,dramc.yaml | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/me= diatek,dramc.yaml diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,= dramc.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,= dramc.yaml new file mode 100644 index 000000000000..8bdacfc36cb5 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.y= aml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2025 MediaTek Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/mediatek,dramc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek DRAM Controller (DRAMC) + +maintainers: + - Crystal Guo + +description: + A MediaTek DRAM controller interface to provide the current data rate of= DRAM. + +properties: + compatible: + items: + - enum: + - mediatek,mt8196-dramc + + reg: + items: + - description: anaphy registers + - description: ddrphy registers + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + memory-controller@10236000 { + compatible =3D "mediatek,mt8196-dramc"; + reg =3D <0 0x10236000 0 0x2000>, + <0 0x10238000 0 0x2000>; + }; + }; --=20 2.18.0