From nobody Thu Dec 18 08:39:24 2025 Received: from m16.mail.163.com (m16.mail.163.com [117.135.210.2]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CBE9B1DFF8; Tue, 25 Mar 2025 13:30:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=117.135.210.2 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909434; cv=none; b=AkgPL+/bjqZQkRt+RXA5A561e3bukwaL1Yv0/ufZt8VFcC7537+v7Lrw+eQjpYLzwTNGHug4xKHREYEdAz0jeA/zFukNT6q+Mm1eDPOgB2Cp+11ywzE46zO+iaaWLDR2M4lxDWVzTxuttLTCf2kGfVjx9AslfqVt43VQNfpYCvc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909434; c=relaxed/simple; bh=lHPcC6roTWI6j5MuLnP9MGdLrR/C3X98BMj/TCy80J0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CCZxGSHKks0gIHoYONrHYlN0pdWoxf+BLV+rO8mr1DFuBDH21kSPgDhsiwg3+DwmAAxmtyd3lQs9G9JQQtpbdMh2+bisBtnxvEdt1wxS5q48qHWlQVRUzPAit0uq18bn3+1ajpdf7YVakG6WBZ4Z1D5RiMN1vGuFkcC5rd3V0Zk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=GVqfaRHJ; arc=none smtp.client-ip=117.135.210.2 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="GVqfaRHJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-ID:MIME-Version; bh=SNu0F 4yGXjEea7fLM5tg1tfl9TwC9mxjxgn2oB/nJL4=; b=GVqfaRHJ8f4Dbd49Yoefd PGivXKGqhOuFpE7Laf6x4CVnBDBDYl9cFSGTj8Z37rNN+gWIkgnm2dMIHSZbktMU cNnhDgLWKj1zkB6o/9nI0e/afnYt+U6RHeKkKv2qFwX88v1cLD/kMiG5cEEvx90M p2tui/QSvq5CzAkzC6+LMM= Received: from ProDesk.. (unknown []) by gzsmtp4 (Coremail) with SMTP id PygvCgAnc2bLr+JnWNnrAA--.35530S3; Tue, 25 Mar 2025 21:29:51 +0800 (CST) From: Andy Yan To: heiko@sntech.de Cc: conor+dt@kernel.org, krzk+dt@kernel.org, robh@kernel.org, hjc@rock-chips.com, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Andy Yan Subject: [PATCH v2 1/6] dt-bindings: display: rockchip,inno-hdmi: Fix Document of RK3036 compatible Date: Tue, 25 Mar 2025 21:29:35 +0800 Message-ID: <20250325132944.171111-2-andyshrk@163.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250325132944.171111-1-andyshrk@163.com> References: <20250325132944.171111-1-andyshrk@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: PygvCgAnc2bLr+JnWNnrAA--.35530S3 X-Coremail-Antispam: 1Uf129KBjvJXoW7tw45GrW5ur4xJFyrWF45Wrg_yoW8Ar4Dpa 93C3WkXr1xur1UX34Dtr18CrWkta4kAa1YkFy2q3W8Gr1j9a1DKa1agr4DZay3ArsrAa9F vFsFgry8A34SvrJanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07j773kUUUUU= X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/xtbB0g0bXmfirF9iZQABsq Content-Type: text/plain; charset="utf-8" From: Andy Yan The RK3036 HDMI DDC bus requires it's PHY's reference clock to be enabled first before normal DDC communication can be carried out. Therefore, both RK3036 and RK3128 HDMI require two identical clocks. Signed-off-by: Andy Yan Reviewed-by: Rob Herring (Arm) --- (no changes since v1) .../bindings/display/rockchip/rockchip,inno-hdmi.yaml | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,in= no-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,= inno-hdmi.yaml index 5b87b0f1963e1..9d1e7f894ea54 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi= .yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi= .yaml @@ -23,13 +23,11 @@ properties: maxItems: 1 =20 clocks: - minItems: 1 items: - description: The HDMI controller main clock - description: The HDMI PHY reference clock =20 clock-names: - minItems: 1 items: - const: pclk - const: ref @@ -87,11 +85,6 @@ allOf: const: rockchip,rk3128-inno-hdmi =20 then: - properties: - clocks: - minItems: 2 - clock-names: - minItems: 2 required: - power-domains =20 @@ -106,8 +99,8 @@ examples: compatible =3D "rockchip,rk3036-inno-hdmi"; reg =3D <0x20034000 0x4000>; interrupts =3D ; - clocks =3D <&cru PCLK_HDMI>; - clock-names =3D "pclk"; + clocks =3D <&cru PCLK_HDMI>, <&cru SCLK_LCDC>; + clock-names =3D "pclk", "ref"; pinctrl-names =3D "default"; pinctrl-0 =3D <&hdmi_ctl>; #sound-dai-cells =3D <0>; --=20 2.43.0