From nobody Thu Dec 18 01:03:50 2025 Received: from m16.mail.163.com (m16.mail.163.com [117.135.210.2]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CBE9B1DFF8; Tue, 25 Mar 2025 13:30:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=117.135.210.2 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909434; cv=none; b=AkgPL+/bjqZQkRt+RXA5A561e3bukwaL1Yv0/ufZt8VFcC7537+v7Lrw+eQjpYLzwTNGHug4xKHREYEdAz0jeA/zFukNT6q+Mm1eDPOgB2Cp+11ywzE46zO+iaaWLDR2M4lxDWVzTxuttLTCf2kGfVjx9AslfqVt43VQNfpYCvc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909434; c=relaxed/simple; bh=lHPcC6roTWI6j5MuLnP9MGdLrR/C3X98BMj/TCy80J0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CCZxGSHKks0gIHoYONrHYlN0pdWoxf+BLV+rO8mr1DFuBDH21kSPgDhsiwg3+DwmAAxmtyd3lQs9G9JQQtpbdMh2+bisBtnxvEdt1wxS5q48qHWlQVRUzPAit0uq18bn3+1ajpdf7YVakG6WBZ4Z1D5RiMN1vGuFkcC5rd3V0Zk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=GVqfaRHJ; arc=none smtp.client-ip=117.135.210.2 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="GVqfaRHJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-ID:MIME-Version; bh=SNu0F 4yGXjEea7fLM5tg1tfl9TwC9mxjxgn2oB/nJL4=; b=GVqfaRHJ8f4Dbd49Yoefd PGivXKGqhOuFpE7Laf6x4CVnBDBDYl9cFSGTj8Z37rNN+gWIkgnm2dMIHSZbktMU cNnhDgLWKj1zkB6o/9nI0e/afnYt+U6RHeKkKv2qFwX88v1cLD/kMiG5cEEvx90M p2tui/QSvq5CzAkzC6+LMM= Received: from ProDesk.. (unknown []) by gzsmtp4 (Coremail) with SMTP id PygvCgAnc2bLr+JnWNnrAA--.35530S3; Tue, 25 Mar 2025 21:29:51 +0800 (CST) From: Andy Yan To: heiko@sntech.de Cc: conor+dt@kernel.org, krzk+dt@kernel.org, robh@kernel.org, hjc@rock-chips.com, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Andy Yan Subject: [PATCH v2 1/6] dt-bindings: display: rockchip,inno-hdmi: Fix Document of RK3036 compatible Date: Tue, 25 Mar 2025 21:29:35 +0800 Message-ID: <20250325132944.171111-2-andyshrk@163.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250325132944.171111-1-andyshrk@163.com> References: <20250325132944.171111-1-andyshrk@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: PygvCgAnc2bLr+JnWNnrAA--.35530S3 X-Coremail-Antispam: 1Uf129KBjvJXoW7tw45GrW5ur4xJFyrWF45Wrg_yoW8Ar4Dpa 93C3WkXr1xur1UX34Dtr18CrWkta4kAa1YkFy2q3W8Gr1j9a1DKa1agr4DZay3ArsrAa9F vFsFgry8A34SvrJanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07j773kUUUUU= X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/xtbB0g0bXmfirF9iZQABsq Content-Type: text/plain; charset="utf-8" From: Andy Yan The RK3036 HDMI DDC bus requires it's PHY's reference clock to be enabled first before normal DDC communication can be carried out. Therefore, both RK3036 and RK3128 HDMI require two identical clocks. Signed-off-by: Andy Yan Reviewed-by: Rob Herring (Arm) --- (no changes since v1) .../bindings/display/rockchip/rockchip,inno-hdmi.yaml | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,in= no-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,= inno-hdmi.yaml index 5b87b0f1963e1..9d1e7f894ea54 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi= .yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi= .yaml @@ -23,13 +23,11 @@ properties: maxItems: 1 =20 clocks: - minItems: 1 items: - description: The HDMI controller main clock - description: The HDMI PHY reference clock =20 clock-names: - minItems: 1 items: - const: pclk - const: ref @@ -87,11 +85,6 @@ allOf: const: rockchip,rk3128-inno-hdmi =20 then: - properties: - clocks: - minItems: 2 - clock-names: - minItems: 2 required: - power-domains =20 @@ -106,8 +99,8 @@ examples: compatible =3D "rockchip,rk3036-inno-hdmi"; reg =3D <0x20034000 0x4000>; interrupts =3D ; - clocks =3D <&cru PCLK_HDMI>; - clock-names =3D "pclk"; + clocks =3D <&cru PCLK_HDMI>, <&cru SCLK_LCDC>; + clock-names =3D "pclk", "ref"; pinctrl-names =3D "default"; pinctrl-0 =3D <&hdmi_ctl>; #sound-dai-cells =3D <0>; --=20 2.43.0 From nobody Thu Dec 18 01:03:50 2025 Received: from m16.mail.163.com (m16.mail.163.com [220.197.31.3]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0FBFB25A2D1; Tue, 25 Mar 2025 13:30:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.31.3 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909439; cv=none; b=Tdg5JmApMuDbTCd2NJMSJmJKYVTrA+H27WNWQDfd6KabDnCMqmj3l669CzVrBY7pXdV/igWimTF9eQLWs3itiaqVbGWeen/4zTI16gUIuvWE9C/Xg33O9bsDNsathvYc1OLBXuMpA0b79jDbdxY6O9GEXdW6r2+CxL8xOxsYX2A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909439; c=relaxed/simple; bh=Onfwe7BIoo+XN6snqbku8zp5ci0I7j6pmqOlv7+LQTc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jGS4bE70B2vqFTVHXDsuS2AeecMaBDgjgHZk0RNIlgisZzP+P53yWjohrdONtfQgdYg6iAtjG3KdConcisEznjFfDm1K5NwTsZsEn59xAMU63DmEhq/IgEvco3uqXoHyDs+XE14zcbBwXhNoaqdQ98E+IOgiUgtzTB+DQUH89q8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=arhNAZxv; arc=none smtp.client-ip=220.197.31.3 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="arhNAZxv" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-ID:MIME-Version; bh=R6TTX 6i0XQxaEnW4x1mI+/13/Nh8Vd+xGWNS930sgHw=; b=arhNAZxvxgBjReAXbNFDD Fva9rgXgRJbS+4y7+UonVJo1dXpo8/tcFOu1XQuyevmlbRRcV9YdZOyXBZiOmssk tvY2S9+0BlpiqPO5M3UfmfTbqqaZjwSH5LGVJ5ljK6k93eSe88Mld+jaXoJomGeW 4wQeZhQrnDh2XQ/6W9CtmA= Received: from ProDesk.. (unknown []) by gzsmtp4 (Coremail) with SMTP id PygvCgAnc2bLr+JnWNnrAA--.35530S4; Tue, 25 Mar 2025 21:29:52 +0800 (CST) From: Andy Yan To: heiko@sntech.de Cc: conor+dt@kernel.org, krzk+dt@kernel.org, robh@kernel.org, hjc@rock-chips.com, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Andy Yan Subject: [PATCH v2 2/6] dt-bindings: display: rockchip,inno-hdmi: Document GRF for RK3036 HDMI Date: Tue, 25 Mar 2025 21:29:36 +0800 Message-ID: <20250325132944.171111-3-andyshrk@163.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250325132944.171111-1-andyshrk@163.com> References: <20250325132944.171111-1-andyshrk@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: PygvCgAnc2bLr+JnWNnrAA--.35530S4 X-Coremail-Antispam: 1Uf129KBjvJXoW7ZryxJFW8ZF1kCrW8WFW8Crg_yoW8GF45pa s3C3srWFyxGF17X34ktF1kCrWYqF97Aa15GFW2qr17tF12gan5Ka1agwn8ZF4UAFs7ZFyS 9F47GF98Aw1Ivr7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07j2ZXrUUUUU= X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/1tbiqAobXmfipyL8oQAAs6 Content-Type: text/plain; charset="utf-8" From: Andy Yan HDMI on RK3036 use GRF control the HSYNC/VSYNC polarity, but this part is missing when it first landing upstream. Document that it is mandatory for RK3036 HDMI. Signed-off-by: Andy Yan --- (no changes since v1) .../bindings/display/rockchip/rockchip,inno-hdmi.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,in= no-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,= inno-hdmi.yaml index 9d1e7f894ea54..290376bec079a 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi= .yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi= .yaml @@ -56,6 +56,12 @@ properties: - port@0 - port@1 =20 + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to GRF used for control the polarity of hsync/vsync of rk3036 + HDMI. + required: - compatible - reg @@ -75,6 +81,8 @@ allOf: const: rockchip,rk3036-inno-hdmi =20 then: + required: + - rockchip,grf properties: power-domains: false =20 @@ -103,6 +111,7 @@ examples: clock-names =3D "pclk", "ref"; pinctrl-names =3D "default"; pinctrl-0 =3D <&hdmi_ctl>; + rockchip,grf =3D <&grf>; #sound-dai-cells =3D <0>; =20 ports { --=20 2.43.0 From nobody Thu Dec 18 01:03:50 2025 Received: from m16.mail.163.com (m16.mail.163.com [117.135.210.4]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CE6EE255E2E; Tue, 25 Mar 2025 13:30:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=117.135.210.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909433; cv=none; b=igCW/OUJKH75TO79S9tYa5VaypSJA0Oy5RCzNSomqBDanQ2r4AABD321S+RObja14T/ZKSujV0EO/6AHQAbWFHmLQ7Rn+CsObQq6LWR7Y825D7Lib0oWjXUbWlqEOF/Jo8p42Tw2fQtaOhKO3jMan62EURv9iGshubcoymciNWo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909433; c=relaxed/simple; bh=6tVor1+69590jipXzHDAXqYT7/TGb44mwBL8r5+/6GM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ErBVYCCZUApuesqiZfX2w2/6+RAOweiLl8v6hPvhjrQcQij938SNCxlrC7E7K6kN3OuG6wlqpjvrxSpBSWDv7QrN0ZpqiTlum++N3AHOjGmUxJmDv6iQWCTixrGJGbV1WKus3Cif3BfKsauTyfFbiezYXSirq4/NrElUkHMt86w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=kIhzMVOC; arc=none smtp.client-ip=117.135.210.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="kIhzMVOC" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-ID:MIME-Version; bh=ImgTL dqMQ1HWln0/pjTdJ4Wv5Wf+bnJovoBh7j+FUq8=; b=kIhzMVOCLBFylit8p4PG3 RQuG14+3qmmuGUjVkkouivWS3loXJ5QTbei0vILd9ta98s4X5nmKmPK6TYcAJovC A+q2frQ7jwaTDy5ovPPy8pINeVKq7Ip8PihXnUas8AX/kB296qxcIOZJbpRMwKAs 6l8VMdbtxS3GHEMNV5RtFM= Received: from ProDesk.. (unknown []) by gzsmtp4 (Coremail) with SMTP id PygvCgAnc2bLr+JnWNnrAA--.35530S5; Tue, 25 Mar 2025 21:29:53 +0800 (CST) From: Andy Yan To: heiko@sntech.de Cc: conor+dt@kernel.org, krzk+dt@kernel.org, robh@kernel.org, hjc@rock-chips.com, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Andy Yan Subject: [PATCH v2 3/6] drm/rockchip: inno-hdmi: Simplify error handler with dev_err_probe Date: Tue, 25 Mar 2025 21:29:37 +0800 Message-ID: <20250325132944.171111-4-andyshrk@163.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250325132944.171111-1-andyshrk@163.com> References: <20250325132944.171111-1-andyshrk@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: PygvCgAnc2bLr+JnWNnrAA--.35530S5 X-Coremail-Antispam: 1Uf129KBjvJXoW7uryfXr47XFy5uw1kCr17Jrb_yoW8AFWUpr ZxJFyjva48XF18W347ua15Ar1Sya1Uta18CrZrGwn5Zw17Zr4Dtry3ZFWFqrWFyF95Za1a y393Xa4UZ3W7WaUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jZfHUUUUUU= X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/xtbB0hMbXmfirF9ioAAAsw Content-Type: text/plain; charset="utf-8" From: Andy Yan Use dev_err_probe simplify the error handle. Signed-off-by: Andy Yan --- Changes in v2: - First included in this series drivers/gpu/drm/rockchip/inno_hdmi.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchi= p/inno_hdmi.c index 483ecfeaebb08..e891d42dd08a4 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -885,29 +885,22 @@ static int inno_hdmi_bind(struct device *dev, struct = device *master, return PTR_ERR(hdmi->regs); =20 hdmi->pclk =3D devm_clk_get(hdmi->dev, "pclk"); - if (IS_ERR(hdmi->pclk)) { - DRM_DEV_ERROR(hdmi->dev, "Unable to get HDMI pclk clk\n"); - return PTR_ERR(hdmi->pclk); - } + if (IS_ERR(hdmi->pclk)) + return dev_err_probe(dev, PTR_ERR(hdmi->pclk), "Unable to get HDMI pclk\= n"); =20 ret =3D clk_prepare_enable(hdmi->pclk); - if (ret) { - DRM_DEV_ERROR(hdmi->dev, - "Cannot enable HDMI pclk clock: %d\n", ret); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, "Cannot enable HDMI pclk: %d\n", ret); =20 hdmi->refclk =3D devm_clk_get_optional(hdmi->dev, "ref"); if (IS_ERR(hdmi->refclk)) { - DRM_DEV_ERROR(hdmi->dev, "Unable to get HDMI reference clock\n"); - ret =3D PTR_ERR(hdmi->refclk); + ret =3D dev_err_probe(dev, PTR_ERR(hdmi->refclk), "Unable to get HDMI re= fclk\n"); goto err_disable_pclk; } =20 ret =3D clk_prepare_enable(hdmi->refclk); if (ret) { - DRM_DEV_ERROR(hdmi->dev, - "Cannot enable HDMI reference clock: %d\n", ret); + ret =3D dev_err_probe(dev, ret, "Cannot enable HDMI refclk: %d\n", ret); goto err_disable_pclk; } =20 --=20 2.43.0 From nobody Thu Dec 18 01:03:50 2025 Received: from m16.mail.163.com (m16.mail.163.com [117.135.210.3]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2856E25A322; Tue, 25 Mar 2025 13:30:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=117.135.210.3 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909437; cv=none; b=kmIIz14UArSQOnbXrW75Ov4HTTI5GIBF0Xm58Fsbt0/Zz71TgK6sbyD3kLGcEfa2E62ATReDww6Ha7aDR7uJY+ODjnmP7E7LFrQ87WOW0ODRmdWJnu82IRb3l7tOIS6Tz55bhgXZiz5kQQPZbWM1rbkdUocykgxNYnvDQifE8Ng= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909437; c=relaxed/simple; bh=qRxMs/0Orm9+v2KlI7BI7V6SOQpKNDSjvZHUzjyF4YI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=eo5963GinmkVQTS7MHbVY6jji7gm5Z3JJ99YiGA9TZcnHQgYMVZpiUbiTTbKf5CVf3464ll6wtoSlhI6bXHPg9ii88rdW+Xwe4tez4HSSjNa39lulYhnY81/Zd19hJwnSjmTNjQXsj3T6vM9Ok4JX39oEONv7UMUVTp0wiW1tOw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=fu7UU5JI; arc=none smtp.client-ip=117.135.210.3 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="fu7UU5JI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-ID:MIME-Version; bh=Z+Uzc h6EUA5KKSDVbfXUEIaM57kueShEZfjW0O0iCdA=; b=fu7UU5JIFwLPWf3wyRgTx +La/s79dVhcUwOCPv96643Rx533kDnz83TXo+H2ZToo7XQWFiDAiv4x9/6s/vv6L vpkhSdyPiY6ONRTpFn6avAQJNjTCY4+7q//+UiFeXmUXrkwVvybHsn+lE0+jPaBQ znc8T1oZNRrtqs4+CmrDvo= Received: from ProDesk.. (unknown []) by gzsmtp4 (Coremail) with SMTP id PygvCgAnc2bLr+JnWNnrAA--.35530S6; Tue, 25 Mar 2025 21:29:54 +0800 (CST) From: Andy Yan To: heiko@sntech.de Cc: conor+dt@kernel.org, krzk+dt@kernel.org, robh@kernel.org, hjc@rock-chips.com, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Andy Yan Subject: [PATCH v2 4/6] drm/rockchip: inno-hdmi: Fix video timing HSYNC/VSYNC polarity setting for rk3036 Date: Tue, 25 Mar 2025 21:29:38 +0800 Message-ID: <20250325132944.171111-5-andyshrk@163.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250325132944.171111-1-andyshrk@163.com> References: <20250325132944.171111-1-andyshrk@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: PygvCgAnc2bLr+JnWNnrAA--.35530S6 X-Coremail-Antispam: 1Uf129KBjvJXoWxZr17Gry3Ar18CFW5Xw4xZwb_yoWrJrWfpa y7Ca4UJF43Xa13Jw4xAa93Cr1aga97ta12yry7W3Wa9w12gr9YyF1kZF43uF1rAF93Was7 trW8Ga4UG3W7Zw7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jfeOJUUUUU= X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/xtbBkB4bXmfirygTGgAAsA Content-Type: text/plain; charset="utf-8" From: Andy Yan The HSYNC/VSYNC polarity of rk3036 HDMI are controlled by GRF. Without the polarity configuration in GRF, it can be observed from the HDMI protocol analyzer that the H/V front/back timing output by RK3036 HDMI are currently not in line with the specifications. Signed-off-by: Andy Yan --- Changes in v2: - First included in this series drivers/gpu/drm/rockchip/inno_hdmi.c | 36 +++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchi= p/inno_hdmi.c index e891d42dd08a4..db4b4038e51d5 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -10,10 +10,12 @@ #include #include #include +#include #include #include #include #include +#include =20 #include #include @@ -29,8 +31,19 @@ =20 #include "inno_hdmi.h" =20 +#define HIWORD_UPDATE(val, mask) ((val) | (mask) << 16) + #define INNO_HDMI_MIN_TMDS_CLOCK 25000000U =20 +#define RK3036_GRF_SOC_CON2 0x148 +#define RK3036_HDMI_PHSYNC BIT(4) +#define RK3036_HDMI_PVSYNC BIT(5) + +enum inno_hdmi_dev_type { + RK3036_HDMI, + RK3128_HDMI, +}; + struct inno_hdmi_phy_config { unsigned long pixelclock; u8 pre_emphasis; @@ -38,6 +51,7 @@ struct inno_hdmi_phy_config { }; =20 struct inno_hdmi_variant { + enum inno_hdmi_dev_type dev_type; struct inno_hdmi_phy_config *phy_configs; struct inno_hdmi_phy_config *default_phy_config; }; @@ -58,6 +72,7 @@ struct inno_hdmi { struct clk *pclk; struct clk *refclk; void __iomem *regs; + struct regmap *grf; =20 struct drm_connector connector; struct rockchip_encoder encoder; @@ -374,7 +389,15 @@ static int inno_hdmi_config_video_csc(struct inno_hdmi= *hdmi) static int inno_hdmi_config_video_timing(struct inno_hdmi *hdmi, struct drm_display_mode *mode) { - int value; + int value, psync; + + if (hdmi->variant->dev_type =3D=3D RK3036_HDMI) { + psync =3D mode->flags & DRM_MODE_FLAG_PHSYNC ? RK3036_HDMI_PHSYNC : 0; + value =3D HIWORD_UPDATE(psync, RK3036_HDMI_PHSYNC); + psync =3D mode->flags & DRM_MODE_FLAG_PVSYNC ? RK3036_HDMI_PVSYNC : 0; + value |=3D HIWORD_UPDATE(psync, RK3036_HDMI_PVSYNC); + regmap_write(hdmi->grf, RK3036_GRF_SOC_CON2, value); + } =20 /* Set detail external video timing polarity and interlace mode */ value =3D v_EXTERANL_VIDEO(1); @@ -904,6 +927,15 @@ static int inno_hdmi_bind(struct device *dev, struct d= evice *master, goto err_disable_pclk; } =20 + if (hdmi->variant->dev_type =3D=3D RK3036_HDMI) { + hdmi->grf =3D syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,gr= f"); + if (IS_ERR(hdmi->grf)) { + ret =3D dev_err_probe(dev, PTR_ERR(hdmi->grf), + "Unable to get rockchip,grf\n"); + goto err_disable_clk; + } + } + irq =3D platform_get_irq(pdev, 0); if (irq < 0) { ret =3D irq; @@ -988,11 +1020,13 @@ static void inno_hdmi_remove(struct platform_device = *pdev) } =20 static const struct inno_hdmi_variant rk3036_inno_hdmi_variant =3D { + .dev_type =3D RK3036_HDMI, .phy_configs =3D rk3036_hdmi_phy_configs, .default_phy_config =3D &rk3036_hdmi_phy_configs[1], }; =20 static const struct inno_hdmi_variant rk3128_inno_hdmi_variant =3D { + .dev_type =3D RK3128_HDMI, .phy_configs =3D rk3128_hdmi_phy_configs, .default_phy_config =3D &rk3128_hdmi_phy_configs[1], }; --=20 2.43.0 From nobody Thu Dec 18 01:03:50 2025 Received: from m16.mail.163.com (m16.mail.163.com [220.197.31.2]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D5CE82566EA; Tue, 25 Mar 2025 13:30:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.31.2 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909433; cv=none; b=N4z99fntGXg3eJKRrE+gTzZ/gZVpXvjqcOThopWgEM+SYGNZdJhxo6Rp2dtxX+lfh9JA9IDBBPK9T/AlDhnyhWjweEoHiSlXh/BNYhqqBc0XCmCBLTbvOS/G2dsCM9BPODrVJQ9oQvt8Vn9UiQomMW79nD1f4MqncBP7LGlOHn8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909433; c=relaxed/simple; bh=J/FkQ+SkHYYoPQcELkb+tIcpNOe26kLfqD3rb2wWEoo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UNDx+RZTIQQc9y8ygp2eLjiTAu0kqKl4TnJKDUAWiyqp0GAhDOdZYZRTJZL0n+L8v/D8VdJf9MGA1BFvH2zUFsqeTvPyNdUujAagCpP+OTxDwpV74VPpzqVTlRnpiv0+ngNqnsyfjXWr59ZzEmfeJOSos+YV6ieVpCkl2FYvrkE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=lSMIlPKB; arc=none smtp.client-ip=220.197.31.2 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="lSMIlPKB" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-ID:MIME-Version; bh=XjB5C GDy56iSBUj/onMIQC1Fw0WRXap96Du59NyDvPE=; b=lSMIlPKBaavnVZ2+ML+uR sMEo+rGV5CvITGeiAufzj/GX2TxZ0m94rvlK8Bu6zxgsIx1vLIbpeNJanvOFLON5 CRJFXKa50V+dEkyR2P3t34H985oSIW/pOeznLZguap7Q/WcDmkOpu/m2Z6xwg4/f wySlR1QbqSEbJB0LDkzvSA= Received: from ProDesk.. (unknown []) by gzsmtp4 (Coremail) with SMTP id PygvCgAnc2bLr+JnWNnrAA--.35530S7; Tue, 25 Mar 2025 21:29:55 +0800 (CST) From: Andy Yan To: heiko@sntech.de Cc: conor+dt@kernel.org, krzk+dt@kernel.org, robh@kernel.org, hjc@rock-chips.com, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Andy Yan Subject: [PATCH v2 5/6] ARM: dts: rockchip: Add ref clk for hdmi Date: Tue, 25 Mar 2025 21:29:39 +0800 Message-ID: <20250325132944.171111-6-andyshrk@163.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250325132944.171111-1-andyshrk@163.com> References: <20250325132944.171111-1-andyshrk@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: PygvCgAnc2bLr+JnWNnrAA--.35530S7 X-Coremail-Antispam: 1Uf129KBjvdXoWrKF1xJw4kAFWfZry3tw4xWFg_yoWDWFX_t3 WIgw15GF4fGrZIq34Dtr4UW39F9w4fC397XrnYqr4UJF9aqr4UXF4kGayIyry5Jay2g3sx CFZ5Xw4aya1agjkaLaAFLSUrUUUUjb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT 9fnUUvcSsGvfC2KfnxnUUI43ZEXa7IU0Jrc3UUUUU== X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/xtbBkB4bXmfirygTGgABsB Content-Type: text/plain; charset="utf-8" From: Andy Yan The RK3036 HDMI DDC bus requires it's PHY's reference clock to be enabled first before normal DDC communication can be carried out. Signed-off-by: Andy Yan --- (no changes since v1) arch/arm/boot/dts/rockchip/rk3036.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/rockchip/rk3036.dtsi b/arch/arm/boot/dts/roc= kchip/rk3036.dtsi index 6039a0908af1c..22685cd23a708 100644 --- a/arch/arm/boot/dts/rockchip/rk3036.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3036.dtsi @@ -403,8 +403,8 @@ hdmi: hdmi@20034000 { compatible =3D "rockchip,rk3036-inno-hdmi"; reg =3D <0x20034000 0x4000>; interrupts =3D ; - clocks =3D <&cru PCLK_HDMI>; - clock-names =3D "pclk"; + clocks =3D <&cru PCLK_HDMI>, <&cru SCLK_LCDC>; + clock-names =3D "pclk", "ref"; pinctrl-names =3D "default"; pinctrl-0 =3D <&hdmi_ctl>; #sound-dai-cells =3D <0>; --=20 2.43.0 From nobody Thu Dec 18 01:03:50 2025 Received: from m16.mail.163.com (m16.mail.163.com [220.197.31.5]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1FA472580D0; Tue, 25 Mar 2025 13:30:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.31.5 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909434; cv=none; b=snZrJYJLJlhaBwnbhyZuL8QWZ5fnD25wVJoaNpXXLasjD5dKs/gnaZM/ypbP8QJE8AUXh6am5LyI8/45PEMJJhDhOVUzgs4sthjb35Qyq+vZIGHNi3eW3mni1CpwJ+T52J8lzSqhp4XgDmpin0qhU68JiN6eRvNggysg0Vu+kgo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742909434; c=relaxed/simple; bh=OVq6YEbQ1WTJhROpiEdv5FE1pk85yX2IfDiVLjvc5h8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CyeeAT+oJHNtPqJV+E+soUFmUgvTBnrGzQZdzWEwR0fyKpqEVwFshkEz4OSmTXnTR7/GaNXaHKmnRgFO3xHNrDQqdiWJaYx9AE2BOdbqr/+tsGFBEZhvt39fH5P23Nd1nUU9A6ZpZ4mFcpa2mu8ArTxDC9oifjzJs4htpEIS0U8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=K79ks/LL; arc=none smtp.client-ip=220.197.31.5 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="K79ks/LL" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-ID:MIME-Version; bh=b4xUr 2g8P2Yxfewyx9tncEy5+j9/6LhB8iszS/EBG4A=; b=K79ks/LLuSMZu35FzSAPn FUTPmIjAhC6jRxmEHuSHfrsf1OS/CBsVJKZUTidAB3cZKq8PazjI+RmXXcG4zLbO V5+8Zs/jiX54UmyHs0pXbxxTRL7VnbfYHbpJQ0TpOVwGV5oyPplK5HwolREy8ODX vASdnUq9VjMuUXvyqzQnp4= Received: from ProDesk.. (unknown []) by gzsmtp4 (Coremail) with SMTP id PygvCgAnc2bLr+JnWNnrAA--.35530S8; Tue, 25 Mar 2025 21:29:56 +0800 (CST) From: Andy Yan To: heiko@sntech.de Cc: conor+dt@kernel.org, krzk+dt@kernel.org, robh@kernel.org, hjc@rock-chips.com, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Andy Yan Subject: [PATCH v2 6/6] Revert "ARM: dts: rockchip: drop grf reference from rk3036 hdmi" Date: Tue, 25 Mar 2025 21:29:40 +0800 Message-ID: <20250325132944.171111-7-andyshrk@163.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250325132944.171111-1-andyshrk@163.com> References: <20250325132944.171111-1-andyshrk@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: PygvCgAnc2bLr+JnWNnrAA--.35530S8 X-Coremail-Antispam: 1Uf129KBjvdXoW7Gry5Kr43uFW8Ary3Kw15Arb_yoWkGwcEya 4Ig3W5Ka1FkrWYqry8tw4UCwsFvws5GFZ3Jw1rJr4UGwnYqF4DuFs5GayIyr15Gay2grZ3 WFZ5Xa1Yyw1agjkaLaAFLSUrUUUUjb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT 9fnUUvcSsGvfC2KfnxnUUI43ZEXa7IU0JDG5UUUUU== X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/1tbiqBQbXmfipyL9GAAAsc Content-Type: text/plain; charset="utf-8" From: Andy Yan This reverts commit 1580ccb6ed9dc76b8ff3e2d8912e8215c8b0fa6d. The HSYNC/VSYNC polarity of rk3036 HDMI are controlled by GRF. Without the polarity configuration in GRF, it can be observed from the HDMI protocol analyzer that the H/V front/back timing output by RK3036 HDMI are currently not in line with the specifications. Signed-off-by: Andy Yan --- Changes in v2: - First included in this series arch/arm/boot/dts/rockchip/rk3036.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/rockchip/rk3036.dtsi b/arch/arm/boot/dts/roc= kchip/rk3036.dtsi index 22685cd23a708..95ae815ba56d3 100644 --- a/arch/arm/boot/dts/rockchip/rk3036.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3036.dtsi @@ -405,6 +405,7 @@ hdmi: hdmi@20034000 { interrupts =3D ; clocks =3D <&cru PCLK_HDMI>, <&cru SCLK_LCDC>; clock-names =3D "pclk", "ref"; + rockchip,grf =3D <&grf>; pinctrl-names =3D "default"; pinctrl-0 =3D <&hdmi_ctl>; #sound-dai-cells =3D <0>; --=20 2.43.0