From nobody Fri Dec 19 06:31:03 2025 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B914E226D14 for ; Thu, 20 Mar 2025 16:00:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742486451; cv=none; b=uFLCmuNnQ4hU2EVPstrE7ZO/b3nndPcyfW3VfHO3OFq8VZcCrz4oafKPu6G/0dMrr1OPwLvzK7j3jLqjydARMjOq3jBieIHWkcpq89Ku5FDg9qcLeDaeFrIWNJDRWxKDyLykV94c+/BD1ARtT9saBfyC6Vmu0J38e9XVrBiaAd4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742486451; c=relaxed/simple; bh=S8uUUDEaNeicbiSY8YvRq9DMlAGVbKYKCtdKJ0sZaN8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=F6byVD6slEP8yYYsGScCJirrOLdqRMU5Dbg27ABFFgkWTp1q8FoabGY4l3eP0JzemTXCX+SbxzUv7dsMHu26yCcyz8Qz2+ZVkYfwJ1RjIsSEmdiWueFyPg9Shg2raLB525dJArFtYoPksNnAY3b4X5fvdB/qEuTUMADCB3bCXEo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=Vblrh3lv; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="Vblrh3lv" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 219DA16B0; Thu, 20 Mar 2025 16:58:54 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1742486335; bh=S8uUUDEaNeicbiSY8YvRq9DMlAGVbKYKCtdKJ0sZaN8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Vblrh3lv/gvKlFX8Tj1anOjHa7GGzN8wgMpOUTM6KzVpqkDhYwJITQJ2vBBfVEX+T 6AzEO+pbdCwvqViN/QPePI5ovUhqDA0hAucKgTVGzspMOmZV17J16VUy4vqjOXGJVc KeTYHXZi9AgS/5jqKVuURE0tkCjc9MuZm0ikLLB4= From: Tomi Valkeinen Date: Thu, 20 Mar 2025 18:00:02 +0200 Subject: [PATCH 07/18] drm/bridge: cdns-dsi: Fail if HS rate changed when validating PHY config Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250320-cdns-dsi-impro-v1-7-725277c5f43b@ideasonboard.com> References: <20250320-cdns-dsi-impro-v1-0-725277c5f43b@ideasonboard.com> In-Reply-To: <20250320-cdns-dsi-impro-v1-0-725277c5f43b@ideasonboard.com> To: Jyri Sarha , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Vinod Koul , Kishon Vijay Abraham I , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, Francesco Dolcini , Aradhya Bhatia , Devarsh Thakkar , Tomi Valkeinen X-Mailer: b4 0.15-dev-c25d1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2073; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=S8uUUDEaNeicbiSY8YvRq9DMlAGVbKYKCtdKJ0sZaN8=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBn3DuYTGxHpRYvxdJmIKBq59EYfeyz8armZDSFi WgtOKxa5tGJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZ9w7mAAKCRD6PaqMvJYe 9cAbD/0XJR/OzJMyCY80P6J7hAe42b9HW4uuiKI7qYtZ9Maz55A44nYyMnkfX/NuoauiFXg6DVw fFZCvsiaGt7pGWu1JP5nvWExjakOXoAbLY+HW5Jyfo6IAnUtsCmu5noBhbTwXA43kSDjJqS/tkc kjL5Osb8zO8vdUmXRs6jboqkXPVk4syhubYG/kjT+cPckA7LdWmdqeA1ilIwSq6OLTFHA8oJ2Zq LTM5wyvCBkRBLr2HiW4/cCDqy12klZebxH/9H6VZtv2fxeTDX8Zvnbym8DbdpdiYAIIUv0aqWF2 Z2MrISss38HMR8Jk0Z8k5ZpOcudEYJlLpNWnhWz8Zz/xTyCt55MdwcXB0KJG0HxZpcYfwJ6spSD IognHnqdJz7vxjT0Dfpt99TbLICda4kGCGjoW4Yy7dw4lMvQuaYVeq8n21TiI8lrLAVJgilL65O o7R3XgQ1suo7xiVUR+QGEy4jLPhg0Iq7IAuOzjwFcZ0/ExfthPvdITtlhjPeJLPD6bgzuQjx9+s gvwzjRxXyxqVCChJDB8JpoYK51axDXMqR0eXgi2K056tqn+Ly47RPo9GVbMAXmlTEpKB0n+S1nH fx5cjldz4+JiKCsdjOKm4G8+w9w4WXVMSNiZ4436X0ZYUjQ5c9K6OKUIWx5DsRXyWXp0HjhMNH1 uMgWWs/aiwRzywQ== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 The phy_validate() can change the HS clock rate we passed to it in the PHY config, depending on what the HW can actually do. The driver just ignores this at the moment, but if the actual HS clock rate is different than the requested one, the pipeline will fail as all the DSI timing calculations will be incorrect. There are ways to improve DSI operation for various clock rates, but for now, just add a check to see if the rate changed, and return an error if that happens. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/d= rm/bridge/cadence/cdns-dsi-core.c index 53322407c1b0..9238acf69823 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c @@ -580,6 +580,7 @@ static int cdns_dsi_check_conf(struct cdns_dsi *dsi, unsigned long dsi_hss_hsa_hse_hbp; unsigned int nlanes =3D output->dev->lanes; int mode_clock =3D (mode_valid_check ? mode->clock : mode->crtc_clock); + unsigned long req_hs_clk_rate; int ret; =20 ret =3D cdns_dsi_mode2cfg(dsi, mode, dsi_cfg, mode_valid_check); @@ -596,10 +597,20 @@ static int cdns_dsi_check_conf(struct cdns_dsi *dsi, if (ret) return ret; =20 + req_hs_clk_rate =3D output->phy_opts.mipi_dphy.hs_clk_rate; ret =3D phy_validate(dsi->dphy, PHY_MODE_MIPI_DPHY, 0, &output->phy_opts); if (ret) return ret; =20 + if (req_hs_clk_rate !=3D output->phy_opts.mipi_dphy.hs_clk_rate) { + dev_err(&dsi->dphy->dev, + "validation changed hs_clk_rate from %lu to %lu, diff %lu\n", + req_hs_clk_rate, output->phy_opts.mipi_dphy.hs_clk_rate, + output->phy_opts.mipi_dphy.hs_clk_rate - + req_hs_clk_rate); + return -EINVAL; + } + dsi_hss_hsa_hse_hbp =3D dsi_cfg->hbp + DSI_HBP_FRAME_OVERHEAD; if (output->dev->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) dsi_hss_hsa_hse_hbp +=3D dsi_cfg->hsa + DSI_HSA_FRAME_OVERHEAD; --=20 2.43.0