From nobody Wed Dec 17 08:52:28 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84FB925744E for ; Wed, 19 Mar 2025 09:31:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742376697; cv=none; b=NHc4MylS3cz1lP3bUss0S6PdcM74vUOPw3LF0+QlLUhZnr2CDPDh3qZTtpf2wxVZCHhkrDQEwIbhIvO8iq0MR+MzL/34wRqMFMwoA8nDgOBguNwnblfBRvasK64fg1XQDE+15gEteRHed74EFhttWO0ozr3VYreuIzOjGEK9q8s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742376697; c=relaxed/simple; bh=x7l0PcBAwBQ5PVjrvhw7mYOlBby/JPar1g9BxOMRBIQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=B6zwhP4Jxne5tljRLl4mwFBDzEoZyNU7fKBurNdEGBq8rQvUbZM9EMA9H9SlbusPFuKqZ5yhLqTU9M/NeyBdTTq+vOQN/bc772svVADGqnpOWft8jGD/YsHshtBho49uPy1hTtq0bsWiQg+7BBGJJuTt6u+d6geEgTOOje5kOPE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=cqTmTDLo; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="cqTmTDLo" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2A847C4CEE9; Wed, 19 Mar 2025 09:31:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742376697; bh=x7l0PcBAwBQ5PVjrvhw7mYOlBby/JPar1g9BxOMRBIQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cqTmTDLoCx/XQ8XTxKWiqTJiJcpbmzBzr07rLr7YAzWt4/zYinNbbxuXOxrTsbvcR 0n4IVwHvRCnjwS9QYzQTuRWTo/WKV2/bbbGoPwdLGbUrR9TSkesYLfghXMd4RmD1g7 woTf/gWvo0I8WIfQ/6N4owbsXhsrGTq6C7IT7bhYzPa+jIEMa53DplXTsdu3ukVkEz lHdo9E2DLUStIHz0eUf6MAuB0jzngF17+6nZC8bLAy3AzRp+QuFY+y835D8oVr+WXj sG6RcL/sW1ZYl6Yk4VJjfTDCd1AYziiLzN6LTwriJnzHErQcj0mB0paVPpi3cY0Hnh eU/JWSyEDN6zw== From: "Jiri Slaby (SUSE)" To: tglx@linutronix.de Cc: maz@kernel.org, linux-kernel@vger.kernel.org, "Jiri Slaby (SUSE)" , Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= , David Airlie , Simona Vetter , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , Philipp Zabel , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH v2 18/57] irqdomain: gpu: Switch to irq_domain_create_linear() Date: Wed, 19 Mar 2025 10:29:11 +0100 Message-ID: <20250319092951.37667-19-jirislaby@kernel.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250319092951.37667-1-jirislaby@kernel.org> References: <20250319092951.37667-1-jirislaby@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable irq_domain_add_linear() is going away as being obsolete now. Switch to the preferred irq_domain_create_linear(). That differs in the first parameter: It takes more generic struct fwnode_handle instead of struct device_node. Therefore, of_fwnode_handle() is added around the parameter. Note some of the users can likely use dev->fwnode directly instead of indirect of_fwnode_handle(dev->of_node). But dev->fwnode is not guaranteed to be set for all, so this has to be investigated on case to case basis (by people who can actually test with the HW). Signed-off-by: Jiri Slaby (SUSE) Cc: Alex Deucher Cc: "Christian K=C3=B6nig" Cc: David Airlie Cc: Simona Vetter Cc: Rob Clark Cc: Abhinav Kumar Cc: Dmitry Baryshkov Cc: Sean Paul Cc: Marijn Suijten Cc: Philipp Zabel Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org --- drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 4 ++-- drivers/gpu/drm/msm/msm_mdss.c | 2 +- drivers/gpu/ipu-v3/ipu-common.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_irq.c index 19ce4da285e8..38e7043016e1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c @@ -725,8 +725,8 @@ static const struct irq_domain_ops amdgpu_hw_irqdomain_= ops =3D { */ int amdgpu_irq_add_domain(struct amdgpu_device *adev) { - adev->irq.domain =3D irq_domain_add_linear(NULL, AMDGPU_MAX_IRQ_SRC_ID, - &amdgpu_hw_irqdomain_ops, adev); + adev->irq.domain =3D irq_domain_create_linear(NULL, AMDGPU_MAX_IRQ_SRC_ID, + &amdgpu_hw_irqdomain_ops, adev); if (!adev->irq.domain) { DRM_ERROR("GPU irq add domain failed\n"); return -ENODEV; diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index dcb49fd30402..9d006ee88a8a 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -150,7 +150,7 @@ static int _msm_mdss_irq_domain_add(struct msm_mdss *ms= m_mdss) =20 dev =3D msm_mdss->dev; =20 - domain =3D irq_domain_add_linear(dev->of_node, 32, + domain =3D irq_domain_create_linear(of_fwnode_handle(dev->of_node), 32, &msm_mdss_irqdomain_ops, msm_mdss); if (!domain) { dev_err(dev, "failed to add irq_domain\n"); diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-commo= n.c index fa77e4e64f12..223e6d563a6b 100644 --- a/drivers/gpu/ipu-v3/ipu-common.c +++ b/drivers/gpu/ipu-v3/ipu-common.c @@ -1169,8 +1169,8 @@ static int ipu_irq_init(struct ipu_soc *ipu) }; int ret, i; =20 - ipu->domain =3D irq_domain_add_linear(ipu->dev->of_node, IPU_NUM_IRQS, - &irq_generic_chip_ops, ipu); + ipu->domain =3D irq_domain_create_linear(of_fwnode_handle(ipu->dev->of_no= de), IPU_NUM_IRQS, + &irq_generic_chip_ops, ipu); if (!ipu->domain) { dev_err(ipu->dev, "failed to add irq domain\n"); return -ENODEV; --=20 2.49.0