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[106.168.128.197]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-301bf589bccsm1103483a91.11.2025.03.19.02.48.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Mar 2025 02:48:12 -0700 (PDT) From: Takahiro Kuwano X-Google-Original-From: Takahiro Kuwano Date: Wed, 19 Mar 2025 18:47:45 +0900 Subject: [PATCH 3/3] mtd: spi-nor: spansion: add support for CYRS17B512 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250319-snor-rdid-dummy-ncycles-v1-3-fbf64e4c226a@infineon.com> References: <20250319-snor-rdid-dummy-ncycles-v1-0-fbf64e4c226a@infineon.com> In-Reply-To: <20250319-snor-rdid-dummy-ncycles-v1-0-fbf64e4c226a@infineon.com> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bacem Daassi , Takahiro Kuwano X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1742377674; l=6571; i=Takahiro.Kuwano@infineon.com; s=20250227; h=from:subject:message-id; bh=oC9jr2u9u9kL8fmEU1SCe11rMhVquUDrj9AQX+3QGZI=; b=TVoDc7eh8RNj9bGWHNK0BXFWDvjHKkJETkqaH5rgr0BVxciS9BHCm8k6P8cnic04UzhJhw96c a84edkoKF/RAekTKOMVe2JIygSpOc0Q3j3yPei1yRrjT1d/HL00S4W/ X-Developer-Key: i=Takahiro.Kuwano@infineon.com; a=ed25519; pk=aS8V9WLuMUkl0vmgD0xJU19ZajdJmuyFBnBfVj0dfDs= Add device ID info and fixups to support Infineon CYRS17B512 flash. Although this flash has untypical features such as dummy cycles in RDID, inverted erase polarity, larger program page size with automatic page erase, and larger sector size, it supports basic flash commands including SFDP. Link: https://www.infineon.com/dgdl/Infineon-CYRS17B512_512_MB_64_MB_SERIAL= _NOR_FLASH_SPI_QSPI_3-DataSheet-v07_00-EN.pdf?fileId=3D8ac78c8c8fc2dd9c0190= 0eee733d45f3 Signed-off-by: Takahiro Kuwano --- Tested on Xilinx Zynq-7000 board and Infineon internal SPI controller. zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c1601a zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer spansion zynq> xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 53464450080102ff00080114000300ff84080102500300ff8700011c5803 00ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff fffffffffffffffffffffffffffffffffffff7ffe2ffffffff1f48eb086b fffffffffeffffffffffffffffff48eb142017d800ff00ffa028fdffb73f 84a2e0fb1fc4ffff7a75f7ffffff22f65dfff050f8a10000000000002c00 00000000f6fffffff30600fe21dcffff0000800000000000c0ffc3ebc0ff c3eb00650090066500b1006501950065019671650494716504d000000000 b02e000088a489aa71650393716503930000000000000000000000000000 0000000000000000000000000000000000000000000000000000716503d4 716503d400002020 zynq> md5sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp a2fec0f47c5aa119e21c3d50a173e2ba /sys/bus/spi/devices/spi0.0/spi-nor/sfdp zynq> cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-1S (fast read) opcode 0x0c mode cycles 8 dummy cycles 8 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 8 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 8 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 zynq> cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id c1 60 1a 00 00 00 size 64.0 MiB write size 1 page size 2048 address nbytes 4 flags 4B_OPCODES | HAS_4BAIT | HAS_16BIT_SR | SOFT_RESET opcodes read 0xec dummy cycles 10 erase 0xdc program 0x34 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (1.00 MiB) [2] dc (8.00 MiB) [3] c7 (64.0 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+---------- 00000000-03ffffff | [ 3] | no zynq> mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 67108864 (64M) mtd.erasesize =3D 8388608 (8M) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 zynq> ./test_spi_cyrs17b512.sh 8+0 records in 8+0 records out 8388608 bytes (8.0MB) copied, 0.308282 seconds, 26.0MB/s Erased 8388608 bytes from address 0x00000000 in flash Copied 8388608 bytes from address 0x00000000 in flash to spi_read 0000000 0000 0000 0000 0000 0000 0000 0000 0000 * 0800000 2daeb1f36095b44b318410b3f4e8b5d989dcc7bb023d1426c492dab0a3053e74 spi_read Copied 8388608 bytes from spi_test to address 0x00000000 in flash Copied 8388608 bytes from address 0x00000000 in flash to spi_read 8f8842585053d5200d7d80bc766dcf8bbe9f4fea08499c576f67ed631050b6c3 spi_read 8f8842585053d5200d7d80bc766dcf8bbe9f4fea08499c576f67ed631050b6c3 spi_test Erased 8388608 bytes from address 0x00000000 in flash Copied 8388608 bytes from address 0x00000000 in flash to spi_read 2daeb1f36095b44b318410b3f4e8b5d989dcc7bb023d1426c492dab0a3053e74 spi_read 8f8842585053d5200d7d80bc766dcf8bbe9f4fea08499c576f67ed631050b6c3 spi_test --- drivers/mtd/spi-nor/spansion.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index bf08dbf5e7421f8725a9931e36acaf3f7348db42..5c9588b02b7e61f1b64e5dc61e5= c1f976ac58508 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -758,6 +758,18 @@ static const struct spi_nor_fixups s25fs_s_nor_fixups = =3D { .post_bfpt =3D s25fs_s_nor_post_bfpt_fixups, }; =20 +static int cyrs17b_late_init(struct spi_nor *nor) +{ + /* Fast Read requires mode cycles */ + nor->params->reads[SNOR_CMD_READ_FAST].num_mode_clocks =3D 8; + + return 0; +} + +static const struct spi_nor_fixups cyrs17b_fixups =3D { + .late_init =3D cyrs17b_late_init, +}; + static const struct flash_info spansion_nor_parts[] =3D { { .id =3D SNOR_ID(0x01, 0x02, 0x12), @@ -996,6 +1008,11 @@ static const struct flash_info spansion_nor_parts[] = =3D { .name =3D "s28hs02gt", .mfr_flags =3D USE_CLPEF, .fixups =3D &s28hx_t_fixups, + }, { + /* cyrs17b512 */ + .id =3D SNOR_ID(0xc1, 0x60, 0x1a), + .mfr_flags =3D USE_CLSR, + .fixups =3D &cyrs17b_fixups }, { .id =3D SNOR_ID(0xef, 0x40, 0x13), .name =3D "s25fl004k", --=20 2.34.1