From nobody Thu Dec 18 22:31:17 2025 Received: from out-174.mta1.migadu.com (out-174.mta1.migadu.com [95.215.58.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C0122153D6 for ; Wed, 19 Mar 2025 21:10:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742418611; cv=none; b=IOlOFus3GsXZK8/3gQ0VqJ9bFu4ErlCwFSDuBZAVI6tptw22GlTiXISI7NDH8RAcPPYita8d/tlRnDD3TrLt7q0o5wU4FC5DrmEbG/R/TkuFBlwP6VW8FgIx5IDiJfbKIinBAP29GjGvQls8fSnBFufSsm8rgaiz/MnSH0GTk6M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742418611; c=relaxed/simple; bh=6IPmLghPW8jdZ2stJBIVx08WU3l6/qx+WkrXY71Uh5E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JYJEm1bEmU7Y8ILNGedLTp7SRypWXSMTudQhpwXlD7j82+sBrmyTuf4nnczLc2gu/Drjpldi7gQdCt6y6gXw0AUsSNXnevmg6jgPFK2AuIQHJ7CJSGKQhqudh88HoYPnXBJugOdcQK8pukVyiKt87oVYP0A+8VMC2kxdXCJpMgg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=iencinas.com; spf=pass smtp.mailfrom=iencinas.com; dkim=pass (2048-bit key) header.d=iencinas.com header.i=@iencinas.com header.b=WUSESR84; arc=none smtp.client-ip=95.215.58.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=iencinas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=iencinas.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=iencinas.com header.i=@iencinas.com header.b="WUSESR84" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iencinas.com; s=key1; t=1742418607; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jx30pxg9oOR6nK0KXgwwQMSrayULAmeIQrbjbt6XfpE=; b=WUSESR84P9kXilOMPoz9WGZPL3LVKKSCtXgxCzs709k1SWHPtoaIBS6AAv0I4t7RbaEu8I M1T12YcpmrgvOP3JgqGhmGs3cxntNrUFDdVIo7HA2JdKZDrBKNPpq8fIAJAmf3afe8217y eUoBGdpwf22W65enMsP0Ew9PYzh7F9XaEIQxrI0XkAv9/07AMmJSIlPw6H5rBQ4vygbRLq mA2DJAFb+AU+Id1LLePuLWOMUABaDz0hJisf1uBO9339WvsXL6Yhxm3M0MP9XXkxAib520 GePaM1eVtP50vVAYrjjkF15ozB5vc6xyV2iXujWgMeTVlTZNiZSg8tGEtTe3gw== From: Ignacio Encinas Date: Wed, 19 Mar 2025 22:09:45 +0100 Subject: [PATCH v2 1/2] include/uapi/linux/swab.h: move default implementation for swab macros into asm-generic Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250319-riscv-swab-v2-1-d53b6d6ab915@iencinas.com> References: <20250319-riscv-swab-v2-0-d53b6d6ab915@iencinas.com> In-Reply-To: <20250319-riscv-swab-v2-0-d53b6d6ab915@iencinas.com> To: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Arnd Bergmann Cc: Eric Biggers , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kernel-mentees@lists.linux.dev, skhan@linuxfoundation.org, Zhihang Shao , =?utf-8?q?Bj=C3=B6rn_T=C3=B6pel?= , linux-arch@vger.kernel.org, Ignacio Encinas X-Migadu-Flow: FLOW_OUT Move the default byteswap implementation into asm-generic so that it can be included from arch code. This is required by RISC-V in order to have a fallback implementation without duplicating it. Signed-off-by: Ignacio Encinas --- include/uapi/asm-generic/swab.h | 32 ++++++++++++++++++++++++++++++++ include/uapi/linux/swab.h | 33 +-------------------------------- 2 files changed, 33 insertions(+), 32 deletions(-) diff --git a/include/uapi/asm-generic/swab.h b/include/uapi/asm-generic/swa= b.h index f2da4e4fd4d129c43f904c5f1b6234036b57cc77..43d83df007a6fbfb0011452e12e= 71f429425cad5 100644 --- a/include/uapi/asm-generic/swab.h +++ b/include/uapi/asm-generic/swab.h @@ -16,4 +16,36 @@ #endif #endif =20 +/* + * casts are necessary for constants, because we never know how for sure + * how U/UL/ULL map to __u16, __u32, __u64. At least not in a portable way. + */ +#define ___constant_swab16(x) ((__u16)( \ + (((__u16)(x) & (__u16)0x00ffU) << 8) | \ + (((__u16)(x) & (__u16)0xff00U) >> 8))) + +#define ___constant_swab32(x) ((__u32)( \ + (((__u32)(x) & (__u32)0x000000ffUL) << 24) | \ + (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \ + (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \ + (((__u32)(x) & (__u32)0xff000000UL) >> 24))) + +#define ___constant_swab64(x) ((__u64)( \ + (((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) | \ + (((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) | \ + (((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) | \ + (((__u64)(x) & (__u64)0x00000000ff000000ULL) << 8) | \ + (((__u64)(x) & (__u64)0x000000ff00000000ULL) >> 8) | \ + (((__u64)(x) & (__u64)0x0000ff0000000000ULL) >> 24) | \ + (((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) | \ + (((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56))) + +#define ___constant_swahw32(x) ((__u32)( \ + (((__u32)(x) & (__u32)0x0000ffffUL) << 16) | \ + (((__u32)(x) & (__u32)0xffff0000UL) >> 16))) + +#define ___constant_swahb32(x) ((__u32)( \ + (((__u32)(x) & (__u32)0x00ff00ffUL) << 8) | \ + (((__u32)(x) & (__u32)0xff00ff00UL) >> 8))) + #endif /* _ASM_GENERIC_SWAB_H */ diff --git a/include/uapi/linux/swab.h b/include/uapi/linux/swab.h index 01717181339eb0fb5128668ca13f38205c03fa28..ca808c492996f810ce417ce9701= 306070873847b 100644 --- a/include/uapi/linux/swab.h +++ b/include/uapi/linux/swab.h @@ -6,38 +6,7 @@ #include #include #include - -/* - * casts are necessary for constants, because we never know how for sure - * how U/UL/ULL map to __u16, __u32, __u64. At least not in a portable way. - */ -#define ___constant_swab16(x) ((__u16)( \ - (((__u16)(x) & (__u16)0x00ffU) << 8) | \ - (((__u16)(x) & (__u16)0xff00U) >> 8))) - -#define ___constant_swab32(x) ((__u32)( \ - (((__u32)(x) & (__u32)0x000000ffUL) << 24) | \ - (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \ - (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \ - (((__u32)(x) & (__u32)0xff000000UL) >> 24))) - -#define ___constant_swab64(x) ((__u64)( \ - (((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) | \ - (((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) | \ - (((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) | \ - (((__u64)(x) & (__u64)0x00000000ff000000ULL) << 8) | \ - (((__u64)(x) & (__u64)0x000000ff00000000ULL) >> 8) | \ - (((__u64)(x) & (__u64)0x0000ff0000000000ULL) >> 24) | \ - (((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) | \ - (((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56))) - -#define ___constant_swahw32(x) ((__u32)( \ - (((__u32)(x) & (__u32)0x0000ffffUL) << 16) | \ - (((__u32)(x) & (__u32)0xffff0000UL) >> 16))) - -#define ___constant_swahb32(x) ((__u32)( \ - (((__u32)(x) & (__u32)0x00ff00ffUL) << 8) | \ - (((__u32)(x) & (__u32)0xff00ff00UL) >> 8))) +#include =20 /* * Implement the following as inlines, but define the interface using --=20 2.48.1 From nobody Thu Dec 18 22:31:17 2025 Received: from out-181.mta1.migadu.com (out-181.mta1.migadu.com [95.215.58.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 57BA62135DE for ; Wed, 19 Mar 2025 21:10:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742418612; cv=none; b=XtuLqJNs/NAy2li2qTFfomsXiZMZPkftB4UCjs25DLNBLWYSdkbLCPRhKvLPkG/s4UxzaJHIU/VcE3nWoY2M82RUz4NSJcBp7y7dCZDOBFAxqywVditqQ3lJkTmMf/FhVyl63E06MMDbNZ+4NlYoZDSvTXuJ42e2FfJ6DgdUs4w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742418612; c=relaxed/simple; bh=M1E3rlnRjg7zgjLtIZW+R/MLyP34kXkWb7jHt9CA/kQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZO9c29jVB7zugDJ+r50sxjfuBgERSgboU4mqWjd787XKXJn59JO6kD2Q0776jrwMJIsaLaumjjFuR3ChyEIAaaPpsZS1YoSq3OXlv6aO+bqXYk2YyI5PYXUD2C218Te9FWqmhtUi7EKYBBt6sf8Dx+q8KinL5COHAF+fa1fQwm8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=iencinas.com; spf=pass smtp.mailfrom=iencinas.com; dkim=pass (2048-bit key) header.d=iencinas.com header.i=@iencinas.com header.b=FS5rfi6e; arc=none smtp.client-ip=95.215.58.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=iencinas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=iencinas.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=iencinas.com header.i=@iencinas.com header.b="FS5rfi6e" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iencinas.com; s=key1; t=1742418608; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0Z50bW4uP9y2NKyrA9FP3XB/KfgBiP1prO7EaYYpM7k=; b=FS5rfi6eUGa/2hpZla7vnwITZrOXs+XRdMr6mlvKgJNk6Qr44UPCas73LB4AcuXWld+pW/ cp2JPl5Oa+q8yXmOif+e5ckr2qqvvtwhyDlEUAakiy8GhLiNu0n4aiZYZ5DLoVUH89QO++ HJKsd3Z7Tb+GVk+ri/QsrfN4iFusXN5hEjEFiBOTS/9KsWJC5amy9mwxm0t6NTjdDCJXhV ByOcT9GAKgvTuKNUGscSqUapyddmwmSa7TlMw1SPSvvEdKH3LU54peCmTlON0CwjrluyEX pKreqAzF7js4T9HI5VSdxHyVc1idbvf+aWHGLv/sreortH8410YYlIAjHCSX+w== From: Ignacio Encinas Date: Wed, 19 Mar 2025 22:09:46 +0100 Subject: [PATCH v2 2/2] riscv: introduce asm/swab.h Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250319-riscv-swab-v2-2-d53b6d6ab915@iencinas.com> References: <20250319-riscv-swab-v2-0-d53b6d6ab915@iencinas.com> In-Reply-To: <20250319-riscv-swab-v2-0-d53b6d6ab915@iencinas.com> To: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Arnd Bergmann Cc: Eric Biggers , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kernel-mentees@lists.linux.dev, skhan@linuxfoundation.org, Zhihang Shao , =?utf-8?q?Bj=C3=B6rn_T=C3=B6pel?= , linux-arch@vger.kernel.org, Ignacio Encinas X-Migadu-Flow: FLOW_OUT Implement endianness swap macros for RISC-V. Use the rev8 instruction when Zbb is available. Otherwise, rely on the default mask-and-shift implementation. Signed-off-by: Ignacio Encinas --- arch/riscv/include/asm/swab.h | 48 +++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 48 insertions(+) diff --git a/arch/riscv/include/asm/swab.h b/arch/riscv/include/asm/swab.h new file mode 100644 index 0000000000000000000000000000000000000000..6cb40e8108c956dd445746d59bc= 1dd0a53475212 --- /dev/null +++ b/arch/riscv/include/asm/swab.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _ASM_RISCV_SWAB_H +#define _ASM_RISCV_SWAB_H + +#include +#include +#include +#include +#include + +#if defined(CONFIG_RISCV_ISA_ZBB) && !defined(NO_ALTERNATIVE) + +#define ARCH_SWAB(size) \ +static __always_inline unsigned long __arch_swab##size(__u##size value) \ +{ \ + unsigned long x =3D value; \ + \ + asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0, \ + RISCV_ISA_EXT_ZBB, 1) \ + :::: legacy); \ + \ + asm volatile (".option push\n" \ + ".option arch,+zbb\n" \ + "rev8 %0, %1\n" \ + ".option pop\n" \ + : "=3Dr" (x) : "r" (x)); \ + \ + return x >> (BITS_PER_LONG - size); \ + \ +legacy: \ + return ___constant_swab##size(value); \ +} + +#ifdef CONFIG_64BIT +ARCH_SWAB(64) +#define __arch_swab64 __arch_swab64 +#endif + +ARCH_SWAB(32) +#define __arch_swab32 __arch_swab32 + +ARCH_SWAB(16) +#define __arch_swab16 __arch_swab16 + +#undef ARCH_SWAB + +#endif /* defined(CONFIG_RISCV_ISA_ZBB) && !defined(NO_ALTERNATIVE) */ +#endif /* _ASM_RISCV_SWAB_H */ --=20 2.48.1