From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 12265212B2E; Tue, 18 Mar 2025 17:15:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318114; cv=none; b=FxPSPFhI7dXEPcbCxH08Vd1eH/iE4kIFMM39POiekhKXSDCU6AwtZDVAHlHONMSbk9eSI0wkto2nW70anMxjp3NHUQcs9i7i2/dJQEnXds+wLgyVM8XEO67QDoDvBLejGfMsVqDwC+uqGJg6kdMAay3sx4oxJmUSp9MCyOVFMvE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318114; c=relaxed/simple; bh=vLTG2QvX3NsvJEj2wCKBxk1IBzdUqvytIT7U7YDwiqg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=hs5hI2ts00AtL23pwrc5UxaGizoeADwQ7mM4zSAv+M8yywnkUrPYOXpHdl6w6ZshCULOXg67FSE8Bs8ykpbXGZWPeNYweZTOOF66FEPKSp98rh/bioJV5IDBG2/9TEHWk/B2WN4ncH5kyHhYomevTN0d8EyebXdjxe6/ueSjNVI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=AFWxeh8n; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="AFWxeh8n" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I1uEKF028771; Tue, 18 Mar 2025 12:15:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=M97kqTEQREFXM6bMMLbcLteFBzjCQ8yV+J9ftT6QK2A=; b= AFWxeh8nAK4cYVuplQ6HxHJaWQMOV9LiO5VKr3yN1d2TPOBAr3H2fVxP48UWw28y ekksOpcSgZOX6rFCQgrqWu6V6r52Gg8iFLyAdiX+UWdb5NmqQ4LPXGVsh3WSg4eA pXx/xbI+XKWGjuBXdkou3bOdiuvZqm1cKKP0TT/mjtPq3DTgzg7nDhtMeqO1EAAP 5qGkZ+AMTTMSUREG3iakDUAwVDlsaEFLHS5IoNhQrlt9GBjyV0UCYN48UUA7X89/ sUU5GjqcwEHMEHNhPBf0CgAtIvVHsVUccdyLd+w+HNU3k1gYn96mVBsTbkVAvLzp e9rfAxPd8Go0F3AtZAQf0w== Received: from ediex02.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879w-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:01 -0500 (CDT) Received: from ediex02.ad.cirrus.com (198.61.84.81) by ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id 7D01582255C; Tue, 18 Mar 2025 17:14:59 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 01/15] ASoC: ops-test: Add some basic kunit tests for soc-ops Date: Tue, 18 Mar 2025 17:14:45 +0000 Message-ID: <20250318171459.3203730-2-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa15 cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=kVcb_dQ4S0lf-uqeuHUA:9 X-Proofpoint-GUID: sjfrOqWIJTa_Bu_0a2DRvrzRr1v5tMHR X-Proofpoint-ORIG-GUID: sjfrOqWIJTa_Bu_0a2DRvrzRr1v5tMHR X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" Add some basic kunit tests for some of the ASoC control put and get helpers. This will assist in doing some refactoring. Note that presently some tests fail, but the rest of the series will fix these up. Signed-off-by: Charles Keepax --- sound/soc/Kconfig | 7 + sound/soc/Makefile | 4 + sound/soc/soc-ops-test.c | 541 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 552 insertions(+) create mode 100644 sound/soc/soc-ops-test.c diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig index 5efba76abb31a..8b7d51266f814 100644 --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig @@ -81,6 +81,13 @@ config SND_SOC_UTILS_KUNIT_TEST help If you want to perform tests on ALSA SoC utils library say Y here. =20 +config SND_SOC_OPS_KUNIT_TEST + tristate "KUnit tests for SoC ops" + depends on KUNIT + default KUNIT_ALL_TESTS + help + If you want to perform tests on ALSA SoC ops library say Y here. + config SND_SOC_ACPI tristate =20 diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 08baaa11d8139..358e227c5ab61 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile @@ -21,6 +21,10 @@ ifneq ($(CONFIG_SND_SOC_UTILS_KUNIT_TEST),) obj-$(CONFIG_SND_SOC_UTILS_KUNIT_TEST) +=3D soc-utils-test.o endif =20 +ifneq ($(CONFIG_SND_SOC_OPS_KUNIT_TEST),) +obj-$(CONFIG_SND_SOC_OPS_KUNIT_TEST) +=3D soc-ops-test.o +endif + ifneq ($(CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM),) snd-soc-core-y +=3D soc-generic-dmaengine-pcm.o endif diff --git a/sound/soc/soc-ops-test.c b/sound/soc/soc-ops-test.c new file mode 100644 index 0000000000000..dc1e482bba6a9 --- /dev/null +++ b/sound/soc/soc-ops-test.c @@ -0,0 +1,541 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright (C) 2025 Cirrus Logic, Inc. and +// Cirrus Logic International Semiconductor Ltd. + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum soc_ops_test_control_layout { + SOC_OPS_TEST_SINGLE, + SOC_OPS_TEST_DOUBLE, + SOC_OPS_TEST_DOUBLE_R, +}; + +#define TEST_MC(clayout, xmin, xmax, xpmax, xsign, xinvert) \ + .mc =3D { \ + .min =3D xmin, .max =3D xmax, .platform_max =3D xpmax, \ + .reg =3D 0, .shift =3D 0, .sign_bit =3D xsign, .invert =3D xinvert, \ + .rreg =3D SOC_OPS_TEST_##clayout =3D=3D SOC_OPS_TEST_DOUBLE_R ? 1 : 0, \ + .rshift =3D SOC_OPS_TEST_##clayout =3D=3D SOC_OPS_TEST_DOUBLE ? 16 : 0, \ + } + +#define TEST_UINFO(clayout, ctype, cmin, cmax) \ + .uinfo =3D { \ + .type =3D SNDRV_CTL_ELEM_TYPE_##ctype, \ + .count =3D SOC_OPS_TEST_##clayout =3D=3D SOC_OPS_TEST_SINGLE ? 1 : 2, \ + .value.integer.min =3D cmin, \ + .value.integer.max =3D cmax, \ + } + +#define ITEST(cname, clayout, ctype, cfunc, cmin, cmax, \ + xmin, xmax, xpmax, xsign, xinvert) \ + { \ + .name =3D cname, \ + .func_name =3D #cfunc, \ + .layout =3D SOC_OPS_TEST_##clayout, \ + .info =3D snd_soc_info_##cfunc, \ + TEST_MC(clayout, xmin, xmax, xpmax, xsign, xinvert), \ + TEST_UINFO(clayout, ctype, cmin, cmax), \ + } + +#define ATEST(clayout, cfunc, cctl, cret, cinit, \ + xmask, xreg, xmin, xmax, xpmax, xsign, xinvert) \ + { \ + .func_name =3D #cfunc, \ + .layout =3D SOC_OPS_TEST_##clayout, \ + .put =3D snd_soc_put_##cfunc, \ + .get =3D snd_soc_get_##cfunc, \ + TEST_MC(clayout, xmin, xmax, xpmax, xsign, xinvert), \ + .lctl =3D cctl, .rctl =3D cctl, \ + .lmask =3D SOC_OPS_TEST_##clayout =3D=3D SOC_OPS_TEST_DOUBLE ? \ + (xmask) | (xmask) << 16 : (xmask), \ + .rmask =3D SOC_OPS_TEST_##clayout =3D=3D SOC_OPS_TEST_DOUBLE_R ? (xmask)= : 0, \ + .init =3D cinit ? 0xFFFFFFFF : 0x00000000, \ + .lreg =3D SOC_OPS_TEST_##clayout =3D=3D SOC_OPS_TEST_DOUBLE ? \ + (xreg) | (xreg) << 16 : (xreg), \ + .rreg =3D SOC_OPS_TEST_##clayout =3D=3D SOC_OPS_TEST_DOUBLE_R ? (xreg) := 0, \ + .ret =3D cret, \ + } + +struct soc_ops_test_priv { + struct kunit *test; + + struct snd_soc_component component; +}; + +struct info_test_param { + const char * const name; + const char * const func_name; + enum soc_ops_test_control_layout layout; + struct soc_mixer_control mc; + int (*info)(struct snd_kcontrol *kctl, struct snd_ctl_elem_info *info); + + struct snd_ctl_elem_info uinfo; +}; + +struct access_test_param { + const char * const func_name; + enum soc_ops_test_control_layout layout; + struct soc_mixer_control mc; + int (*put)(struct snd_kcontrol *kctl, struct snd_ctl_elem_value *value); + int (*get)(struct snd_kcontrol *kctl, struct snd_ctl_elem_value *value); + + unsigned int init; + unsigned int lmask; + unsigned int rmask; + unsigned int lreg; + unsigned int rreg; + long lctl; + long rctl; + int ret; +}; + +static const struct info_test_param all_info_test_params[] =3D { + // Handling of volume control name for types + ITEST("Test Control", SINGLE, BOOLEAN, volsw, 0, 1, 0, 1,= 0, 0, 0), + ITEST("Test Volume", SINGLE, INTEGER, volsw, 0, 1, 0, 1,= 0, 0, 0), + ITEST("Test Volume Control", SINGLE, BOOLEAN, volsw, 0, 1, 0, 1,= 0, 0, 0), + ITEST("Test Control", DOUBLE_R, BOOLEAN, volsw, 0, 1, 0, 1,= 0, 0, 0), + ITEST("Test Volume", DOUBLE_R, INTEGER, volsw, 0, 1, 0, 1,= 0, 0, 0), + ITEST("Test Volume Control", DOUBLE_R, BOOLEAN, volsw, 0, 1, 0, 1,= 0, 0, 0), + ITEST("Test Control", DOUBLE, BOOLEAN, volsw, 0, 1, 0, 1,= 0, 0, 0), + ITEST("Test Volume", DOUBLE, INTEGER, volsw, 0, 1, 0, 1,= 0, 0, 0), + ITEST("Test Volume Control", DOUBLE, BOOLEAN, volsw, 0, 1, 0, 1,= 0, 0, 0), + ITEST("Test Control", SINGLE, BOOLEAN, volsw, 0, 1, 0, 1,= 0, 0, 1), + ITEST("Test Volume", SINGLE, INTEGER, volsw, 0, 1, 0, 1,= 0, 0, 1), + ITEST("Test Volume Control", SINGLE, BOOLEAN, volsw, 0, 1, 0, 1,= 0, 0, 1), + ITEST("Test Control", DOUBLE, BOOLEAN, volsw, 0, 1, 0, 1,= 0, 0, 1), + ITEST("Test Volume", DOUBLE, INTEGER, volsw, 0, 1, 0, 1,= 0, 0, 1), + ITEST("Test Volume Control", DOUBLE, BOOLEAN, volsw, 0, 1, 0, 1,= 0, 0, 1), + ITEST("Test Control", SINGLE, INTEGER, volsw, 0, 2, 0, 2,= 0, 0, 0), + ITEST("Test Volume", SINGLE, INTEGER, volsw, 0, 2, 0, 2,= 0, 0, 0), + ITEST("Test Volume Control", SINGLE, INTEGER, volsw, 0, 2, 0, 2,= 0, 0, 0), + ITEST("Test Control", SINGLE, INTEGER, volsw, 0, 1, 0, 2,= 1, 0, 0), + ITEST("Test Volume", SINGLE, INTEGER, volsw, 0, 1, 0, 2,= 1, 0, 0), + ITEST("Test Volume Control", SINGLE, INTEGER, volsw, 0, 1, 0, 2,= 1, 0, 0), + // Negative minimums + ITEST("Test Control", SINGLE, INTEGER, volsw, 0, 20, -10, 10,= 0, 4, 0), + ITEST("Test Control", SINGLE, INTEGER, volsw, 0, 15, -10, 10,= 15, 4, 0), + ITEST("Test Control", SINGLE, INTEGER, volsw, 0, 20, -10, 10,= 0, 4, 1), + ITEST("Test Control", SINGLE, INTEGER, volsw, 0, 15, -10, 10,= 15, 4, 1), + // SX control volume control naming + ITEST("Test Control", SINGLE, BOOLEAN, volsw_sx, 0, 1, 0xF, 1,= 0, 0, 0), + ITEST("Test Volume", SINGLE, INTEGER, volsw_sx, 0, 1, 0xF, 1,= 0, 0, 0), + ITEST("Test Volume Control", SINGLE, BOOLEAN, volsw_sx, 0, 1, 0xF, 1,= 0, 0, 0), + ITEST("Test Control", SINGLE, INTEGER, volsw_sx, 0, 4, 0xE, 4,= 0, 0, 0), + ITEST("Test Volume", SINGLE, INTEGER, volsw_sx, 0, 4, 0xE, 4,= 0, 0, 0), + ITEST("Test Volume Control", SINGLE, INTEGER, volsw_sx, 0, 4, 0xE, 4,= 0, 0, 0), + ITEST("Test Control", SINGLE, INTEGER, volsw_sx, 0, 3, 0xE, 4,= 3, 0, 0), + ITEST("Test Volume", SINGLE, INTEGER, volsw_sx, 0, 3, 0xE, 4,= 3, 0, 0), + ITEST("Test Volume Control", SINGLE, INTEGER, volsw_sx, 0, 3, 0xE, 4,= 3, 0, 0), +}; + +static const struct access_test_param all_access_test_params[] =3D { + // Single positive value controls + ATEST(SINGLE, volsw, 10, 1, false, 0x1F, 0x0A, 0, 20, 0, 0, = 0), + ATEST(SINGLE, volsw, 0, 0, false, 0x1F, 0x00, 0, 20, 0, 0, = 0), + ATEST(SINGLE, volsw, 20, 1, false, 0x1F, 0x14, 0, 20, 0, 0, = 0), + ATEST(SINGLE, volsw, 10, 1, false, 0x1F, 0x0A, 0, 20, 15, 0, = 0), + ATEST(SINGLE, volsw, 25, -22, false, 0x1F, 0x00, 0, 20, 15, 0, = 0), + ATEST(SINGLE, volsw, 15, 1, false, 0x1F, 0x0F, 0, 20, 15, 0, = 0), + // Inverted single positive value controls + ATEST(SINGLE, volsw, 10, 1, false, 0x1F, 0x0A, 0, 20, 0, 0, = 1), + ATEST(SINGLE, volsw, 0, 1, false, 0x1F, 0x14, 0, 20, 0, 0, = 1), + ATEST(SINGLE, volsw, 20, 0, false, 0x1F, 0x00, 0, 20, 0, 0, = 1), + ATEST(SINGLE, volsw, 10, 1, false, 0x1F, 0x0A, 0, 20, 15, 0, = 1), + ATEST(SINGLE, volsw, 25, -22, false, 0x1F, 0x00, 0, 20, 15, 0, = 1), + ATEST(SINGLE, volsw, 15, 1, false, 0x1F, 0x05, 0, 20, 15, 0, = 1), + ATEST(SINGLE, volsw, 10, 1, true, 0x1F, 0x0A, 0, 20, 0, 0, = 0), + ATEST(SINGLE, volsw, 0, 1, true, 0x1F, 0x00, 0, 20, 0, 0, = 0), + ATEST(SINGLE, volsw, 20, 1, true, 0x1F, 0x14, 0, 20, 0, 0, = 0), + ATEST(SINGLE, volsw, 10, 1, true, 0x1F, 0x0A, 0, 20, 15, 0, = 0), + ATEST(SINGLE, volsw, 25, -22, true, 0x1F, 0x00, 0, 20, 15, 0, = 0), + ATEST(SINGLE, volsw, 15, 1, true, 0x1F, 0x0F, 0, 20, 15, 0, = 0), + // Single negative value controls + ATEST(SINGLE, volsw, 10, 0, false, 0x1F, 0x00, -10, 10, 0, 4, = 0), + ATEST(SINGLE, volsw, 0, 1, false, 0x1F, 0x16, -10, 10, 0, 4, = 0), + ATEST(SINGLE, volsw, 20, 1, false, 0x1F, 0x0A, -10, 10, 0, 4, = 0), + ATEST(SINGLE, volsw, 10, 0, false, 0x1F, 0x00, -10, 10, 15, 4, = 0), + ATEST(SINGLE, volsw, 25, -22, false, 0x1F, 0x00, -10, 10, 15, 4, = 0), + ATEST(SINGLE, volsw, 15, 1, false, 0x1F, 0x05, -10, 10, 15, 4, = 0), + // Single non-zero minimum positive value controls + ATEST(SINGLE, volsw, 10, 1, false, 0x1F, 0x14, 10, 30, 0, 0, = 0), + ATEST(SINGLE, volsw, 0, 1, false, 0x1F, 0x0A, 10, 30, 0, 0, = 0), + ATEST(SINGLE, volsw, 20, 1, false, 0x1F, 0x1E, 10, 30, 0, 0, = 0), + ATEST(SINGLE, volsw, 10, 1, false, 0x1F, 0x14, 10, 30, 15, 0, = 0), + ATEST(SINGLE, volsw, 25, -22, false, 0x1F, 0x00, 10, 30, 15, 0, = 0), + ATEST(SINGLE, volsw, 15, 1, false, 0x1F, 0x19, 10, 30, 15, 0, = 0), + // Inverted single non-zero minimum positive value controls + ATEST(SINGLE, volsw, 10, 1, false, 0x1F, 0x14, 10, 30, 0, 0, = 1), + ATEST(SINGLE, volsw, 0, 1, false, 0x1F, 0x1E, 10, 30, 0, 0, = 1), + ATEST(SINGLE, volsw, 20, 1, false, 0x1F, 0x0A, 10, 30, 0, 0, = 1), + ATEST(SINGLE, volsw, 10, 1, false, 0x1F, 0x14, 10, 30, 15, 0, = 1), + ATEST(SINGLE, volsw, 25, -22, false, 0x1F, 0x00, 10, 30, 15, 0, = 1), + ATEST(SINGLE, volsw, 15, 1, false, 0x1F, 0x0F, 10, 30, 15, 0, = 1), + // Double register positive value controls + ATEST(DOUBLE_R, volsw, 10, 1, false, 0x1F, 0x0A, 0, 20, 0, 0, = 0), + ATEST(DOUBLE_R, volsw, 0, 0, false, 0x1F, 0x00, 0, 20, 0, 0, = 0), + ATEST(DOUBLE_R, volsw, 20, 1, false, 0x1F, 0x14, 0, 20, 0, 0, = 0), + ATEST(DOUBLE_R, volsw, 10, 1, false, 0x1F, 0x0A, 0, 20, 15, 0, = 0), + ATEST(DOUBLE_R, volsw, 25, -22, false, 0x1F, 0x00, 0, 20, 15, 0, = 0), + ATEST(DOUBLE_R, volsw, 15, 1, false, 0x1F, 0x0F, 0, 20, 15, 0, = 0), + // Double register negative value controls + ATEST(DOUBLE_R, volsw, 10, 0, false, 0x1F, 0x00, -10, 10, 0, 4, = 0), + ATEST(DOUBLE_R, volsw, 0, 1, false, 0x1F, 0x16, -10, 10, 0, 4, = 0), + ATEST(DOUBLE_R, volsw, 20, 1, false, 0x1F, 0x0A, -10, 10, 0, 4, = 0), + ATEST(DOUBLE_R, volsw, 10, 0, false, 0x1F, 0x00, -10, 10, 15, 4, = 0), + ATEST(DOUBLE_R, volsw, 25, -22, false, 0x1F, 0x00, -10, 10, 15, 4, = 0), + ATEST(DOUBLE_R, volsw, 15, 1, false, 0x1F, 0x05, -10, 10, 15, 4, = 0), + ATEST(DOUBLE_R, volsw, 10, 1, true, 0x1F, 0x00, -10, 10, 0, 4, = 0), + ATEST(DOUBLE_R, volsw, 0, 1, true, 0x1F, 0x16, -10, 10, 0, 4, = 0), + ATEST(DOUBLE_R, volsw, 20, 1, true, 0x1F, 0x0A, -10, 10, 0, 4, = 0), + ATEST(DOUBLE_R, volsw, 10, 1, true, 0x1F, 0x00, -10, 10, 15, 4, = 0), + ATEST(DOUBLE_R, volsw, 25, -22, true, 0x1F, 0x00, -10, 10, 15, 4, = 0), + ATEST(DOUBLE_R, volsw, 15, 1, true, 0x1F, 0x05, -10, 10, 15, 4, = 0), + // Inverted double register negative value controls + ATEST(DOUBLE_R, volsw, 10, 1, true, 0x1F, 0x00, -10, 10, 0, 4, = 1), + ATEST(DOUBLE_R, volsw, 0, 1, true, 0x1F, 0x0A, -10, 10, 0, 4, = 1), + ATEST(DOUBLE_R, volsw, 20, 1, true, 0x1F, 0x16, -10, 10, 0, 4, = 1), + ATEST(DOUBLE_R, volsw, 10, 1, true, 0x1F, 0x00, -10, 10, 15, 4, = 1), + ATEST(DOUBLE_R, volsw, 25, -22, true, 0x1F, 0x00, -10, 10, 15, 4, = 1), + ATEST(DOUBLE_R, volsw, 15, 1, true, 0x1F, 0x1B, -10, 10, 15, 4, = 1), + // Double register non-zero minimum positive value controls + ATEST(DOUBLE_R, volsw, 10, 1, false, 0x1F, 0x14, 10, 30, 0, 0, = 0), + ATEST(DOUBLE_R, volsw, 0, 1, false, 0x1F, 0x0A, 10, 30, 0, 0, = 0), + ATEST(DOUBLE_R, volsw, 20, 1, false, 0x1F, 0x1E, 10, 30, 0, 0, = 0), + ATEST(DOUBLE_R, volsw, 10, 1, false, 0x1F, 0x14, 10, 30, 15, 0, = 0), + ATEST(DOUBLE_R, volsw, 25, -22, false, 0x1F, 0x00, 10, 30, 15, 0, = 0), + ATEST(DOUBLE_R, volsw, 15, 1, false, 0x1F, 0x19, 10, 30, 15, 0, = 0), + // Double shift positive value controls + ATEST(DOUBLE, volsw, 10, 1, false, 0x1F, 0x0A, 0, 20, 0, 0, = 0), + ATEST(DOUBLE, volsw, 0, 0, false, 0x1F, 0x00, 0, 20, 0, 0, = 0), + ATEST(DOUBLE, volsw, 20, 1, false, 0x1F, 0x14, 0, 20, 0, 0, = 0), + ATEST(DOUBLE, volsw, 10, 1, false, 0x1F, 0x0A, 0, 20, 15, 0, = 0), + ATEST(DOUBLE, volsw, 25, -22, false, 0x1F, 0x00, 0, 20, 15, 0, = 0), + ATEST(DOUBLE, volsw, 15, 1, false, 0x1F, 0x0F, 0, 20, 15, 0, = 0), + // Double shift negative value controls + ATEST(DOUBLE, volsw, 10, 0, false, 0x1F, 0x00, -10, 10, 0, 4, = 0), + ATEST(DOUBLE, volsw, 0, 1, false, 0x1F, 0x16, -10, 10, 0, 4, = 0), + ATEST(DOUBLE, volsw, 20, 1, false, 0x1F, 0x0A, -10, 10, 0, 4, = 0), + ATEST(DOUBLE, volsw, 10, 0, false, 0x1F, 0x00, -10, 10, 15, 4, = 0), + ATEST(DOUBLE, volsw, 25, -22, false, 0x1F, 0x00, -10, 10, 15, 4, = 0), + ATEST(DOUBLE, volsw, 15, 1, false, 0x1F, 0x05, -10, 10, 15, 4, = 0), + // Inverted double shift negative value controls + ATEST(DOUBLE, volsw, 10, 0, false, 0x1F, 0x00, -10, 10, 0, 4, = 1), + ATEST(DOUBLE, volsw, 0, 1, false, 0x1F, 0x0A, -10, 10, 0, 4, = 1), + ATEST(DOUBLE, volsw, 20, 1, false, 0x1F, 0x16, -10, 10, 0, 4, = 1), + ATEST(DOUBLE, volsw, 10, 0, false, 0x1F, 0x00, -10, 10, 15, 4, = 1), + ATEST(DOUBLE, volsw, 25, -22, false, 0x1F, 0x00, -10, 10, 15, 4, = 1), + ATEST(DOUBLE, volsw, 15, 1, false, 0x1F, 0x1B, -10, 10, 15, 4, = 1), + // Double shift non-zero minimum positive value controls + ATEST(DOUBLE, volsw, 10, 1, false, 0x1F, 0x14, 10, 30, 0, 0, = 0), + ATEST(DOUBLE, volsw, 0, 1, false, 0x1F, 0x0A, 10, 30, 0, 0, = 0), + ATEST(DOUBLE, volsw, 20, 1, false, 0x1F, 0x1E, 10, 30, 0, 0, = 0), + ATEST(DOUBLE, volsw, 10, 1, false, 0x1F, 0x14, 10, 30, 15, 0, = 0), + ATEST(DOUBLE, volsw, 25, -22, false, 0x1F, 0x00, 10, 30, 15, 0, = 0), + ATEST(DOUBLE, volsw, 15, 1, false, 0x1F, 0x19, 10, 30, 15, 0, = 0), + ATEST(DOUBLE, volsw, 10, 1, true, 0x1F, 0x14, 10, 30, 0, 0, = 0), + ATEST(DOUBLE, volsw, 0, 1, true, 0x1F, 0x0A, 10, 30, 0, 0, = 0), + ATEST(DOUBLE, volsw, 20, 1, true, 0x1F, 0x1E, 10, 30, 0, 0, = 0), + ATEST(DOUBLE, volsw, 10, 1, true, 0x1F, 0x14, 10, 30, 15, 0, = 0), + ATEST(DOUBLE, volsw, 25, -22, true, 0x1F, 0x00, 10, 30, 15, 0, = 0), + ATEST(DOUBLE, volsw, 15, 1, true, 0x1F, 0x19, 10, 30, 15, 0, = 0), + // Single SX all values + ATEST(SINGLE, volsw_sx, 0, 1, false, 0xF, 0x0F, 0x0F, 4, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 1, 0, false, 0xF, 0x00, 0x0F, 4, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 2, 1, false, 0xF, 0x01, 0x0F, 4, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 3, 1, false, 0xF, 0x02, 0x0F, 4, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 4, 1, false, 0xF, 0x03, 0x0F, 4, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 5, -22, false, 0xF, 0x00, 0x0F, 4, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 0, 0, true, 0xF, 0x0F, 0x0F, 4, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 1, 1, true, 0xF, 0x00, 0x0F, 4, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 2, 1, true, 0xF, 0x01, 0x0F, 4, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 3, 1, true, 0xF, 0x02, 0x0F, 4, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 4, 1, true, 0xF, 0x03, 0x0F, 4, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 5, -22, true, 0xF, 0x00, 0x0F, 4, 0, 0, = 0), + // Inverted single SX all values + ATEST(SINGLE, volsw_sx, 0, 1, false, 0x1F, 0x03, 0x0F, 4, 0, 0, = 1), + ATEST(SINGLE, volsw_sx, 1, 1, false, 0x1F, 0x02, 0x0F, 4, 0, 0, = 1), + ATEST(SINGLE, volsw_sx, 2, 1, false, 0x1F, 0x01, 0x0F, 4, 0, 0, = 1), + ATEST(SINGLE, volsw_sx, 3, 0, false, 0x1F, 0x00, 0x0F, 4, 0, 0, = 1), + ATEST(SINGLE, volsw_sx, 4, 1, false, 0x1F, 0x0F, 0x0F, 4, 0, 0, = 1), + ATEST(SINGLE, volsw_sx, 5, -22, false, 0x1F, 0x00, 0x0F, 4, 0, 0, = 1), + // Single SX select values + ATEST(SINGLE, volsw_sx, 0, 1, false, 0xFF, 0x88, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 1, 1, false, 0xFF, 0x89, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 119, 1, false, 0xFF, 0xFF, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 120, 0, false, 0xFF, 0x00, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 121, 1, false, 0xFF, 0x01, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 143, 1, false, 0xFF, 0x17, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 144, 1, false, 0xFF, 0x18, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 145, -22, false, 0xFF, 0x00, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 0, 1, true, 0xFF, 0x88, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 1, 1, true, 0xFF, 0x89, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 119, 0, true, 0xFF, 0xFF, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 120, 1, true, 0xFF, 0x00, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 121, 1, true, 0xFF, 0x01, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 143, 1, true, 0xFF, 0x17, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 144, 1, true, 0xFF, 0x18, 0x88, 144, 0, 0, = 0), + ATEST(SINGLE, volsw_sx, 145, -22, true, 0xFF, 0x00, 0x88, 144, 0, 0, = 0), + // Double shift SX select values + ATEST(DOUBLE, volsw_sx, 0, 1, true, 0xFF, 0x88, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE, volsw_sx, 1, 1, true, 0xFF, 0x89, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE, volsw_sx, 119, 0, true, 0xFF, 0xFF, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE, volsw_sx, 120, 1, true, 0xFF, 0x00, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE, volsw_sx, 121, 1, true, 0xFF, 0x01, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE, volsw_sx, 143, 1, true, 0xFF, 0x17, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE, volsw_sx, 144, 1, true, 0xFF, 0x18, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE, volsw_sx, 145, -22, true, 0xFF, 0x00, 0x88, 144, 0, 0, = 0), + // Double register SX select values + ATEST(DOUBLE_R, volsw_sx, 0, 1, true, 0xFF, 0x88, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE_R, volsw_sx, 1, 1, true, 0xFF, 0x89, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE_R, volsw_sx, 119, 0, true, 0xFF, 0xFF, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE_R, volsw_sx, 120, 1, true, 0xFF, 0x00, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE_R, volsw_sx, 121, 1, true, 0xFF, 0x01, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE_R, volsw_sx, 143, 1, true, 0xFF, 0x17, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE_R, volsw_sx, 144, 1, true, 0xFF, 0x18, 0x88, 144, 0, 0, = 0), + ATEST(DOUBLE_R, volsw_sx, 145, -22, true, 0xFF, 0x00, 0x88, 144, 0, 0, = 0), +}; + +static const char *control_type_str(const snd_ctl_elem_type_t type) +{ + switch (type) { + case SNDRV_CTL_ELEM_TYPE_BOOLEAN: + return "bool"; + case SNDRV_CTL_ELEM_TYPE_INTEGER: + return "int"; + default: + return "unknown"; + } +} + +static const char *control_layout_str(const enum soc_ops_test_control_layo= ut layout) +{ + switch (layout) { + case SOC_OPS_TEST_SINGLE: + return "single"; + case SOC_OPS_TEST_DOUBLE: + return "double"; + case SOC_OPS_TEST_DOUBLE_R: + return "double_r"; + default: + return "unknown"; + } +}; + +static int mock_regmap_read(void *context, const void *reg_buf, + const size_t reg_size, void *val_buf, + size_t val_size) +{ + struct soc_ops_test_priv *priv =3D context; + + KUNIT_FAIL(priv->test, "Unexpected bus read"); + + return -EIO; +} + +static int mock_regmap_gather_write(void *context, + const void *reg_buf, size_t reg_size, + const void *val_buf, size_t val_size) +{ + struct soc_ops_test_priv *priv =3D context; + + KUNIT_FAIL(priv->test, "Unexpected bus gather_write"); + + return -EIO; +} + +static int mock_regmap_write(void *context, const void *val_buf, + size_t val_size) +{ + struct soc_ops_test_priv *priv =3D context; + + KUNIT_FAIL(priv->test, "Unexpected bus write"); + + return -EIO; +} + +static const struct regmap_bus mock_regmap_bus =3D { + .read =3D mock_regmap_read, + .write =3D mock_regmap_write, + .gather_write =3D mock_regmap_gather_write, + .reg_format_endian_default =3D REGMAP_ENDIAN_NATIVE, + .val_format_endian_default =3D REGMAP_ENDIAN_NATIVE, +}; + +static const struct regmap_config mock_regmap_config =3D { + .reg_bits =3D 32, + .val_bits =3D 32, + .reg_format_endian =3D REGMAP_ENDIAN_NATIVE, + .val_format_endian =3D REGMAP_ENDIAN_NATIVE, + .max_register =3D 0x1, + .cache_type =3D REGCACHE_FLAT, +}; + +static int soc_ops_test_init(struct kunit *test) +{ + struct soc_ops_test_priv *priv; + struct regmap *regmap; + struct device *dev; + + priv =3D kunit_kzalloc(test, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->test =3D test; + + dev =3D kunit_device_register(test, "soc_ops_test_drv"); + if (IS_ERR(dev)) + return PTR_ERR(dev); + + regmap =3D devm_regmap_init(dev, &mock_regmap_bus, priv, &mock_regmap_con= fig); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + /* No actual hardware, we just use the cache */ + regcache_cache_only(regmap, true); + + priv->component.dev =3D dev; + priv->component.regmap =3D regmap; + mutex_init(&priv->component.io_mutex); + + test->priv =3D priv; + + return 0; +} + +static void soc_ops_test_exit(struct kunit *test) +{ + struct soc_ops_test_priv *priv =3D test->priv; + + kunit_device_unregister(test, priv->component.dev); +} + +static void info_test_desc(const struct info_test_param *param, char *desc) +{ + snprintf(desc, KUNIT_PARAM_DESC_SIZE, + "%s %s %s: ctl range: %ld->%ld, reg range: %d->%d(%d), sign: %d, inv: %= d", + control_layout_str(param->layout), param->func_name, + control_type_str(param->uinfo.type), + param->uinfo.value.integer.min, param->uinfo.value.integer.max, + param->mc.min, param->mc.max, param->mc.platform_max, + param->mc.sign_bit, param->mc.invert); +} + +static void soc_ops_test_info(struct kunit *test) +{ + struct soc_ops_test_priv *priv =3D test->priv; + const struct info_test_param *param =3D test->param_value; + const struct snd_ctl_elem_info *target =3D ¶m->uinfo; + struct snd_ctl_elem_info result; + struct snd_kcontrol kctl =3D { + .private_data =3D &priv->component, + .private_value =3D (unsigned long)¶m->mc, + }; + int ret; + + strscpy(kctl.id.name, param->name, sizeof(kctl.id.name)); + + ret =3D param->info(&kctl, &result); + KUNIT_ASSERT_FALSE(test, ret); + + KUNIT_EXPECT_EQ(test, result.count, target->count); + KUNIT_EXPECT_EQ(test, result.type, target->type); + KUNIT_EXPECT_EQ(test, result.value.integer.min, target->value.integer.min= ); + KUNIT_EXPECT_EQ(test, result.value.integer.max, target->value.integer.max= ); +} + +static void access_test_desc(const struct access_test_param *param, char *= desc) +{ + if (param->ret < 0) { + snprintf(desc, KUNIT_PARAM_DESC_SIZE, + "%s %s: %ld,%ld -> range: %d->%d(%d), sign: %d, inv: %d -> err: %d", + control_layout_str(param->layout), param->func_name, + param->lctl, param->rctl, + param->mc.min, param->mc.max, param->mc.platform_max, + param->mc.sign_bit, param->mc.invert, + param->ret); + } else { + snprintf(desc, KUNIT_PARAM_DESC_SIZE, + "%s %s: %ld,%ld -> range: %d->%d(%d), sign: %d, inv: %d -> %#x,%#x", + control_layout_str(param->layout), param->func_name, + param->lctl, param->rctl, + param->mc.min, param->mc.max, param->mc.platform_max, + param->mc.sign_bit, param->mc.invert, + param->lreg, param->rreg); + } +} + +static void soc_ops_test_access(struct kunit *test) +{ + struct soc_ops_test_priv *priv =3D test->priv; + const struct access_test_param *param =3D test->param_value; + struct snd_kcontrol kctl =3D { + .private_data =3D &priv->component, + .private_value =3D (unsigned long)¶m->mc, + }; + struct snd_ctl_elem_value result; + unsigned int val; + int ret; + + ret =3D regmap_write(priv->component.regmap, 0x0, param->init); + KUNIT_ASSERT_FALSE(test, ret); + ret =3D regmap_write(priv->component.regmap, 0x1, param->init); + KUNIT_ASSERT_FALSE(test, ret); + + result.value.integer.value[0] =3D param->lctl; + result.value.integer.value[1] =3D param->rctl; + + ret =3D param->put(&kctl, &result); + KUNIT_ASSERT_EQ(test, ret, param->ret); + if (ret < 0) + return; + + ret =3D regmap_read(priv->component.regmap, 0x0, &val); + KUNIT_ASSERT_FALSE(test, ret); + KUNIT_EXPECT_EQ(test, val, (param->init & ~param->lmask) | param->lreg); + + ret =3D regmap_read(priv->component.regmap, 0x1, &val); + KUNIT_ASSERT_FALSE(test, ret); + KUNIT_EXPECT_EQ(test, val, (param->init & ~param->rmask) | param->rreg); + + result.value.integer.value[0] =3D 0; + result.value.integer.value[1] =3D 0; + + ret =3D param->get(&kctl, &result); + KUNIT_ASSERT_GE(test, ret, 0); + + KUNIT_EXPECT_EQ(test, result.value.integer.value[0], param->lctl); + if (param->layout !=3D SOC_OPS_TEST_SINGLE) + KUNIT_EXPECT_EQ(test, result.value.integer.value[1], param->rctl); + else + KUNIT_EXPECT_EQ(test, result.value.integer.value[1], 0); +} + +KUNIT_ARRAY_PARAM(all_info_tests, all_info_test_params, info_test_desc); +KUNIT_ARRAY_PARAM(all_access_tests, all_access_test_params, access_test_de= sc); + +static struct kunit_case soc_ops_test_cases[] =3D { + KUNIT_CASE_PARAM(soc_ops_test_info, all_info_tests_gen_params), + KUNIT_CASE_PARAM(soc_ops_test_access, all_access_tests_gen_params), + {} +}; + +static struct kunit_suite soc_ops_test_suite =3D { + .name =3D "soc-ops", + .init =3D soc_ops_test_init, + .exit =3D soc_ops_test_exit, + .test_cases =3D soc_ops_test_cases, +}; + +kunit_test_suites(&soc_ops_test_suite); + +MODULE_DESCRIPTION("ASoC soc-ops kunit test"); +MODULE_LICENSE("GPL"); --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D9D51211A2B; Tue, 18 Mar 2025 17:15:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318110; cv=none; b=t/rt5De+x38qoQnZdMrTQH6l6LxRGoYXXa5NjkYJzTU1OtTw698orX/D1RT5ELXluP4ztudUFN10o28SSsy/SZvQiePB8wsrwZzIXEheVFP3XBPlEEw5XZThR+kBOalFQdJSuwYNpxM4vIVdduKZJ+kqSZ7JJorYw+U6Ay7X2pY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318110; c=relaxed/simple; bh=3yI3M08MXAsxiX03n3uak+qUVfekmtgkjUwaN5HtcYA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=bM6FwrMKy+x4ecszkV//pyJvZvda7GWPWLcQ+BHhgxAcz5AR5fbVp27Px0K5hvZvHXzSXYJ9/VF9mVOVg7Molr0U78UaYHxE0zGJ5jGOxDSQO7qw0MKaxlCiiSZiERwa2qWyDthdJy1cuXjh/vHPJSKnyQ9FScDh+NbI8ep9a6M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=aSkTCxV5; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="aSkTCxV5" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I1uEKG028771; Tue, 18 Mar 2025 12:15:02 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=ZFYxIfOcbKtSMKnm2CueQFeeVhTYx0GZR431HLNVbt8=; b= aSkTCxV5FWC1h23HkPnoSCkjeMDUYSG6KrMdvI+acnszt7fjIuMc8NF/BpEBpsPw kazgk8eUDOB8dV5bUNlDEJ7G/YA1QMj+NHzwqyu2EP/qs54jmb0AzVAQtiLZp4NZ E74aXNY2SlWycZAdOOHWtc3pngIiI+oj8Ck00GEiEi5BqjYoC9zXklryXOBf/PeP ebCtV3WxIc+qT8VXuh6eDQWW1kDapsm0HhaLFktXO7pV5rF/gWHnGXbdtVjnsnv9 VqjaJZm1iQLIc3nBFfpwpNYoDs0A6w5lqOdwsyHOtrd+TIExhoaAbudjzpFJydxu xe/A6d6KvFSQZleHa8tlBg== Received: from ediex02.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879w-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:02 -0500 (CDT) Received: from ediex02.ad.cirrus.com (198.61.84.81) by ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id 8141E82255D; Tue, 18 Mar 2025 17:14:59 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 02/15] ASoC: ops: Minor formatting fixups Date: Tue, 18 Mar 2025 17:14:46 +0000 Message-ID: <20250318171459.3203730-3-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa16 cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=2oxQ3XchGMypiEoI-R8A:9 X-Proofpoint-GUID: XZr7TeV9P7Lfnn7bpmziQm0j6Xrf4ux9 X-Proofpoint-ORIG-GUID: XZr7TeV9P7Lfnn7bpmziQm0j6Xrf4ux9 X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" No functional changes just tidying up some tabbing etc. Signed-off-by: Charles Keepax --- sound/soc/soc-ops.c | 106 ++++++++++++++++++++++---------------------- 1 file changed, 54 insertions(+), 52 deletions(-) diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index cd5f927bcd4eb..9039bf3b6fb48 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -37,7 +37,7 @@ * Returns 0 for success. */ int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) + struct snd_ctl_elem_info *uinfo) { struct soc_enum *e =3D (struct soc_enum *)kcontrol->private_value; =20 @@ -56,7 +56,7 @@ EXPORT_SYMBOL_GPL(snd_soc_info_enum_double); * Returns 0 for success. */ int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_enum *e =3D (struct soc_enum *)kcontrol->private_value; @@ -87,7 +87,7 @@ EXPORT_SYMBOL_GPL(snd_soc_get_enum_double); * Returns 0 for success. */ int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_enum *e =3D (struct soc_enum *)kcontrol->private_value; @@ -124,8 +124,9 @@ EXPORT_SYMBOL_GPL(snd_soc_put_enum_double); * the given registervalue into a signed integer if sign_bit is non-zero. */ static void snd_soc_read_signed(struct snd_soc_component *component, - unsigned int reg, unsigned int mask, unsigned int shift, - unsigned int sign_bit, int *signed_val) + unsigned int reg, unsigned int mask, + unsigned int shift, unsigned int sign_bit, + int *signed_val) { int ret; unsigned int val; @@ -168,7 +169,7 @@ static void snd_soc_read_signed(struct snd_soc_componen= t *component, * Returns 0 for success. */ int snd_soc_info_volsw(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) + struct snd_ctl_elem_info *uinfo) { struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; @@ -247,7 +248,7 @@ EXPORT_SYMBOL_GPL(snd_soc_info_volsw_sx); * Returns 0 for success. */ int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D @@ -300,7 +301,7 @@ EXPORT_SYMBOL_GPL(snd_soc_get_volsw); * Returns 0 for success. */ int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D @@ -362,9 +363,8 @@ int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, err =3D snd_soc_component_update_bits(component, reg2, val_mask, val2); /* Don't discard any error code or drop change flag */ - if (ret =3D=3D 0 || err < 0) { + if (ret =3D=3D 0 || err < 0) ret =3D err; - } } =20 return ret; @@ -382,11 +382,11 @@ EXPORT_SYMBOL_GPL(snd_soc_put_volsw); * Returns 0 for success. */ int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D - (struct soc_mixer_control *)kcontrol->private_value; + (struct soc_mixer_control *)kcontrol->private_value; unsigned int reg =3D mc->reg; unsigned int reg2 =3D mc->rreg; unsigned int shift =3D mc->shift; @@ -423,18 +423,17 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontro= l, { struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D - (struct soc_mixer_control *)kcontrol->private_value; - + (struct soc_mixer_control *)kcontrol->private_value; unsigned int reg =3D mc->reg; unsigned int reg2 =3D mc->rreg; unsigned int shift =3D mc->shift; unsigned int rshift =3D mc->rshift; + unsigned int val, val_mask; int max =3D mc->max; int min =3D mc->min; unsigned int mask =3D (1U << (fls(min + max) - 1)) - 1; int err =3D 0; int ret; - unsigned int val, val_mask; =20 if (ucontrol->value.integer.value[0] < 0) return -EINVAL; @@ -465,13 +464,13 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontro= l, val2 =3D val2 << rshift; =20 err =3D snd_soc_component_update_bits(component, reg2, val_mask, - val2); + val2); =20 /* Don't discard any error code or drop change flag */ - if (ret =3D=3D 0 || err < 0) { + if (ret =3D=3D 0 || err < 0) ret =3D err; - } } + return ret; } EXPORT_SYMBOL_GPL(snd_soc_put_volsw_sx); @@ -487,7 +486,7 @@ EXPORT_SYMBOL_GPL(snd_soc_put_volsw_sx); * returns 0 for success. */ int snd_soc_info_volsw_range(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) + struct snd_ctl_elem_info *uinfo) { struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; @@ -516,7 +515,7 @@ EXPORT_SYMBOL_GPL(snd_soc_info_volsw_range); * Returns 0 for success. */ int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; @@ -568,11 +567,10 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcon= trol, val =3D val << shift; =20 err =3D snd_soc_component_update_bits(component, rreg, val_mask, - val); + val); /* Don't discard any error code or drop change flag */ - if (ret =3D=3D 0 || err < 0) { + if (ret =3D=3D 0 || err < 0) ret =3D err; - } } =20 return ret; @@ -589,7 +587,7 @@ EXPORT_SYMBOL_GPL(snd_soc_put_volsw_range); * Returns 0 for success. */ int snd_soc_get_volsw_range(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D @@ -663,8 +661,7 @@ static int snd_soc_clip_to_platform_max(struct snd_kcon= trol *kctl) * * Return 0 for success, else error. */ -int snd_soc_limit_volume(struct snd_soc_card *card, - const char *name, int max) +int snd_soc_limit_volume(struct snd_soc_card *card, const char *name, int = max) { struct snd_kcontrol *kctl; int ret =3D -EINVAL; @@ -675,12 +672,15 @@ int snd_soc_limit_volume(struct snd_soc_card *card, =20 kctl =3D snd_soc_card_get_kcontrol(card, name); if (kctl) { - struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kctl->priva= te_value; + struct soc_mixer_control *mc =3D + (struct soc_mixer_control *)kctl->private_value; + if (max <=3D mc->max - mc->min) { mc->platform_max =3D max; ret =3D snd_soc_clip_to_platform_max(kctl); } } + return ret; } EXPORT_SYMBOL_GPL(snd_soc_limit_volume); @@ -740,8 +740,8 @@ int snd_soc_bytes_put(struct snd_kcontrol *kcontrol, { struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_bytes *params =3D (void *)kcontrol->private_value; - int ret, len; unsigned int val, mask; + int ret, len; =20 if (!component->regmap || !params->num_regs) return -EINVAL; @@ -772,15 +772,13 @@ int snd_soc_bytes_put(struct snd_kcontrol *kcontrol, break; case 2: mask =3D ~params->mask; - ret =3D regmap_parse_val(component->regmap, - &mask, &mask); + ret =3D regmap_parse_val(component->regmap, &mask, &mask); if (ret !=3D 0) return ret; =20 ((u16 *)data)[0] &=3D mask; =20 - ret =3D regmap_parse_val(component->regmap, - &val, &val); + ret =3D regmap_parse_val(component->regmap, &val, &val); if (ret !=3D 0) return ret; =20 @@ -788,15 +786,13 @@ int snd_soc_bytes_put(struct snd_kcontrol *kcontrol, break; case 4: mask =3D ~params->mask; - ret =3D regmap_parse_val(component->regmap, - &mask, &mask); + ret =3D regmap_parse_val(component->regmap, &mask, &mask); if (ret !=3D 0) return ret; =20 ((u32 *)data)[0] &=3D mask; =20 - ret =3D regmap_parse_val(component->regmap, - &val, &val); + ret =3D regmap_parse_val(component->regmap, &val, &val); if (ret !=3D 0) return ret; =20 @@ -812,7 +808,7 @@ int snd_soc_bytes_put(struct snd_kcontrol *kcontrol, EXPORT_SYMBOL_GPL(snd_soc_bytes_put); =20 int snd_soc_bytes_info_ext(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *ucontrol) + struct snd_ctl_elem_info *ucontrol) { struct soc_bytes_ext *params =3D (void *)kcontrol->private_value; =20 @@ -824,7 +820,7 @@ int snd_soc_bytes_info_ext(struct snd_kcontrol *kcontro= l, EXPORT_SYMBOL_GPL(snd_soc_bytes_info_ext); =20 int snd_soc_bytes_tlv_callback(struct snd_kcontrol *kcontrol, int op_flag, - unsigned int size, unsigned int __user *tlv) + unsigned int size, unsigned int __user *tlv) { struct soc_bytes_ext *params =3D (void *)kcontrol->private_value; unsigned int count =3D size < params->max ? size : params->max; @@ -840,6 +836,7 @@ int snd_soc_bytes_tlv_callback(struct snd_kcontrol *kco= ntrol, int op_flag, ret =3D params->put(kcontrol, tlv, count); break; } + return ret; } EXPORT_SYMBOL_GPL(snd_soc_bytes_tlv_callback); @@ -856,10 +853,11 @@ EXPORT_SYMBOL_GPL(snd_soc_bytes_tlv_callback); * Returns 0 for success. */ int snd_soc_info_xr_sx(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) + struct snd_ctl_elem_info *uinfo) { struct soc_mreg_control *mc =3D (struct soc_mreg_control *)kcontrol->private_value; + uinfo->type =3D SNDRV_CTL_ELEM_TYPE_INTEGER; uinfo->count =3D 1; uinfo->value.integer.min =3D mc->min; @@ -883,7 +881,7 @@ EXPORT_SYMBOL_GPL(snd_soc_info_xr_sx); * Returns 0 for success. */ int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mreg_control *mc =3D @@ -891,17 +889,18 @@ int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol, unsigned int regbase =3D mc->regbase; unsigned int regcount =3D mc->regcount; unsigned int regwshift =3D component->val_bytes * BITS_PER_BYTE; - unsigned int regwmask =3D (1UL<invert; - unsigned long mask =3D (1UL<nbits)-1; + unsigned long mask =3D (1UL << mc->nbits) - 1; long min =3D mc->min; long max =3D mc->max; long val =3D 0; unsigned int i; =20 for (i =3D 0; i < regcount; i++) { - unsigned int regval =3D snd_soc_component_read(component, regbase+i); - val |=3D (regval & regwmask) << (regwshift*(regcount-i-1)); + unsigned int regval =3D snd_soc_component_read(component, regbase + i); + + val |=3D (regval & regwmask) << (regwshift * (regcount - i - 1)); } val &=3D mask; if (min < 0 && val > max) @@ -928,7 +927,7 @@ EXPORT_SYMBOL_GPL(snd_soc_get_xr_sx); * Returns 0 for success. */ int snd_soc_put_xr_sx(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mreg_control *mc =3D @@ -936,9 +935,9 @@ int snd_soc_put_xr_sx(struct snd_kcontrol *kcontrol, unsigned int regbase =3D mc->regbase; unsigned int regcount =3D mc->regcount; unsigned int regwshift =3D component->val_bytes * BITS_PER_BYTE; - unsigned int regwmask =3D (1UL<invert; - unsigned long mask =3D (1UL<nbits)-1; + unsigned long mask =3D (1UL << mc->nbits) - 1; long max =3D mc->max; long val =3D ucontrol->value.integer.value[0]; int ret =3D 0; @@ -950,10 +949,13 @@ int snd_soc_put_xr_sx(struct snd_kcontrol *kcontrol, val =3D max - val; val &=3D mask; for (i =3D 0; i < regcount; i++) { - unsigned int regval =3D (val >> (regwshift*(regcount-i-1))) & regwmask; - unsigned int regmask =3D (mask >> (regwshift*(regcount-i-1))) & regwmask; - int err =3D snd_soc_component_update_bits(component, regbase+i, + unsigned int regval =3D (val >> (regwshift * (regcount - i - 1))) & + regwmask; + unsigned int regmask =3D (mask >> (regwshift * (regcount - i - 1))) & + regwmask; + int err =3D snd_soc_component_update_bits(component, regbase + i, regmask, regval); + if (err < 0) return err; if (err > 0) @@ -974,7 +976,7 @@ EXPORT_SYMBOL_GPL(snd_soc_put_xr_sx); * Returns 0 for success. */ int snd_soc_get_strobe(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D @@ -1007,7 +1009,7 @@ EXPORT_SYMBOL_GPL(snd_soc_get_strobe); * Returns 1 for success. */ int snd_soc_put_strobe(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEFA3211A22; Tue, 18 Mar 2025 17:15:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318113; cv=none; b=UhFv1qcArcD8T3x16shOJvcCs5dCNFNTDw+0hRIZRT28Z5JE/RyiDfgP6JYMclrbpUc9x1ncRQOa6lM6lK9QedFRW8EYHvp/myelTt4XmuYeSATebcVRR4OW1eEFWjA3gyeyo5mj0y4ZGwTLVu9Slu2HXArIGjpMVekOjIwr7KQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318113; c=relaxed/simple; bh=xx1EnGkkvElvXQETrT9c7K2n4QpOm+bT2/jsuqX9Xl0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZnG5MFRVLJENjbLS2mU42IRKxV+2PDsc4UbnCdsBfuLCjmIVwXO2z7WomhcNVoxaGlYv2CXlVX1mF4GdJXn2x0uMUqyQegkRDVl8oSIKPBIcfLwcEBJoBVFT1pOgOP3sN5tvtkLWe/L6RtK27iTaMXfyVMKbShKNIDmgIP2bs3E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=NWByQRVY; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="NWByQRVY" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I5qiuE018522; Tue, 18 Mar 2025 12:15:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=geYgAdLRwcGRrNh5U0xYwjeAHc7QQR8431tY3d0KHvI=; b= NWByQRVY3axzJdEU8PNtFUwAD/tPZg0IC9t3CqgwQFK7A46Gd116HqFQMgHzQBNy MTsnHeh2wzG777+3WPrk0NJbF591nTANh2j2SSg3V4y0+kS+1NexnBW2JLGwpra1 Qk5DUz6oL8U/UWGLPYj/DMiqUIxrCjVXzYAhaXyHncFRUBFprm8GdDgWE7/0QlCl xNfyNpL2x91iF8EapYHkoQZdN2u9VJG/idjLy+v3vwKF8iaoG+L5HS06TBFxKiFr HC7jpVeHWP9lEfdy4cA2dVGwC/RMCtfJWqXpLJT14zc6hL111ugdwM9GfB2QD+Js 9sstEc0kCFcVL/tyM/juew== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879v-4 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:03 -0500 (CDT) Received: from ediex02.ad.cirrus.com (198.61.84.81) by ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id 8467482255E; Tue, 18 Mar 2025 17:14:59 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 03/15] ASoC: ops: Update comments for xr_sx control helpers Date: Tue, 18 Mar 2025 17:14:47 +0000 Message-ID: <20250318171459.3203730-4-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa17 cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=BUxhUEZR2ltZMw_a-foA:9 X-Proofpoint-GUID: ue0o9TimriSVkGwBXNPUBQsExhVK-GNr X-Proofpoint-ORIG-GUID: ue0o9TimriSVkGwBXNPUBQsExhVK-GNr X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" Update the comments for the xr_sx control helper functions to better clarify the difference between these and the normal sx helpers. Signed-off-by: Charles Keepax --- sound/soc/soc-ops.c | 29 ++++++++++++++++------------- 1 file changed, 16 insertions(+), 13 deletions(-) diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index 9039bf3b6fb48..dac55138210d5 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -846,9 +846,10 @@ EXPORT_SYMBOL_GPL(snd_soc_bytes_tlv_callback); * @kcontrol: mreg control * @uinfo: control element information * - * Callback to provide information of a control that can - * span multiple codec registers which together - * forms a single signed value in a MSB/LSB manner. + * Callback to provide information of a control that can span multiple + * codec registers which together forms a single signed value. Note + * that unlike the non-xr variant of sx controls these may or may not + * include the sign bit, depending on nbits, and there is no shift. * * Returns 0 for success. */ @@ -872,11 +873,12 @@ EXPORT_SYMBOL_GPL(snd_soc_info_xr_sx); * @kcontrol: mreg control * @ucontrol: control element information * - * Callback to get the value of a control that can span - * multiple codec registers which together forms a single - * signed value in a MSB/LSB manner. The control supports - * specifying total no of bits used to allow for bitfields - * across the multiple codec registers. + * Callback to get the value of a control that can span multiple codec + * registers which together forms a single signed value. The control + * supports specifying total no of bits used to allow for bitfields + * across the multiple codec registers. Note that unlike the non-xr + * variant of sx controls these may or may not include the sign bit, + * depending on nbits, and there is no shift. * * Returns 0 for success. */ @@ -918,11 +920,12 @@ EXPORT_SYMBOL_GPL(snd_soc_get_xr_sx); * @kcontrol: mreg control * @ucontrol: control element information * - * Callback to set the value of a control that can span - * multiple codec registers which together forms a single - * signed value in a MSB/LSB manner. The control supports - * specifying total no of bits used to allow for bitfields - * across the multiple codec registers. + * Callback to set the value of a control that can span multiple codec + * registers which together forms a single signed value. The control + * supports specifying total no of bits used to allow for bitfields + * across the multiple codec registers. Note that unlike the non-xr + * variant of sx controls these may or may not include the sign bit, + * depending on nbits, and there is no shift. * * Returns 0 for success. */ --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B814D20F091; Tue, 18 Mar 2025 17:15:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318108; cv=none; b=DMu815pGnshbiNNuRGvhykV8bWEGJCwjLx75L00YW+eTPK5tFU1uweAf2POIA8vhMZ6e5/06/QOzx2IwbgoIgQCD73NtNEWJNkzO+sdB8bDXZMU4JQnyBoqsv+NYTp4vCvhBfIwrjmu6Bcw+DHVCwgTsbpIt46GJtwwk5VvdGe4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318108; c=relaxed/simple; bh=oPe4Kq1bj9UBrWcKG8s2HHDATru23tP2EvUetFiYkYg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=QW2gwHDPHg5nALFTciq7/j6A2ojyJ7YkbYEJx0uArWoyXDccJZ/aHtt1+WaZlUbnAUu6kg52qdSmO8ojU2AW8C1AoqLglm4Et1nazAxwzgxUJ/uVLBsPGf+aVuIIU3dt4j71xMrLnyqQIZ/PKqRgZJNTDZhy7LD0mXiUE9vIhu4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=YQwhXjo0; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="YQwhXjo0" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I5qiuC018522; Tue, 18 Mar 2025 12:15:02 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=ptvfhQxzX1FHtfnjtqDwf2qwBEyJBpTeqaAAHPr8Cs4=; b= YQwhXjo0xqvvRD2BKEhy1NlZbEy6n7Pt0oBhU+PcMMG8wCwkRycl8N3FN2NV535P 4NujW5zkTvfiV8x3uJR12+NTSijckh1NOwZlpJv/BR5Ef8H3qgQZT5mtGZ0hA9As 9ev4aE8Lpv9H66X8TEjYFi+TL1HGO8hh3Av5v1+A3br189FQPlNFdL3g13EBjVOE 8a3F238Zlxer5i4aBP49RhbPVWP0ZwhHb8iDrhZjQSZuMFBdVp0y263OazlDvN9H t8EI3dFdQGckDVszssGagpmGBYGrHMK1RYkZy9cp+Fzxl8Jnwxtb+Fk3jICxFmoL Vnl6iHFAgNrMtZC1Ikpq+Q== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879v-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:01 -0500 (CDT) Received: from ediex02.ad.cirrus.com (198.61.84.81) by ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id 8804182255F; Tue, 18 Mar 2025 17:14:59 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 04/15] ASoC: ops: Update mask generation to use GENMASK Date: Tue, 18 Mar 2025 17:14:48 +0000 Message-ID: <20250318171459.3203730-5-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa15 cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=NjVXIjOy9wLvg5dM6DQA:9 X-Proofpoint-GUID: 0pF1iPF4tAqPD8ohdUNodFyXzJLCjOiC X-Proofpoint-ORIG-GUID: 0pF1iPF4tAqPD8ohdUNodFyXzJLCjOiC X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" Use GENMASK to make the masks for the various control helper functions. Also factor out a shared helper function for the volsw and volsw_range controls since the same code is appropriate for each. Note this does add support for sign_bit into the volsw_range callbacks. Signed-off-by: Charles Keepax --- sound/soc/soc-ops.c | 46 +++++++++++++++++++++++++-------------------- 1 file changed, 26 insertions(+), 20 deletions(-) diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index dac55138210d5..54945017e1f1e 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -158,6 +158,20 @@ static void snd_soc_read_signed(struct snd_soc_compone= nt *component, *signed_val =3D ret; } =20 +static int soc_mixer_mask(struct soc_mixer_control *mc) +{ + if (mc->sign_bit) + return GENMASK(mc->sign_bit, 0); + else + return GENMASK(fls(mc->max) - 1, 0); +} + +static int soc_mixer_sx_mask(struct soc_mixer_control *mc) +{ + // min + max will take us 1-bit over the size of the mask + return GENMASK(fls(mc->min + mc->max) - 2, 0); +} + /** * snd_soc_info_volsw - single mixer info callback * @kcontrol: mixer control @@ -260,13 +274,10 @@ int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, int max =3D mc->max; int min =3D mc->min; int sign_bit =3D mc->sign_bit; - unsigned int mask =3D (1ULL << fls(max)) - 1; + unsigned int mask =3D soc_mixer_mask(mc); unsigned int invert =3D mc->invert; int val; =20 - if (sign_bit) - mask =3D BIT(sign_bit + 1) - 1; - snd_soc_read_signed(component, reg, mask, shift, sign_bit, &val); =20 ucontrol->value.integer.value[0] =3D val - min; @@ -312,17 +323,13 @@ int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, unsigned int rshift =3D mc->rshift; int max =3D mc->max; int min =3D mc->min; - unsigned int sign_bit =3D mc->sign_bit; - unsigned int mask =3D (1 << fls(max)) - 1; + unsigned int mask =3D soc_mixer_mask(mc); unsigned int invert =3D mc->invert; int err, ret; bool type_2r =3D false; unsigned int val2 =3D 0; unsigned int val, val_mask; =20 - if (sign_bit) - mask =3D BIT(sign_bit + 1) - 1; - if (ucontrol->value.integer.value[0] < 0) return -EINVAL; val =3D ucontrol->value.integer.value[0]; @@ -391,9 +398,8 @@ int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol, unsigned int reg2 =3D mc->rreg; unsigned int shift =3D mc->shift; unsigned int rshift =3D mc->rshift; - int max =3D mc->max; int min =3D mc->min; - unsigned int mask =3D (1U << (fls(min + max) - 1)) - 1; + unsigned int mask =3D soc_mixer_sx_mask(mc); unsigned int val; =20 val =3D snd_soc_component_read(component, reg); @@ -431,7 +437,7 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, unsigned int val, val_mask; int max =3D mc->max; int min =3D mc->min; - unsigned int mask =3D (1U << (fls(min + max) - 1)) - 1; + unsigned int mask =3D soc_mixer_sx_mask(mc); int err =3D 0; int ret; =20 @@ -525,7 +531,7 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcontr= ol, unsigned int shift =3D mc->shift; int min =3D mc->min; int max =3D mc->max; - unsigned int mask =3D (1 << fls(max)) - 1; + unsigned int mask =3D soc_mixer_mask(mc); unsigned int invert =3D mc->invert; unsigned int val, val_mask; int err, ret, tmp; @@ -597,7 +603,7 @@ int snd_soc_get_volsw_range(struct snd_kcontrol *kcontr= ol, unsigned int shift =3D mc->shift; int min =3D mc->min; int max =3D mc->max; - unsigned int mask =3D (1 << fls(max)) - 1; + unsigned int mask =3D soc_mixer_mask(mc); unsigned int invert =3D mc->invert; unsigned int val; =20 @@ -891,9 +897,9 @@ int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol, unsigned int regbase =3D mc->regbase; unsigned int regcount =3D mc->regcount; unsigned int regwshift =3D component->val_bytes * BITS_PER_BYTE; - unsigned int regwmask =3D (1UL << regwshift) - 1; + unsigned int regwmask =3D GENMASK(regwshift - 1, 0); + unsigned long mask =3D GENMASK(mc->nbits - 1, 0); unsigned int invert =3D mc->invert; - unsigned long mask =3D (1UL << mc->nbits) - 1; long min =3D mc->min; long max =3D mc->max; long val =3D 0; @@ -938,9 +944,9 @@ int snd_soc_put_xr_sx(struct snd_kcontrol *kcontrol, unsigned int regbase =3D mc->regbase; unsigned int regcount =3D mc->regcount; unsigned int regwshift =3D component->val_bytes * BITS_PER_BYTE; - unsigned int regwmask =3D (1UL << regwshift) - 1; + unsigned int regwmask =3D GENMASK(regwshift - 1, 0); + unsigned long mask =3D GENMASK(mc->nbits - 1, 0); unsigned int invert =3D mc->invert; - unsigned long mask =3D (1UL << mc->nbits) - 1; long max =3D mc->max; long val =3D ucontrol->value.integer.value[0]; int ret =3D 0; @@ -986,7 +992,7 @@ int snd_soc_get_strobe(struct snd_kcontrol *kcontrol, (struct soc_mixer_control *)kcontrol->private_value; unsigned int reg =3D mc->reg; unsigned int shift =3D mc->shift; - unsigned int mask =3D 1 << shift; + unsigned int mask =3D BIT(shift); unsigned int invert =3D mc->invert !=3D 0; unsigned int val; =20 @@ -1019,7 +1025,7 @@ int snd_soc_put_strobe(struct snd_kcontrol *kcontrol, (struct soc_mixer_control *)kcontrol->private_value; unsigned int reg =3D mc->reg; unsigned int shift =3D mc->shift; - unsigned int mask =3D 1 << shift; + unsigned int mask =3D BIT(shift); unsigned int invert =3D mc->invert !=3D 0; unsigned int strobe =3D ucontrol->value.enumerated.item[0] !=3D 0; unsigned int val1 =3D (strobe ^ invert) ? mask : 0; --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B2A9212B09; Tue, 18 Mar 2025 17:15:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318115; cv=none; b=a50nFxhYG1fMobmoc6r1YxOt0JUSoGVNk++u/jWjodiAt6IPWYvPcnoTCUshFkSA0m5WkBxxt/DuUqFXisc6C54mXPTCFhr8mVKmNq0sUH4WlQxdaPNvuOXNe7lYf2AhG5w0bIfrE0NJZxxeMT8jx+cmyqcqsJkc18ZshgDI8Kk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318115; c=relaxed/simple; bh=lhT5HZ88G4/sRt0PBVGllNagrA8yRC/VHGj1priQUCs=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=sflLSNACiUpFwlFiqKKHjReqtTgDw2cyuqkN7M4j/qbsaIgyqLlkr8G7rE37d9l2Nfjpjk9xVUl9QZZs9kvbz2KauDEirutDxmFSQYvq+juS8wDQtvaDTx6aUfYT1elSg8TA3+uUB/wAkhGr4SNmWAT1FqPmHxl0HNHOTDpnO4g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=qmuogI5+; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="qmuogI5+" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I5qiuD018522; Tue, 18 Mar 2025 12:15:02 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=N7BNKMAoqr52dw2Fw2AWYEwPiQRp7So4m3Cdv7YFbh0=; b= qmuogI5+Bo4bemApaJazNYKk1BGKelwp2a1vjcgO6dwtlY1aRU7ORviVTMvxFj3Y DDOtERbAM+ZgWfmjtxIBueLXCu91Wuc5WbhmQD7czPmU7iyb5+8jV9ypDbxeEEw/ DZBGBSQkw/JfWJSv0BPBEruRcRh1pHab4JZW4aGVjm+IooY7z1B53orziA30wBdB KZC+vc1prPgO6ZL4/4uRxF8opLvH87qTNbo1KBKPRlqw6N/ecpilCdMcGONknU/A gRP2rdz7f7RLXz1nn6ymn8fyIqN+vLjf/xZmDv7LDOgVRhvNSvdpjLbv04WBpMYF qhZ61uY7rCGboyk0MyWTmw== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879v-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:02 -0500 (CDT) Received: from ediex01.ad.cirrus.com (198.61.84.80) by ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id 960BC822560; Tue, 18 Mar 2025 17:14:59 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 05/15] ASoC: ops: Factor out helper to check valid control values Date: Tue, 18 Mar 2025 17:14:49 +0000 Message-ID: <20250318171459.3203730-6-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa16 cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=PKG_pxTaXtLV1nRfRUwA:9 X-Proofpoint-GUID: th1SCWeC6s-2eafGsD6iHlJOgvXls26r X-Proofpoint-ORIG-GUID: th1SCWeC6s-2eafGsD6iHlJOgvXls26r X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" Most of the put handlers have identical code to verify the value passed in from user-space. Factor this out into a single helper function. Signed-off-by: Charles Keepax --- sound/soc/soc-ops.c | 82 ++++++++++++++++++++++++--------------------- 1 file changed, 43 insertions(+), 39 deletions(-) diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index 54945017e1f1e..53a141426a967 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -158,6 +158,20 @@ static void snd_soc_read_signed(struct snd_soc_compone= nt *component, *signed_val =3D ret; } =20 +static int soc_mixer_valid_ctl(struct soc_mixer_control *mc, long val, int= max) +{ + if (val < 0) + return -EINVAL; + + if (mc->platform_max && val > mc->platform_max) + return -EINVAL; + + if (val > max) + return -EINVAL; + + return 0; +} + static int soc_mixer_mask(struct soc_mixer_control *mc) { if (mc->sign_bit) @@ -330,26 +344,24 @@ int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, unsigned int val2 =3D 0; unsigned int val, val_mask; =20 - if (ucontrol->value.integer.value[0] < 0) - return -EINVAL; + ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[0], + mc->max - mc->min); + if (ret) + return ret; + val =3D ucontrol->value.integer.value[0]; - if (mc->platform_max && val > mc->platform_max) - return -EINVAL; - if (val > max - min) - return -EINVAL; val =3D (val + min) & mask; if (invert) val =3D max - val; val_mask =3D mask << shift; val =3D val << shift; if (snd_soc_volsw_is_stereo(mc)) { - if (ucontrol->value.integer.value[1] < 0) - return -EINVAL; + ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[1], + mc->max - mc->min); + if (ret) + return ret; + val2 =3D ucontrol->value.integer.value[1]; - if (mc->platform_max && val2 > mc->platform_max) - return -EINVAL; - if (val2 > max - min) - return -EINVAL; val2 =3D (val2 + min) & mask; if (invert) val2 =3D max - val2; @@ -435,19 +447,16 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontro= l, unsigned int shift =3D mc->shift; unsigned int rshift =3D mc->rshift; unsigned int val, val_mask; - int max =3D mc->max; int min =3D mc->min; unsigned int mask =3D soc_mixer_sx_mask(mc); int err =3D 0; int ret; =20 - if (ucontrol->value.integer.value[0] < 0) - return -EINVAL; + ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[0], mc->max= ); + if (ret) + return ret; + val =3D ucontrol->value.integer.value[0]; - if (mc->platform_max && val > mc->platform_max) - return -EINVAL; - if (val > max) - return -EINVAL; val_mask =3D mask << shift; val =3D (val + min) & mask; val =3D val << shift; @@ -458,13 +467,14 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontro= l, ret =3D err; =20 if (snd_soc_volsw_is_stereo(mc)) { - unsigned int val2 =3D ucontrol->value.integer.value[1]; + unsigned int val2; =20 - if (mc->platform_max && val2 > mc->platform_max) - return -EINVAL; - if (val2 > max) - return -EINVAL; + ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[1], + mc->max); + if (ret) + return ret; =20 + val2 =3D ucontrol->value.integer.value[1]; val_mask =3D mask << rshift; val2 =3D (val2 + min) & mask; val2 =3D val2 << rshift; @@ -534,15 +544,12 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcon= trol, unsigned int mask =3D soc_mixer_mask(mc); unsigned int invert =3D mc->invert; unsigned int val, val_mask; - int err, ret, tmp; + int err, ret; =20 - tmp =3D ucontrol->value.integer.value[0]; - if (tmp < 0) - return -EINVAL; - if (mc->platform_max && tmp > mc->platform_max) - return -EINVAL; - if (tmp > mc->max - mc->min) - return -EINVAL; + ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[0], + mc->max - mc->min); + if (ret) + return ret; =20 if (invert) val =3D (max - ucontrol->value.integer.value[0]) & mask; @@ -557,13 +564,10 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcon= trol, ret =3D err; =20 if (snd_soc_volsw_is_stereo(mc)) { - tmp =3D ucontrol->value.integer.value[1]; - if (tmp < 0) - return -EINVAL; - if (mc->platform_max && tmp > mc->platform_max) - return -EINVAL; - if (tmp > mc->max - mc->min) - return -EINVAL; + ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[1], + mc->max - mc->min); + if (ret) + return ret; =20 if (invert) val =3D (max - ucontrol->value.integer.value[1]) & mask; --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D6D021322F; Tue, 18 Mar 2025 17:15:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318117; cv=none; b=VdBaDz+PLsUEflJYP/PmhQE4VWvTn9ao+SvuC3yJj4tG0HRJZ2al3NufdZa4joM47u6uYZlzN6WWoQXHAfhAfez6c53HcwEgfGcPvlRNq7NP258Lg8J8nzusQKoE0fcyWmt2FvsKMf2rrgHQMMVLg0M6GxhAMqbFqhYPWRMQdBw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318117; c=relaxed/simple; bh=+udgpefTAy9yT5zN1PCHqOG2z6iuVyR1x244DE/iMH8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=B2F7quPaZ/Il0ZpUX6CPmNAb5rPqWBaKa4l6m1q+lDXEj79TT9UbYDBpEKV3CHOl1F9VxTR4z7nnB/uS9MNyfU2CiYIHSdtx+5tg0/ihhbGJuPd7L+eqmgadiC9e5NMXyIzF7HPQxpe1hXR39io/lUR4W90f4Uu3x5/ucClKvGk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=WtM6Y8M2; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="WtM6Y8M2" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I5qiuF018522; Tue, 18 Mar 2025 12:15:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=y9kQbGHzqnOYccxyxIhjlcvoEDanPvD4s8hazf7BM5o=; b= WtM6Y8M2lhIXKghHlvFRJC3Z22UXFv1eQrsWD3YtKkW45ckdI22yWqVoBSfDzgsQ 19WY0HjP44TkXfY2dDxYZzJ3hnJoliX9TxVEQTTndFQSX0ka9HtIcgMgDFuhGPil w+qFP0+I4YofgOALf0y//leS8snhM3VH1oP+u53ikPBYEj/wBA9WLvII/hNVVun3 gNTSRm8FTrLEkPFqd+4/bTooQ+8Z5U9gf1gc1W6DD0lupenHIivqwGX9naldnwQB RewLGIQC2MddPJp3sB+2pIFqXI4gLi673PJCzg5SwLAR+iri4TgwwnqGnFgMeAPm 4/W69DrCuq/E/+BX343zRQ== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879v-5 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:03 -0500 (CDT) Received: from ediex02.ad.cirrus.com (198.61.84.81) by ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id A4091822561; Tue, 18 Mar 2025 17:14:59 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 06/15] ASoC: ops: Replace snd_soc_read_signed() with new helper Date: Tue, 18 Mar 2025 17:14:50 +0000 Message-ID: <20250318171459.3203730-7-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa17 cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=QXL5r4s4IFEui-4iHJ8A:9 X-Proofpoint-GUID: mkDYJI0MYTuhKuuFU4HnhgGxgHd7ikf1 X-Proofpoint-ORIG-GUID: mkDYJI0MYTuhKuuFU4HnhgGxgHd7ikf1 X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" The current snd_soc_read_signed() helper is only used from snd_soc_get_volsw() and can be implemented more simply with sign_extend. Remove snd_soc_read_signed() and add a new soc_mixer_reg_to_ctl() helper. This new helper does not include the reading of the register, but does include min and max handling. This allows the helper to replace more of the duplicated code and makes it easier to process the differences between single, double register and double shift style controls. It is worth noting this adds support for sign_bit into the _range and sx callbacks and the invert option to sx callbacks. Signed-off-by: Charles Keepax --- sound/soc/soc-ops.c | 134 ++++++++++++++------------------------------ 1 file changed, 41 insertions(+), 93 deletions(-) diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index 53a141426a967..af4e678173172 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -110,52 +110,20 @@ int snd_soc_put_enum_double(struct snd_kcontrol *kcon= trol, } EXPORT_SYMBOL_GPL(snd_soc_put_enum_double); =20 -/** - * snd_soc_read_signed - Read a codec register and interpret as signed val= ue - * @component: component - * @reg: Register to read - * @mask: Mask to use after shifting the register value - * @shift: Right shift of register value - * @sign_bit: Bit that describes if a number is negative or not. - * @signed_val: Pointer to where the read value should be stored - * - * This functions reads a codec register. The register value is shifted ri= ght - * by 'shift' bits and masked with the given 'mask'. Afterwards it transla= tes - * the given registervalue into a signed integer if sign_bit is non-zero. - */ -static void snd_soc_read_signed(struct snd_soc_component *component, - unsigned int reg, unsigned int mask, - unsigned int shift, unsigned int sign_bit, - int *signed_val) +static int soc_mixer_reg_to_ctl(struct soc_mixer_control *mc, unsigned int= reg_val, + unsigned int mask, unsigned int shift, int max) { - int ret; - unsigned int val; - - val =3D snd_soc_component_read(component, reg); - val =3D (val >> shift) & mask; + int val =3D (reg_val >> shift) & mask; =20 - if (!sign_bit) { - *signed_val =3D val; - return; - } - - /* non-negative number */ - if (!(val & BIT(sign_bit))) { - *signed_val =3D val; - return; - } + if (mc->sign_bit) + val =3D sign_extend32(val, mc->sign_bit); =20 - ret =3D val; + val -=3D mc->min; =20 - /* - * The register most probably does not contain a full-sized int. - * Instead we have an arbitrary number of bits in a signed - * representation which has to be translated into a full-sized int. - * This is done by filling up all bits above the sign-bit. - */ - ret |=3D ~((int)(BIT(sign_bit) - 1)); + if (mc->invert) + val =3D max - val; =20 - *signed_val =3D ret; + return val & mask; } =20 static int soc_mixer_valid_ctl(struct soc_mixer_control *mc, long val, int= max) @@ -281,34 +249,25 @@ int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; - unsigned int reg =3D mc->reg; - unsigned int reg2 =3D mc->rreg; - unsigned int shift =3D mc->shift; - unsigned int rshift =3D mc->rshift; - int max =3D mc->max; - int min =3D mc->min; - int sign_bit =3D mc->sign_bit; + int max =3D mc->max - mc->min; unsigned int mask =3D soc_mixer_mask(mc); - unsigned int invert =3D mc->invert; + unsigned int reg_val; int val; =20 - snd_soc_read_signed(component, reg, mask, shift, sign_bit, &val); + reg_val =3D snd_soc_component_read(component, mc->reg); + val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->shift, max); =20 - ucontrol->value.integer.value[0] =3D val - min; - if (invert) - ucontrol->value.integer.value[0] =3D - max - ucontrol->value.integer.value[0]; + ucontrol->value.integer.value[0] =3D val; =20 if (snd_soc_volsw_is_stereo(mc)) { - if (reg =3D=3D reg2) - snd_soc_read_signed(component, reg, mask, rshift, sign_bit, &val); - else - snd_soc_read_signed(component, reg2, mask, shift, sign_bit, &val); + if (mc->reg =3D=3D mc->rreg) { + val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->rshift, max); + } else { + reg_val =3D snd_soc_component_read(component, mc->rreg); + val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->shift, max); + } =20 - ucontrol->value.integer.value[1] =3D val - min; - if (invert) - ucontrol->value.integer.value[1] =3D - max - ucontrol->value.integer.value[1]; + ucontrol->value.integer.value[1] =3D val; } =20 return 0; @@ -408,18 +367,19 @@ int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontro= l, (struct soc_mixer_control *)kcontrol->private_value; unsigned int reg =3D mc->reg; unsigned int reg2 =3D mc->rreg; - unsigned int shift =3D mc->shift; - unsigned int rshift =3D mc->rshift; - int min =3D mc->min; unsigned int mask =3D soc_mixer_sx_mask(mc); - unsigned int val; + unsigned int reg_val; + int val; =20 - val =3D snd_soc_component_read(component, reg); - ucontrol->value.integer.value[0] =3D ((val >> shift) - min) & mask; + reg_val =3D snd_soc_component_read(component, reg); + val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->shift, mc->max); + + ucontrol->value.integer.value[0] =3D val; =20 if (snd_soc_volsw_is_stereo(mc)) { - val =3D snd_soc_component_read(component, reg2); - val =3D ((val >> rshift) - min) & mask; + reg_val =3D snd_soc_component_read(component, reg2); + val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->rshift, mc->max); + ucontrol->value.integer.value[1] =3D val; } =20 @@ -602,33 +562,21 @@ int snd_soc_get_volsw_range(struct snd_kcontrol *kcon= trol, struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; - unsigned int reg =3D mc->reg; - unsigned int rreg =3D mc->rreg; - unsigned int shift =3D mc->shift; - int min =3D mc->min; - int max =3D mc->max; + int max =3D mc->max - mc->min; unsigned int mask =3D soc_mixer_mask(mc); - unsigned int invert =3D mc->invert; - unsigned int val; + unsigned int reg_val; + int val; =20 - val =3D snd_soc_component_read(component, reg); - ucontrol->value.integer.value[0] =3D (val >> shift) & mask; - if (invert) - ucontrol->value.integer.value[0] =3D - max - ucontrol->value.integer.value[0]; - else - ucontrol->value.integer.value[0] =3D - ucontrol->value.integer.value[0] - min; + reg_val =3D snd_soc_component_read(component, mc->reg); + val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->shift, max); + + ucontrol->value.integer.value[0] =3D val; =20 if (snd_soc_volsw_is_stereo(mc)) { - val =3D snd_soc_component_read(component, rreg); - ucontrol->value.integer.value[1] =3D (val >> shift) & mask; - if (invert) - ucontrol->value.integer.value[1] =3D - max - ucontrol->value.integer.value[1]; - else - ucontrol->value.integer.value[1] =3D - ucontrol->value.integer.value[1] - min; + reg_val =3D snd_soc_component_read(component, mc->rreg); + val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->shift, max); + + ucontrol->value.integer.value[1] =3D val; } =20 return 0; --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 092632135AD; Tue, 18 Mar 2025 17:15:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318118; cv=none; b=dqnUkjWgnW2++RE8qfWqXnjgISw0tqvwo9Bd3/LxVdIMGvOm9t1LkFTVHJ1y8ArOuw21imxgAVUMMfkao52E6KYrhSI+tvTHm2Pe0+vuZs487ua5qciA8dhyx+2rgWNKQ+/I2H556RGYeCKI5NeDOHyPOjQThn8mBlz2T8cjyUk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318118; c=relaxed/simple; bh=dNi8FldfqZTRvAb5mBNjWGszg5vSj5xps+QDbo+nwfQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=PYugpPc0DX0dw7VEs2TwJR8qNEbBslQGVgbqJK6OE5FAWE4Vqha7iv+OdF/QmkUawLd8k95oeaQmEQb0qGQlfhI3nebVPj/koJkah//9fdKcHnQ6a5ePUSBe/xNWh/5r/rO7J1dMMgCebtrO1ZwcjoEfFykCMzulUSKMFrs92Wc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=VNaCg4gk; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="VNaCg4gk" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I5qiuG018522; Tue, 18 Mar 2025 12:15:04 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=UtEUg1z2/X340wR95EWqtUz/EOiezuwcYYLeLEYlHKs=; b= VNaCg4gklqTQgCW+92IC/g6XD2sbwoWGo8bEFNouBx3T3j4xYPiDYS4qMmsIsNF7 8D+aDH+orrs2Fy47NIifDR+nuNHwl5a5ghk5vdSROflLvazMwZVOSg5/qipNnbC/ WX4zRdJm+xNuWy7PP3gwyyNJ3Plg1abw1m0gAmRfLwMkAKS3ULbhIq4ZMJyME05l ccUHaAcwYIpzmBI4PXxn8i41JOWAMTGcuLD0rV6HyFDjxiyLjWoIsuBHaixJm2M1 bzN8OckhJ0hhgrxNV2jknrvsIGXDEv5uSilL2SEhDO29GrzfvwGPlBu/ojtCZJ5R Je9muV9XqZJoULoht74LQw== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879v-6 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:04 -0500 (CDT) Received: from ediex01.ad.cirrus.com (198.61.84.80) by ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id B2620822562; Tue, 18 Mar 2025 17:14:59 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 07/15] ASoC: ops: Add control to register value helper Date: Tue, 18 Mar 2025 17:14:51 +0000 Message-ID: <20250318171459.3203730-8-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa18 cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=vHv68sP4-F5Tmd_KzTcA:9 X-Proofpoint-GUID: vrN2M8VdUXWhfftLzaRBNSX3NDUB4SaX X-Proofpoint-ORIG-GUID: vrN2M8VdUXWhfftLzaRBNSX3NDUB4SaX X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" Add a helper function to convert from control values to register values that can replace a lot of the duplicated code in the various put handlers. This also fixes a small issue in snd_soc_put_volsw where the value is converted to a control value before doing the invert, but the invert is done against the register max which will result in incorrect values for inverted controls with a non-zero minimum. Signed-off-by: Charles Keepax --- sound/soc/soc-ops.c | 97 ++++++++++++++++++++------------------------- 1 file changed, 43 insertions(+), 54 deletions(-) diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index af4e678173172..888afdd23f84e 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -126,6 +126,20 @@ static int soc_mixer_reg_to_ctl(struct soc_mixer_contr= ol *mc, unsigned int reg_v return val & mask; } =20 +static unsigned int soc_mixer_ctl_to_reg(struct soc_mixer_control *mc, int= val, + unsigned int mask, unsigned int shift, + int max) +{ + unsigned int reg_val; + + if (mc->invert) + val =3D max - val; + + reg_val =3D val + mc->min; + + return (reg_val & mask) << shift; +} + static int soc_mixer_valid_ctl(struct soc_mixer_control *mc, long val, int= max) { if (val < 0) @@ -292,43 +306,35 @@ int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, (struct soc_mixer_control *)kcontrol->private_value; unsigned int reg =3D mc->reg; unsigned int reg2 =3D mc->rreg; - unsigned int shift =3D mc->shift; - unsigned int rshift =3D mc->rshift; - int max =3D mc->max; - int min =3D mc->min; + int max =3D mc->max - mc->min; unsigned int mask =3D soc_mixer_mask(mc); - unsigned int invert =3D mc->invert; int err, ret; bool type_2r =3D false; unsigned int val2 =3D 0; unsigned int val, val_mask; =20 - ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[0], - mc->max - mc->min); + ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[0], max); if (ret) return ret; =20 - val =3D ucontrol->value.integer.value[0]; - val =3D (val + min) & mask; - if (invert) - val =3D max - val; - val_mask =3D mask << shift; - val =3D val << shift; + val =3D soc_mixer_ctl_to_reg(mc, ucontrol->value.integer.value[0], + mask, mc->shift, max); + val_mask =3D mask << mc->shift; + if (snd_soc_volsw_is_stereo(mc)) { - ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[1], - mc->max - mc->min); + ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[1], max); if (ret) return ret; =20 - val2 =3D ucontrol->value.integer.value[1]; - val2 =3D (val2 + min) & mask; - if (invert) - val2 =3D max - val2; if (reg =3D=3D reg2) { - val_mask |=3D mask << rshift; - val |=3D val2 << rshift; + val |=3D soc_mixer_ctl_to_reg(mc, + ucontrol->value.integer.value[1], + mask, mc->rshift, max); + val_mask |=3D mask << mc->rshift; } else { - val2 =3D val2 << shift; + val2 =3D soc_mixer_ctl_to_reg(mc, + ucontrol->value.integer.value[1], + mask, mc->shift, max); type_2r =3D true; } } @@ -404,10 +410,7 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, (struct soc_mixer_control *)kcontrol->private_value; unsigned int reg =3D mc->reg; unsigned int reg2 =3D mc->rreg; - unsigned int shift =3D mc->shift; - unsigned int rshift =3D mc->rshift; unsigned int val, val_mask; - int min =3D mc->min; unsigned int mask =3D soc_mixer_sx_mask(mc); int err =3D 0; int ret; @@ -416,10 +419,9 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, if (ret) return ret; =20 - val =3D ucontrol->value.integer.value[0]; - val_mask =3D mask << shift; - val =3D (val + min) & mask; - val =3D val << shift; + val =3D soc_mixer_ctl_to_reg(mc, ucontrol->value.integer.value[0], + mask, mc->shift, mc->max); + val_mask =3D mask << mc->shift; =20 err =3D snd_soc_component_update_bits(component, reg, val_mask, val); if (err < 0) @@ -427,20 +429,17 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontro= l, ret =3D err; =20 if (snd_soc_volsw_is_stereo(mc)) { - unsigned int val2; - ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[1], mc->max); if (ret) return ret; =20 - val2 =3D ucontrol->value.integer.value[1]; - val_mask =3D mask << rshift; - val2 =3D (val2 + min) & mask; - val2 =3D val2 << rshift; + val =3D soc_mixer_ctl_to_reg(mc, ucontrol->value.integer.value[1], + mask, mc->rshift, mc->max); + val_mask =3D mask << mc->rshift; =20 err =3D snd_soc_component_update_bits(component, reg2, val_mask, - val2); + val); =20 /* Don't discard any error code or drop change flag */ if (ret =3D=3D 0 || err < 0) @@ -498,12 +497,10 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcon= trol, struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); unsigned int reg =3D mc->reg; unsigned int rreg =3D mc->rreg; - unsigned int shift =3D mc->shift; - int min =3D mc->min; - int max =3D mc->max; + int max =3D mc->max - mc->min; unsigned int mask =3D soc_mixer_mask(mc); - unsigned int invert =3D mc->invert; - unsigned int val, val_mask; + unsigned int val_mask =3D mask << mc->shift; + unsigned int val; int err, ret; =20 ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[0], @@ -511,12 +508,8 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcont= rol, if (ret) return ret; =20 - if (invert) - val =3D (max - ucontrol->value.integer.value[0]) & mask; - else - val =3D ((ucontrol->value.integer.value[0] + min) & mask); - val_mask =3D mask << shift; - val =3D val << shift; + val =3D soc_mixer_ctl_to_reg(mc, ucontrol->value.integer.value[0], + mask, mc->shift, max); =20 err =3D snd_soc_component_update_bits(component, reg, val_mask, val); if (err < 0) @@ -525,16 +518,12 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcon= trol, =20 if (snd_soc_volsw_is_stereo(mc)) { ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[1], - mc->max - mc->min); + max); if (ret) return ret; =20 - if (invert) - val =3D (max - ucontrol->value.integer.value[1]) & mask; - else - val =3D ((ucontrol->value.integer.value[1] + min) & mask); - val_mask =3D mask << shift; - val =3D val << shift; + val =3D soc_mixer_ctl_to_reg(mc, ucontrol->value.integer.value[1], + mask, mc->shift, max); =20 err =3D snd_soc_component_update_bits(component, rreg, val_mask, val); --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B307212B0C; Tue, 18 Mar 2025 17:15:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318112; cv=none; b=TiUYcZHVUp7JVTiQDADxdbV8Kqy01u4Lcwa4D03EFLsm5IFRUwTguWrN1el/vcAhcz8kUOaawAjs7HGc9DQmsfGHTXuXe/D3m6cXUcHvh8hMpSNBHhwSeBmbYCyc5E1pio4bl82yiG471C/tytxR9YTigD631y74t7W3l3JgQpM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318112; c=relaxed/simple; bh=y1QlTKpzzCpYIdv8KPOsbVq7bjI/1Y+E0XoteRNBf30=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=s8JPgJ408uED2KPmJGkXHSy1OwJxWPZMVDLkZmlbc+kRHrTo7/dRF9onMvwcofw5GxL6Ubm64ziSgFLSxibhwlsjKokT69ZPQOLjgwHUVMgpkKALVaR1lsLSu/2ChO7lEZbFRazWW1/v6ck9Fljwmgq9wZiy6/gwk6VVInopyuU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=guEyKsCM; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="guEyKsCM" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I1uEKH028771; Tue, 18 Mar 2025 12:15:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=Xqmuylb0d3/CW4C+pAv3nW6YEtYD9eyr3GKueEx0+kw=; b= guEyKsCMkG6aOW4a0LL76xn0IUN/ALsaPA9pAD4g1EAQoZZow9EuCAs4Ketdsy57 JHpOC9PHiDhCoELZG7AysTLci3+RL+xmj2zanf6tsz2RELA9CFlhw6PYtLpodshr fExQaeG7UcHJtx56tLVtyTLFLgcS1+vc2o2dwZDXIcZ0dQApe9We7SaIILipiDeT QM1IvJcq24UmpyaanKmlCq6ahqt7X/cnyFHzYR2asrQ2RG4abVvK3K+DOF4WC14F 2viLp0GMK7fIllplCTWqhMAsZIiemU4IwDbjrn6yt3NAy6Gg1no5c0kiKb1lW5EM lLPPRDx/cbPjtxmx/3SYHw== Received: from ediex02.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879w-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:02 -0500 (CDT) Received: from ediex02.ad.cirrus.com (198.61.84.81) by ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id B75E1822563; Tue, 18 Mar 2025 17:14:59 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 08/15] ASoC: ops: Remove snd_soc_info_volsw_range() Date: Tue, 18 Mar 2025 17:14:52 +0000 Message-ID: <20250318171459.3203730-9-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa16 cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=JNlzxmLKuJj_l6QoI-8A:9 X-Proofpoint-GUID: oN-JiqWMKy0ZZwLPRx1R_vt6ldjY_fdF X-Proofpoint-ORIG-GUID: oN-JiqWMKy0ZZwLPRx1R_vt6ldjY_fdF X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" The only difference between snd_soc_info_volsw() and snd_soc_info_volsw_range() is that the later will not force a 2 value control to be of type integer if the name ends in "Volume". The kernel currently contains no users of snd_soc_info_volsw_range() that would return a boolean control with this code, so the risk is quite low and it seems appropriate that it should contain volume control detection. So remove snd_soc_info_volsw_range() and point its users at snd_soc_info_volsw(). Signed-off-by: Charles Keepax --- include/sound/soc.h | 12 +++++------ sound/pci/hda/tas2781_hda_i2c.c | 2 +- sound/pci/hda/tas2781_hda_spi.c | 2 +- sound/soc/soc-ops.c | 36 +++------------------------------ sound/soc/soc-topology.c | 2 +- 5 files changed, 11 insertions(+), 43 deletions(-) diff --git a/include/sound/soc.h b/include/sound/soc.h index d73fe26de1669..b310f2c599f87 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -65,7 +65,7 @@ struct platform_device; .private_value =3D SOC_SINGLE_VALUE(reg, shift, 0, max, invert, 0) } #define SOC_SINGLE_RANGE(xname, xreg, xshift, xmin, xmax, xinvert) \ { .iface =3D SNDRV_CTL_ELEM_IFACE_MIXER, .name =3D (xname),\ - .info =3D snd_soc_info_volsw_range, .get =3D snd_soc_get_volsw_range, \ + .info =3D snd_soc_info_volsw, .get =3D snd_soc_get_volsw_range, \ .put =3D snd_soc_put_volsw_range, \ .private_value =3D SOC_SINGLE_VALUE(xreg, xshift, xmin, xmax, xinvert, 0)= } #define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \ @@ -90,7 +90,7 @@ struct platform_device; .access =3D SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ SNDRV_CTL_ELEM_ACCESS_READWRITE,\ .tlv.p =3D (tlv_array), \ - .info =3D snd_soc_info_volsw_range, \ + .info =3D snd_soc_info_volsw, \ .get =3D snd_soc_get_volsw_range, .put =3D snd_soc_put_volsw_range, \ .private_value =3D SOC_SINGLE_VALUE(xreg, xshift, xmin, xmax, xinvert, 0)= } #define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \ @@ -116,7 +116,7 @@ struct platform_device; #define SOC_DOUBLE_R_RANGE(xname, reg_left, reg_right, xshift, xmin, \ xmax, xinvert) \ { .iface =3D SNDRV_CTL_ELEM_IFACE_MIXER, .name =3D (xname),\ - .info =3D snd_soc_info_volsw_range, \ + .info =3D snd_soc_info_volsw, \ .get =3D snd_soc_get_volsw_range, .put =3D snd_soc_put_volsw_range, \ .private_value =3D SOC_DOUBLE_R_VALUE(reg_left, reg_right, \ xshift, xmin, xmax, xinvert) } @@ -164,7 +164,7 @@ struct platform_device; .access =3D SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ SNDRV_CTL_ELEM_ACCESS_READWRITE,\ .tlv.p =3D (tlv_array), \ - .info =3D snd_soc_info_volsw_range, \ + .info =3D snd_soc_info_volsw, \ .get =3D snd_soc_get_volsw_range, .put =3D snd_soc_put_volsw_range, \ .private_value =3D SOC_DOUBLE_R_VALUE(reg_left, reg_right, \ xshift, xmin, xmax, xinvert) } @@ -266,7 +266,7 @@ struct platform_device; .access =3D SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ SNDRV_CTL_ELEM_ACCESS_READWRITE,\ .tlv.p =3D (tlv_array), \ - .info =3D snd_soc_info_volsw_range, \ + .info =3D snd_soc_info_volsw, \ .get =3D xhandler_get, .put =3D xhandler_put, \ .private_value =3D SOC_SINGLE_VALUE(xreg, xshift, xmin, xmax, xinvert, 0)= } #define SOC_DOUBLE_EXT_TLV(xname, xreg, shift_left, shift_right, xmax, xin= vert,\ @@ -569,8 +569,6 @@ int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); -int snd_soc_info_volsw_range(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo); int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); int snd_soc_get_volsw_range(struct snd_kcontrol *kcontrol, diff --git a/sound/pci/hda/tas2781_hda_i2c.c b/sound/pci/hda/tas2781_hda_i2= c.c index be9a90f643ebb..50c5e5f265895 100644 --- a/sound/pci/hda/tas2781_hda_i2c.c +++ b/sound/pci/hda/tas2781_hda_i2c.c @@ -45,7 +45,7 @@ .access =3D SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ SNDRV_CTL_ELEM_ACCESS_READWRITE,\ .tlv.p =3D (tlv_array), \ - .info =3D snd_soc_info_volsw_range, \ + .info =3D snd_soc_info_volsw, \ .get =3D xhandler_get, .put =3D xhandler_put, \ .private_value =3D (unsigned long)&(struct soc_mixer_control) \ {.reg =3D xreg, .rreg =3D xreg, .shift =3D xshift, \ diff --git a/sound/pci/hda/tas2781_hda_spi.c b/sound/pci/hda/tas2781_hda_sp= i.c index 00676cbb2c8e4..399f2e4c3b62b 100644 --- a/sound/pci/hda/tas2781_hda_spi.c +++ b/sound/pci/hda/tas2781_hda_spi.c @@ -52,7 +52,7 @@ .access =3D SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ SNDRV_CTL_ELEM_ACCESS_READWRITE, \ .tlv.p =3D (tlv_array), \ - .info =3D snd_soc_info_volsw_range, \ + .info =3D snd_soc_info_volsw, \ .get =3D xhandler_get, .put =3D xhandler_put, \ .private_value =3D (unsigned long)&(struct soc_mixer_control) { \ .reg =3D xreg, .rreg =3D xreg, \ diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index 888afdd23f84e..1b52ba12df8df 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -169,12 +169,12 @@ static int soc_mixer_sx_mask(struct soc_mixer_control= *mc) } =20 /** - * snd_soc_info_volsw - single mixer info callback + * snd_soc_info_volsw - single mixer info callback with range. * @kcontrol: mixer control * @uinfo: control element information * - * Callback to provide information about a single mixer control, or a doub= le - * mixer control that spans 2 registers. + * Callback to provide information, with a range, about a single mixer con= trol, + * or a double mixer control that spans 2 registers. * * Returns 0 for success. */ @@ -450,36 +450,6 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(snd_soc_put_volsw_sx); =20 -/** - * snd_soc_info_volsw_range - single mixer info callback with range. - * @kcontrol: mixer control - * @uinfo: control element information - * - * Callback to provide information, within a range, about a single - * mixer control. - * - * returns 0 for success. - */ -int snd_soc_info_volsw_range(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - struct soc_mixer_control *mc =3D - (struct soc_mixer_control *)kcontrol->private_value; - int max; - - max =3D mc->max - mc->min; - if (mc->platform_max && mc->platform_max < max) - max =3D mc->platform_max; - - uinfo->type =3D SNDRV_CTL_ELEM_TYPE_INTEGER; - uinfo->count =3D snd_soc_volsw_is_stereo(mc) ? 2 : 1; - uinfo->value.integer.min =3D 0; - uinfo->value.integer.max =3D max; - - return 0; -} -EXPORT_SYMBOL_GPL(snd_soc_info_volsw_range); - /** * snd_soc_put_volsw_range - single mixer put value callback with range. * @kcontrol: mixer control diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c index 2b86cc3311f76..9cbddfbbc556b 100644 --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -132,7 +132,7 @@ static const struct snd_soc_tplg_kcontrol_ops io_ops[] = =3D { {SND_SOC_TPLG_CTL_BYTES, snd_soc_bytes_get, snd_soc_bytes_put, snd_soc_bytes_info}, {SND_SOC_TPLG_CTL_RANGE, snd_soc_get_volsw_range, - snd_soc_put_volsw_range, snd_soc_info_volsw_range}, + snd_soc_put_volsw_range, snd_soc_info_volsw}, {SND_SOC_TPLG_CTL_VOLSW_XR_SX, snd_soc_get_xr_sx, snd_soc_put_xr_sx, snd_soc_info_xr_sx}, {SND_SOC_TPLG_CTL_STROBE, snd_soc_get_strobe, --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 027B8212F89; Tue, 18 Mar 2025 17:15:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318118; cv=none; b=lEtoCSIxQBle125dKpHFMP1KtysCVRanHInQvGhxn6eSPfeXHgSQuqYmQd8BaRzMupFNF37qav+GOa1RX3clVKjCVWn2jwVz8JQOp5rvHmYRrWw9GSQK0A4WW72zoUqE/WnKRfRwwlgNpst9DEUwOxAjimUjJychCbrA08PLB4Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318118; c=relaxed/simple; bh=SUNpd7U95e9/6EUQgBL8xA6jfmic1CV974GEwDbuTyU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=SIpyLZWwwE8TWcR9rQCgwaSDMD1a3RnG0HlVTNryejRPBsz761F+5psPdfOBMxmYPnyhK7GFMaZ2oOkaCMxK6e7Mo5gcrpnYDxfS1IDy5mfFwedVOI1pbN5xBT+Sk9ZT5XZOsWwRN5HbZTmtUPrqtsnzBw4h6NiYLy+H8RRxVRA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=U4PtV3xZ; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="U4PtV3xZ" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I5qiuI018522; Tue, 18 Mar 2025 12:15:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=Nlgk1ed49uKDWoWbCqbtak8/XbulrzkJ/Oo20sjqh54=; b= U4PtV3xZe+6Mg61bGP/ygiUIF+bE0vB1Y5BbjZ7vobLfqe2pKHalyiHnuDA66rc7 FZUmPURE4TatI6gywqwlD80NT822oaN0sJcGiVcMe71YpvxQVXM8ifsDmVYwZZon loyT27IrXVVEdF6aRi/kjAIu1dl2pxWRAFTFWwqTWC+da/V+9O8z31k0GrMVRht/ DOwDGAz7/MF5ZPeBGcKDCFHDOTTwmLKMRESocCXASJLaZ7GhQLyYyeIsbqlolwRd i8F3+6KPCvBeZOzjhx2W4FIJuASzoeU+r0tqaQa84eDCCRS52CrDpQDrbB7HO6Dc OboGgs3roMWHVAIUBLngQQ== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879v-8 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:05 -0500 (CDT) Received: from ediex02.ad.cirrus.com (198.61.84.81) by ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id C60C8822564; Tue, 18 Mar 2025 17:14:59 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 09/15] ASoC: ops: Remove snd_soc_get_volsw_range() Date: Tue, 18 Mar 2025 17:14:53 +0000 Message-ID: <20250318171459.3203730-10-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa19 cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=8wWVALWcytAAMUzjV5cA:9 X-Proofpoint-GUID: gKmTCVgnAICgafmvcAHQcfbyeVG_v2Qq X-Proofpoint-ORIG-GUID: gKmTCVgnAICgafmvcAHQcfbyeVG_v2Qq X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" With the addition of the soc_mixer_reg_to_ctl() helper it is now very clear that the only difference between snd_soc_get_volsw() and snd_soc_get_volsw_range() is that the former supports double controls with both values in the same register. As such we can combine both functions. Signed-off-by: Charles Keepax --- include/sound/soc.h | 10 ++++------ sound/soc/codecs/wm5110.c | 2 +- sound/soc/soc-ops.c | 42 +++------------------------------------ sound/soc/soc-topology.c | 2 +- 4 files changed, 9 insertions(+), 47 deletions(-) diff --git a/include/sound/soc.h b/include/sound/soc.h index b310f2c599f87..b11c6cdb0201c 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -65,7 +65,7 @@ struct platform_device; .private_value =3D SOC_SINGLE_VALUE(reg, shift, 0, max, invert, 0) } #define SOC_SINGLE_RANGE(xname, xreg, xshift, xmin, xmax, xinvert) \ { .iface =3D SNDRV_CTL_ELEM_IFACE_MIXER, .name =3D (xname),\ - .info =3D snd_soc_info_volsw, .get =3D snd_soc_get_volsw_range, \ + .info =3D snd_soc_info_volsw, .get =3D snd_soc_get_volsw, \ .put =3D snd_soc_put_volsw_range, \ .private_value =3D SOC_SINGLE_VALUE(xreg, xshift, xmin, xmax, xinvert, 0)= } #define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \ @@ -91,7 +91,7 @@ struct platform_device; SNDRV_CTL_ELEM_ACCESS_READWRITE,\ .tlv.p =3D (tlv_array), \ .info =3D snd_soc_info_volsw, \ - .get =3D snd_soc_get_volsw_range, .put =3D snd_soc_put_volsw_range, \ + .get =3D snd_soc_get_volsw, .put =3D snd_soc_put_volsw_range, \ .private_value =3D SOC_SINGLE_VALUE(xreg, xshift, xmin, xmax, xinvert, 0)= } #define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \ { .iface =3D SNDRV_CTL_ELEM_IFACE_MIXER, .name =3D (xname),\ @@ -117,7 +117,7 @@ struct platform_device; xmax, xinvert) \ { .iface =3D SNDRV_CTL_ELEM_IFACE_MIXER, .name =3D (xname),\ .info =3D snd_soc_info_volsw, \ - .get =3D snd_soc_get_volsw_range, .put =3D snd_soc_put_volsw_range, \ + .get =3D snd_soc_get_volsw, .put =3D snd_soc_put_volsw_range, \ .private_value =3D SOC_DOUBLE_R_VALUE(reg_left, reg_right, \ xshift, xmin, xmax, xinvert) } #define SOC_DOUBLE_TLV(xname, reg, shift_left, shift_right, max, invert, t= lv_array) \ @@ -165,7 +165,7 @@ struct platform_device; SNDRV_CTL_ELEM_ACCESS_READWRITE,\ .tlv.p =3D (tlv_array), \ .info =3D snd_soc_info_volsw, \ - .get =3D snd_soc_get_volsw_range, .put =3D snd_soc_put_volsw_range, \ + .get =3D snd_soc_get_volsw, .put =3D snd_soc_put_volsw_range, \ .private_value =3D SOC_DOUBLE_R_VALUE(reg_left, reg_right, \ xshift, xmin, xmax, xinvert) } #define SOC_DOUBLE_R_SX_TLV(xname, xreg, xrreg, xshift, xmin, xmax, tlv_ar= ray) \ @@ -571,8 +571,6 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); -int snd_soc_get_volsw_range(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); int snd_soc_limit_volume(struct snd_soc_card *card, const char *name, int max); int snd_soc_bytes_info(struct snd_kcontrol *kcontrol, diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 64eee0d2347da..c24b42c375785 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -477,7 +477,7 @@ static int wm5110_in_pga_get(struct snd_kcontrol *kcont= rol, */ snd_soc_dapm_mutex_lock(dapm); =20 - ret =3D snd_soc_get_volsw_range(kcontrol, ucontrol); + ret =3D snd_soc_get_volsw(kcontrol, ucontrol); =20 snd_soc_dapm_mutex_unlock(dapm); =20 diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index 1b52ba12df8df..fbda8e21c5a60 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -248,12 +248,12 @@ int snd_soc_info_volsw_sx(struct snd_kcontrol *kcontr= ol, EXPORT_SYMBOL_GPL(snd_soc_info_volsw_sx); =20 /** - * snd_soc_get_volsw - single mixer get callback + * snd_soc_get_volsw - single mixer get callback with range * @kcontrol: mixer control * @ucontrol: control element information * - * Callback to get the value of a single mixer control, or a double mixer - * control that spans 2 registers. + * Callback to get the value, within a range, of a single mixer control, o= r a + * double mixer control that spans 2 registers. * * Returns 0 for success. */ @@ -506,42 +506,6 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcont= rol, } EXPORT_SYMBOL_GPL(snd_soc_put_volsw_range); =20 -/** - * snd_soc_get_volsw_range - single mixer get callback with range - * @kcontrol: mixer control - * @ucontrol: control element information - * - * Callback to get the value, within a range, of a single mixer control. - * - * Returns 0 for success. - */ -int snd_soc_get_volsw_range(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); - struct soc_mixer_control *mc =3D - (struct soc_mixer_control *)kcontrol->private_value; - int max =3D mc->max - mc->min; - unsigned int mask =3D soc_mixer_mask(mc); - unsigned int reg_val; - int val; - - reg_val =3D snd_soc_component_read(component, mc->reg); - val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->shift, max); - - ucontrol->value.integer.value[0] =3D val; - - if (snd_soc_volsw_is_stereo(mc)) { - reg_val =3D snd_soc_component_read(component, mc->rreg); - val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->shift, max); - - ucontrol->value.integer.value[1] =3D val; - } - - return 0; -} -EXPORT_SYMBOL_GPL(snd_soc_get_volsw_range); - static int snd_soc_clip_to_platform_max(struct snd_kcontrol *kctl) { struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kctl->privat= e_value; diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c index 9cbddfbbc556b..3c988925c512f 100644 --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -131,7 +131,7 @@ static const struct snd_soc_tplg_kcontrol_ops io_ops[] = =3D { snd_soc_put_enum_double, NULL}, {SND_SOC_TPLG_CTL_BYTES, snd_soc_bytes_get, snd_soc_bytes_put, snd_soc_bytes_info}, - {SND_SOC_TPLG_CTL_RANGE, snd_soc_get_volsw_range, + {SND_SOC_TPLG_CTL_RANGE, snd_soc_get_volsw, snd_soc_put_volsw_range, snd_soc_info_volsw}, {SND_SOC_TPLG_CTL_VOLSW_XR_SX, snd_soc_get_xr_sx, snd_soc_put_xr_sx, snd_soc_info_xr_sx}, --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25B64212F8A; Tue, 18 Mar 2025 17:15:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318115; cv=none; b=snT6+ZDaBxmDwP90KNzAFJ+/k1OyuHgQV+W3QC1/MdRWZmrL3AZjj4o6RzfvL7+ZRwRqh0PIFXfduFwz2LdugjoBKiwJOJg606eYukAWCC9asfiPzFQJpDDEvZP1fw/mWp0ENUv5lVjygBaEB3dWApl86j5ufXmHS7BLb4IVcG0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318115; c=relaxed/simple; bh=+dH92ocLjJ6wa0Y3SrmjwQ/JRpByKYgkdY0595FFKsg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=SghNCRSQe8pLVhytWae+z86M9x3UBoEKIaCh7vhFnij38iV+rE9eWSfRWp6g8qXvM1cz8XFxFikCotNXHD29SAJ1/qaCTF3VcF+yiCISRGzBO05S2XPsEkku5BvisYHpiS16SZ/rruMgpO2Iquga2jmnr/0au/QQzvOlxSjapac= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=lthcbO4x; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="lthcbO4x" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I1uEKI028771; Tue, 18 Mar 2025 12:15:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=1crjX80SD3nVHWWSLi4EhYb5XqXoj/x81vkcAIpz9V0=; b= lthcbO4xW9X/7G+qqSk9JqtrNyvDbda5/FCczFZ8uuokarBWP/JxaOPMzMbQwxRA zV/8kgnMvVJV1j+Yg9e55vB7VT7c7/4pDZBoF+KsSh/OCgBXnsDngJwPciJ2DKpg CbngnBoP15dZYdBAkb0yDkNKwk023xydqmMITPdNHbDYsBqkZCZ13ZZNk7Ju+32U 6GwzHrkUu5WsoTud4f5Kmw4wtnb0OCiXSANDOykEqYVKawJ91VNnAwV0hSArkxAP vGfV2iUZE6oXQ5BRbuDPU/eLp299qIOOM/A1HAiE3dh3glMNiWfa5Jxx5zgWupPE uR/SaTSIuMz8wwbAWrIEKA== Received: from ediex02.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879w-4 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:03 -0500 (CDT) Received: from ediex01.ad.cirrus.com (198.61.84.80) by ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id CD1E682255A; Tue, 18 Mar 2025 17:14:59 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 10/15] ASoC: ops: Remove snd_soc_put_volsw_range() Date: Tue, 18 Mar 2025 17:14:54 +0000 Message-ID: <20250318171459.3203730-11-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa17 cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=Zy0Bk6uOyu1aLBoWSYEA:9 X-Proofpoint-GUID: mXYGEWDnAHO_Idx_GePhOrT-NF4H74sZ X-Proofpoint-ORIG-GUID: mXYGEWDnAHO_Idx_GePhOrT-NF4H74sZ X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" With the addition of the soc_mixer_ctl_to_reg() helper it is now very clear that the only difference between snd_soc_put_volsw() and snd_soc_put_volsw_range() is that the former supports double controls with both values in the same register. As such we can combine both functions. Signed-off-by: Charles Keepax --- include/sound/soc.h | 10 +++---- sound/soc/codecs/wm5110.c | 2 +- sound/soc/soc-ops.c | 62 ++------------------------------------- sound/soc/soc-topology.c | 2 +- 4 files changed, 9 insertions(+), 67 deletions(-) diff --git a/include/sound/soc.h b/include/sound/soc.h index b11c6cdb0201c..952ed77b8c87f 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -66,7 +66,7 @@ struct platform_device; #define SOC_SINGLE_RANGE(xname, xreg, xshift, xmin, xmax, xinvert) \ { .iface =3D SNDRV_CTL_ELEM_IFACE_MIXER, .name =3D (xname),\ .info =3D snd_soc_info_volsw, .get =3D snd_soc_get_volsw, \ - .put =3D snd_soc_put_volsw_range, \ + .put =3D snd_soc_put_volsw, \ .private_value =3D SOC_SINGLE_VALUE(xreg, xshift, xmin, xmax, xinvert, 0)= } #define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \ { .iface =3D SNDRV_CTL_ELEM_IFACE_MIXER, .name =3D xname, \ @@ -91,7 +91,7 @@ struct platform_device; SNDRV_CTL_ELEM_ACCESS_READWRITE,\ .tlv.p =3D (tlv_array), \ .info =3D snd_soc_info_volsw, \ - .get =3D snd_soc_get_volsw, .put =3D snd_soc_put_volsw_range, \ + .get =3D snd_soc_get_volsw, .put =3D snd_soc_put_volsw, \ .private_value =3D SOC_SINGLE_VALUE(xreg, xshift, xmin, xmax, xinvert, 0)= } #define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \ { .iface =3D SNDRV_CTL_ELEM_IFACE_MIXER, .name =3D (xname),\ @@ -117,7 +117,7 @@ struct platform_device; xmax, xinvert) \ { .iface =3D SNDRV_CTL_ELEM_IFACE_MIXER, .name =3D (xname),\ .info =3D snd_soc_info_volsw, \ - .get =3D snd_soc_get_volsw, .put =3D snd_soc_put_volsw_range, \ + .get =3D snd_soc_get_volsw, .put =3D snd_soc_put_volsw, \ .private_value =3D SOC_DOUBLE_R_VALUE(reg_left, reg_right, \ xshift, xmin, xmax, xinvert) } #define SOC_DOUBLE_TLV(xname, reg, shift_left, shift_right, max, invert, t= lv_array) \ @@ -165,7 +165,7 @@ struct platform_device; SNDRV_CTL_ELEM_ACCESS_READWRITE,\ .tlv.p =3D (tlv_array), \ .info =3D snd_soc_info_volsw, \ - .get =3D snd_soc_get_volsw, .put =3D snd_soc_put_volsw_range, \ + .get =3D snd_soc_get_volsw, .put =3D snd_soc_put_volsw, \ .private_value =3D SOC_DOUBLE_R_VALUE(reg_left, reg_right, \ xshift, xmin, xmax, xinvert) } #define SOC_DOUBLE_R_SX_TLV(xname, xreg, xrreg, xshift, xmin, xmax, tlv_ar= ray) \ @@ -569,8 +569,6 @@ int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); -int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); int snd_soc_limit_volume(struct snd_soc_card *card, const char *name, int max); int snd_soc_bytes_info(struct snd_kcontrol *kcontrol, diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index c24b42c375785..212eca675f27e 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -497,7 +497,7 @@ static int wm5110_in_pga_put(struct snd_kcontrol *kcont= rol, */ snd_soc_dapm_mutex_lock(dapm); =20 - ret =3D snd_soc_put_volsw_range(kcontrol, ucontrol); + ret =3D snd_soc_put_volsw(kcontrol, ucontrol); =20 snd_soc_dapm_mutex_unlock(dapm); =20 diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index fbda8e21c5a60..d26d9e050af12 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -289,12 +289,12 @@ int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, EXPORT_SYMBOL_GPL(snd_soc_get_volsw); =20 /** - * snd_soc_put_volsw - single mixer put callback + * snd_soc_put_volsw - single mixer put callback with range * @kcontrol: mixer control * @ucontrol: control element information * - * Callback to set the value of a single mixer control, or a double mixer - * control that spans 2 registers. + * Callback to set the value , within a range, of a single mixer control, = or + * a double mixer control that spans 2 registers. * * Returns 0 for success. */ @@ -450,62 +450,6 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, } EXPORT_SYMBOL_GPL(snd_soc_put_volsw_sx); =20 -/** - * snd_soc_put_volsw_range - single mixer put value callback with range. - * @kcontrol: mixer control - * @ucontrol: control element information - * - * Callback to set the value, within a range, for a single mixer control. - * - * Returns 0 for success. - */ -int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct soc_mixer_control *mc =3D - (struct soc_mixer_control *)kcontrol->private_value; - struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); - unsigned int reg =3D mc->reg; - unsigned int rreg =3D mc->rreg; - int max =3D mc->max - mc->min; - unsigned int mask =3D soc_mixer_mask(mc); - unsigned int val_mask =3D mask << mc->shift; - unsigned int val; - int err, ret; - - ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[0], - mc->max - mc->min); - if (ret) - return ret; - - val =3D soc_mixer_ctl_to_reg(mc, ucontrol->value.integer.value[0], - mask, mc->shift, max); - - err =3D snd_soc_component_update_bits(component, reg, val_mask, val); - if (err < 0) - return err; - ret =3D err; - - if (snd_soc_volsw_is_stereo(mc)) { - ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[1], - max); - if (ret) - return ret; - - val =3D soc_mixer_ctl_to_reg(mc, ucontrol->value.integer.value[1], - mask, mc->shift, max); - - err =3D snd_soc_component_update_bits(component, rreg, val_mask, - val); - /* Don't discard any error code or drop change flag */ - if (ret =3D=3D 0 || err < 0) - ret =3D err; - } - - return ret; -} -EXPORT_SYMBOL_GPL(snd_soc_put_volsw_range); - static int snd_soc_clip_to_platform_max(struct snd_kcontrol *kctl) { struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kctl->privat= e_value; diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c index 3c988925c512f..7b0b8531bb32f 100644 --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -132,7 +132,7 @@ static const struct snd_soc_tplg_kcontrol_ops io_ops[] = =3D { {SND_SOC_TPLG_CTL_BYTES, snd_soc_bytes_get, snd_soc_bytes_put, snd_soc_bytes_info}, {SND_SOC_TPLG_CTL_RANGE, snd_soc_get_volsw, - snd_soc_put_volsw_range, snd_soc_info_volsw}, + snd_soc_put_volsw, snd_soc_info_volsw}, {SND_SOC_TPLG_CTL_VOLSW_XR_SX, snd_soc_get_xr_sx, snd_soc_put_xr_sx, snd_soc_info_xr_sx}, {SND_SOC_TPLG_CTL_STROBE, snd_soc_get_strobe, --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E2C6212B39; Tue, 18 Mar 2025 17:15:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318113; cv=none; b=oQUSmltCzkazhzJqWHZnxnADdueuvlNajXJBhYF/BJoI6TRS1zcKCIa0zQ0f/1JXehPHGeBTrruQHWe0GjKPJIOX1QTe2/WT4VS2koI9ap0qlYnD87ResKtJrdWaIfk4uPKWt3SwJ+vNVip20+fCYFTV6YXPuqqkTrxl72sKE6Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318113; c=relaxed/simple; bh=rW/pGZaK/7wUDBiYCVQC2w+K1d4bVqDqrMOHLbaztxY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=kUtNobeRPSL8x96ZtIcWCU+1cGo6gegpLAOXqDEt5Bo0Nm5yukrnstu0PQ6AyvNrw8bBtNDgY+8+wLa7UsGnmRe8CPDLOXpK8k0sIz7UMtcDl18szrK7vgK315ixLeyZ+3OutKz53XsAbr0nDqCQSDP12n9gXCki5FBi18F1kuk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=e8vZd9yT; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="e8vZd9yT" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I5qiuH018522; Tue, 18 Mar 2025 12:15:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=SiBooa8YAtIrdsevQ+rdcHXM4a0n66JQDZ/31ASqC84=; b= e8vZd9yTnWkmY/4o3WZ8gyUZEd6qApdOBtr3bzy2Qlh16AgOUuHxxwT1GHXJ95CO ZOvpeKO/ESQUiYWy3Yfhhf5Qobh2I0l9gPnptIS9LbDSV2Lt4BxnSRs9mBf6RvDk 7nbOaLBNoIpNPKNvVLG44Qd6NSI+yYM7l3rbbWmWBgvPK31PtE8Y6CdVn1YOvxXq nfm8v3OWfu2WOW4sM6r00EDHMOA/sICagtpGQuu/baSh3jr6o1y252OskQOFCiVM vuJ/e5UCadDGcy7tbGOVEl0gF2UFvb52bYq4xwg3M5imsaHtCu835kxjFAKZELbn DAXjCru++6yyTImpFgMBOg== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879v-7 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:04 -0500 (CDT) Received: from ediex01.ad.cirrus.com (198.61.84.80) by ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:14:59 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id DAF4F82255C; Tue, 18 Mar 2025 17:14:59 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 11/15] ASoC: ops: Factor out common code from info callbacks Date: Tue, 18 Mar 2025 17:14:55 +0000 Message-ID: <20250318171459.3203730-12-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa18 cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=g_t_zcTVPRxTzv0K1HYA:9 X-Proofpoint-GUID: gdQKJXPDgJNaNkl9qxqWso8jZQGsWRzr X-Proofpoint-ORIG-GUID: gdQKJXPDgJNaNkl9qxqWso8jZQGsWRzr X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" snd_soc_info_volsw() and snd_soc_info_volsw_sx() do very similar things, and have a lot of code in common. Already this is causing some issues as the detection of volume controls has been fixed in the normal callback but not the sx callback. Factor out a new helper containing the common code and leave the function specific bits behind in each callback. Signed-off-by: Charles Keepax --- sound/soc/soc-ops.c | 64 ++++++++++++++++++--------------------------- 1 file changed, 26 insertions(+), 38 deletions(-) diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index d26d9e050af12..29537dd3a0633 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -168,6 +168,30 @@ static int soc_mixer_sx_mask(struct soc_mixer_control = *mc) return GENMASK(fls(mc->min + mc->max) - 2, 0); } =20 +static int soc_info_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo, + struct soc_mixer_control *mc, int max) +{ + if (mc->platform_max && mc->platform_max < max) + max =3D mc->platform_max; + + uinfo->type =3D SNDRV_CTL_ELEM_TYPE_INTEGER; + + if (max =3D=3D 1) { + /* Even two value controls ending in Volume should be integer */ + const char *vol_string =3D strstr(kcontrol->id.name, " Volume"); + + if (!vol_string || strcmp(vol_string, " Volume")) + uinfo->type =3D SNDRV_CTL_ELEM_TYPE_BOOLEAN; + } + + uinfo->count =3D snd_soc_volsw_is_stereo(mc) ? 2 : 1; + uinfo->value.integer.min =3D 0; + uinfo->value.integer.max =3D max; + + return 0; +} + /** * snd_soc_info_volsw - single mixer info callback with range. * @kcontrol: mixer control @@ -183,29 +207,8 @@ int snd_soc_info_volsw(struct snd_kcontrol *kcontrol, { struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; - const char *vol_string =3D NULL; - int max; - - max =3D uinfo->value.integer.max =3D mc->max - mc->min; - if (mc->platform_max && mc->platform_max < max) - max =3D mc->platform_max; - - if (max =3D=3D 1) { - /* Even two value controls ending in Volume should always be integer */ - vol_string =3D strstr(kcontrol->id.name, " Volume"); - if (vol_string && !strcmp(vol_string, " Volume")) - uinfo->type =3D SNDRV_CTL_ELEM_TYPE_INTEGER; - else - uinfo->type =3D SNDRV_CTL_ELEM_TYPE_BOOLEAN; - } else { - uinfo->type =3D SNDRV_CTL_ELEM_TYPE_INTEGER; - } =20 - uinfo->count =3D snd_soc_volsw_is_stereo(mc) ? 2 : 1; - uinfo->value.integer.min =3D 0; - uinfo->value.integer.max =3D max; - - return 0; + return soc_info_volsw(kcontrol, uinfo, mc, mc->max - mc->min); } EXPORT_SYMBOL_GPL(snd_soc_info_volsw); =20 @@ -227,23 +230,8 @@ int snd_soc_info_volsw_sx(struct snd_kcontrol *kcontro= l, { struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; - int max; =20 - if (mc->platform_max) - max =3D mc->platform_max; - else - max =3D mc->max; - - if (max =3D=3D 1 && !strstr(kcontrol->id.name, " Volume")) - uinfo->type =3D SNDRV_CTL_ELEM_TYPE_BOOLEAN; - else - uinfo->type =3D SNDRV_CTL_ELEM_TYPE_INTEGER; - - uinfo->count =3D snd_soc_volsw_is_stereo(mc) ? 2 : 1; - uinfo->value.integer.min =3D 0; - uinfo->value.integer.max =3D max; - - return 0; + return soc_info_volsw(kcontrol, uinfo, mc, mc->max); } EXPORT_SYMBOL_GPL(snd_soc_info_volsw_sx); =20 --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D34E211A10; Tue, 18 Mar 2025 17:15:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318114; cv=none; b=M6z0m/oIYqOMJJVQ4RQTXhjBJuihYe8J6HzB/aKXxrIwc3SEabhIhzZkY6RgroCJ7h/yBpVH89TKUPUo+af7GdC3ZxbLEpjLVDARbqWy8Fe3SgGZ3bbTEphYD9xR6bB2VKjeNzuBRsPXJvTdIghKps13flkO1tWUMPN+5kRIUr8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318114; c=relaxed/simple; bh=Pmkhjj2Xicnh4i5NnO0iqLI7LoSiEQkFrOYg2DFe42o=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=PZ8xzulnbDn1wZgDHmaHGQM2ZM9djmZSq2eP7V9fSERiaOQ9JRiskdB54olyfyH0lB4l6NgHgFfVuJI55O6Mknhxhf3sGHrI1413Rg9UI7zv0+Bh9BFN7149MukKtwVD8fyyR3wW3pxEoyhlCmhM/itRSLVC6VRju6GWp11OTXg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=f50zdKIF; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="f50zdKIF" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I1uEKJ028771; Tue, 18 Mar 2025 12:15:04 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=AetN0+S+6cO9O1t8RISK+RD9z7owu3JlBBvzrw0F5fk=; b= f50zdKIFMd9jvpq6yUy6zYlbPRK030SIzuUW8cc40y3sks0DqUyYNil5Xoy/DT6e y4tB+G2pNAkvKhlqQm6sWr+XTicjkENdqEPHlmvtMkHarMdnQcJJ0H+H3vSbqJuk O5zSZWzc1Nhty3yHqFl7Wz6cV7Fn+V9jvbp+kTjotW0NP0D5ZimOnDFnBYk0C1do Es9ImHs9/mgSOQX4bAhcfuX0xwtSwovOx8DUNEOWQD6rLV8p/paeXuX8c0khXwxK U2Q6CvTt4FcEqgPoxGACMhT+gWRjMaF1zFWp2Qz/AEQVcxNU6fDT6a8GdX9Xo0yt Z1v/xe+vEz5zmMZ6FuH6UA== Received: from ediex02.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879w-5 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:04 -0500 (CDT) Received: from ediex01.ad.cirrus.com (198.61.84.80) by ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:15:00 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:15:00 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id E971E82255D; Tue, 18 Mar 2025 17:14:59 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 12/15] ASoC: ops: Factor out common code from put callbacks Date: Tue, 18 Mar 2025 17:14:56 +0000 Message-ID: <20250318171459.3203730-13-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa18 cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=z1mHqx2g-KtElHCOn84A:9 X-Proofpoint-GUID: DHCWYW9t8Lbn5_65S8etAbiIzcbhsDcu X-Proofpoint-ORIG-GUID: DHCWYW9t8Lbn5_65S8etAbiIzcbhsDcu X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" There are only two differences between snd_soc_put_volsw() and snd_soc_put_volsw_sx(). The maximum field is handled differently, and snd_soc_put_volsw() supports double controls with both values in the same register. Factor out the common code into a new helper and pass in the appropriate max value such that it is handled correctly for each control. Signed-off-by: Charles Keepax --- sound/soc/soc-ops.c | 138 +++++++++++++++++--------------------------- 1 file changed, 53 insertions(+), 85 deletions(-) diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index 29537dd3a0633..0b62ffb2e222f 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -192,6 +192,57 @@ static int soc_info_volsw(struct snd_kcontrol *kcontro= l, return 0; } =20 +static int soc_put_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol, + struct soc_mixer_control *mc, int mask, int max) +{ + struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); + unsigned int val1, val_mask; + unsigned int val2 =3D 0; + bool double_r =3D false; + int ret; + + ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[0], max); + if (ret) + return ret; + + val1 =3D soc_mixer_ctl_to_reg(mc, ucontrol->value.integer.value[0], + mask, mc->shift, max); + val_mask =3D mask << mc->shift; + + if (snd_soc_volsw_is_stereo(mc)) { + ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[1], max); + if (ret) + return ret; + + if (mc->reg =3D=3D mc->rreg) { + val1 |=3D soc_mixer_ctl_to_reg(mc, + ucontrol->value.integer.value[1], + mask, mc->rshift, max); + val_mask |=3D mask << mc->rshift; + } else { + val2 =3D soc_mixer_ctl_to_reg(mc, + ucontrol->value.integer.value[1], + mask, mc->shift, max); + double_r =3D true; + } + } + + ret =3D snd_soc_component_update_bits(component, mc->reg, val_mask, val1); + if (ret < 0) + return ret; + + if (double_r) { + int err =3D snd_soc_component_update_bits(component, mc->rreg, + val_mask, val2); + /* Don't drop change flag */ + if (err) + return err; + } + + return ret; +} + /** * snd_soc_info_volsw - single mixer info callback with range. * @kcontrol: mixer control @@ -289,57 +340,11 @@ EXPORT_SYMBOL_GPL(snd_soc_get_volsw); int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { - struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; - unsigned int reg =3D mc->reg; - unsigned int reg2 =3D mc->rreg; - int max =3D mc->max - mc->min; unsigned int mask =3D soc_mixer_mask(mc); - int err, ret; - bool type_2r =3D false; - unsigned int val2 =3D 0; - unsigned int val, val_mask; =20 - ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[0], max); - if (ret) - return ret; - - val =3D soc_mixer_ctl_to_reg(mc, ucontrol->value.integer.value[0], - mask, mc->shift, max); - val_mask =3D mask << mc->shift; - - if (snd_soc_volsw_is_stereo(mc)) { - ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[1], max); - if (ret) - return ret; - - if (reg =3D=3D reg2) { - val |=3D soc_mixer_ctl_to_reg(mc, - ucontrol->value.integer.value[1], - mask, mc->rshift, max); - val_mask |=3D mask << mc->rshift; - } else { - val2 =3D soc_mixer_ctl_to_reg(mc, - ucontrol->value.integer.value[1], - mask, mc->shift, max); - type_2r =3D true; - } - } - err =3D snd_soc_component_update_bits(component, reg, val_mask, val); - if (err < 0) - return err; - ret =3D err; - - if (type_2r) { - err =3D snd_soc_component_update_bits(component, reg2, val_mask, - val2); - /* Don't discard any error code or drop change flag */ - if (ret =3D=3D 0 || err < 0) - ret =3D err; - } - - return ret; + return soc_put_volsw(kcontrol, ucontrol, mc, mask, mc->max - mc->min); } EXPORT_SYMBOL_GPL(snd_soc_put_volsw); =20 @@ -393,48 +398,11 @@ EXPORT_SYMBOL_GPL(snd_soc_get_volsw_sx); int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { - struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; - unsigned int reg =3D mc->reg; - unsigned int reg2 =3D mc->rreg; - unsigned int val, val_mask; unsigned int mask =3D soc_mixer_sx_mask(mc); - int err =3D 0; - int ret; - - ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[0], mc->max= ); - if (ret) - return ret; - - val =3D soc_mixer_ctl_to_reg(mc, ucontrol->value.integer.value[0], - mask, mc->shift, mc->max); - val_mask =3D mask << mc->shift; - - err =3D snd_soc_component_update_bits(component, reg, val_mask, val); - if (err < 0) - return err; - ret =3D err; =20 - if (snd_soc_volsw_is_stereo(mc)) { - ret =3D soc_mixer_valid_ctl(mc, ucontrol->value.integer.value[1], - mc->max); - if (ret) - return ret; - - val =3D soc_mixer_ctl_to_reg(mc, ucontrol->value.integer.value[1], - mask, mc->rshift, mc->max); - val_mask =3D mask << mc->rshift; - - err =3D snd_soc_component_update_bits(component, reg2, val_mask, - val); - - /* Don't discard any error code or drop change flag */ - if (ret =3D=3D 0 || err < 0) - ret =3D err; - } - - return ret; + return soc_put_volsw(kcontrol, ucontrol, mc, mask, mc->max); } EXPORT_SYMBOL_GPL(snd_soc_put_volsw_sx); =20 --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25432211A37; Tue, 18 Mar 2025 17:15:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318115; cv=none; b=ATHi7hm6ePd/eLphL62cnElUv22fg0h96KB2fG0ixtaf0IeOwmz3WQ+o5jon7qHsTWSoGKdtvbUx8TxZA6FYFe/jXs0ss0wVoF2EHGx3dMEsI/EzsW7unGX9uUGxpkszWtgwI2JUy9OeRtiFzUfYco6FUmiyw4OsVWXt2qbPhls= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318115; c=relaxed/simple; bh=s7A05pXeZW6qjS5D77eZcvHXutLgE3wqXFcIoaVdors=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=WG/AW8gAoi7yyaUgFtqc8ka7aVDoQyiGW6S0jQdsiBzhsoQ28n/7svhF5xjiFEcYU2jIZMiRoNENa9STvILot9dJkD07IXz2qhsBaT7xkbzhGPD6blvxDj46VLTgxcuYx2m/XIjQBU86wktzAIuP2x1zlMLUDaQU81LTepXPRgs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=qrSrDQfr; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="qrSrDQfr" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I5qiuJ018522; Tue, 18 Mar 2025 12:15:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=7+XdEVTlvKInvUHSEq/yhWiNUYcj7V7aVegPeRFmEaM=; b= qrSrDQfrcix3xjQ5WVQ/ALHNu9LKuP7rc1FLbFKv4+NPpbRcv4R3q21x5IdBAz4P b84fJ2uYYtMHvpW41yI2l6O6dh9F1fsIcW6bXTDT3o/XhIaUJ4jYXec7Kr+2ALK0 8SohW/YfoDTdZjyyrSKcBR4fHPT/4QG9b6LpXi4BdORwAUF2CmFwpzXhNY7KQphA w2QX9XplzOxmcKnkTXht6joI/oecscIukOoAI5me7K3DxWjMOB84dKpLACFJEKKV wvfTr4fY/VTwDwhkeyEji2qYpbJyAJNoI730fVhaZ9OVEo10Tmc6Z7W9UuWkhoCj HfG0Fs1bNfN84T2v2kEFxA== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879v-9 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:06 -0500 (CDT) Received: from ediex01.ad.cirrus.com (198.61.84.80) by ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:15:00 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:15:00 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id 0550182255E; Tue, 18 Mar 2025 17:15:00 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 13/15] ASoC: ops: Factor out common code from get callbacks Date: Tue, 18 Mar 2025 17:14:57 +0000 Message-ID: <20250318171459.3203730-14-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa1a cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=aqboHNPTfg86qbTgtD4A:9 X-Proofpoint-GUID: rLVzJuM7e8eUM-MIi7SKhxtMTRiDyycW X-Proofpoint-ORIG-GUID: rLVzJuM7e8eUM-MIi7SKhxtMTRiDyycW X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" There are only two differences between snd_soc_get_volsw() and snd_soc_get_volsw_sx(). The maximum field is handled differently, and snd_soc_get_volsw() supports double controls with both values in the same register. Factor out the common code into a new helper and pass in the appropriate max value such that it is handled correctly for each control. Signed-off-by: Charles Keepax --- sound/soc/soc-ops.c | 66 ++++++++++++++++++++------------------------- 1 file changed, 29 insertions(+), 37 deletions(-) diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index 0b62ffb2e222f..3ec3242a2b114 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -243,6 +243,33 @@ static int soc_put_volsw(struct snd_kcontrol *kcontrol, return ret; } =20 +static int soc_get_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol, + struct soc_mixer_control *mc, int mask, int max) +{ + struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); + unsigned int reg_val; + int val; + + reg_val =3D snd_soc_component_read(component, mc->reg); + val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->shift, max); + + ucontrol->value.integer.value[0] =3D val; + + if (snd_soc_volsw_is_stereo(mc)) { + if (mc->reg =3D=3D mc->rreg) { + val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->rshift, max); + } else { + reg_val =3D snd_soc_component_read(component, mc->rreg); + val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->shift, max); + } + + ucontrol->value.integer.value[1] =3D val; + } + + return 0; +} + /** * snd_soc_info_volsw - single mixer info callback with range. * @kcontrol: mixer control @@ -299,31 +326,11 @@ EXPORT_SYMBOL_GPL(snd_soc_info_volsw_sx); int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { - struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; - int max =3D mc->max - mc->min; unsigned int mask =3D soc_mixer_mask(mc); - unsigned int reg_val; - int val; =20 - reg_val =3D snd_soc_component_read(component, mc->reg); - val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->shift, max); - - ucontrol->value.integer.value[0] =3D val; - - if (snd_soc_volsw_is_stereo(mc)) { - if (mc->reg =3D=3D mc->rreg) { - val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->rshift, max); - } else { - reg_val =3D snd_soc_component_read(component, mc->rreg); - val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->shift, max); - } - - ucontrol->value.integer.value[1] =3D val; - } - - return 0; + return soc_get_volsw(kcontrol, ucontrol, mc, mask, mc->max - mc->min); } EXPORT_SYMBOL_GPL(snd_soc_get_volsw); =20 @@ -361,28 +368,13 @@ EXPORT_SYMBOL_GPL(snd_soc_put_volsw); int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { - struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; unsigned int reg =3D mc->reg; unsigned int reg2 =3D mc->rreg; unsigned int mask =3D soc_mixer_sx_mask(mc); - unsigned int reg_val; - int val; - - reg_val =3D snd_soc_component_read(component, reg); - val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->shift, mc->max); - - ucontrol->value.integer.value[0] =3D val; - - if (snd_soc_volsw_is_stereo(mc)) { - reg_val =3D snd_soc_component_read(component, reg2); - val =3D soc_mixer_reg_to_ctl(mc, reg_val, mask, mc->rshift, mc->max); =20 - ucontrol->value.integer.value[1] =3D val; - } - - return 0; + return soc_get_volsw(kcontrol, ucontrol, mc, mask, mc->max); } EXPORT_SYMBOL_GPL(snd_soc_get_volsw_sx); =20 --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D868211A3F; Tue, 18 Mar 2025 17:15:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318113; cv=none; b=SrC+gZcqrFTFc2lBMcPSY44tqsntoPMW40SHnt/oJpynpRUA42lELOA/mEPAAVdnut5L94s0wh+KYlCiZZyDr17yLerOZst2aAIIagsV9AEtuNrU8zr1Ti8mfqhrLdoOq72fvzAQ5yIKVr/2ZJhpfj88I0VoLixKDnjbj7bs8qY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318113; c=relaxed/simple; bh=VgJ8AwNutQIWAVspI7SLLIMgENcVtSwQk4xBBuBOb1I=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=LC/vRF8KHn1HPVpmNZeoN/MK4EcrdkNBgYn6jC9xa2HRqHxXR6ZeHyUemwjwF8PSXZDZ8XGRYZY4ZOahPa+MjV+fA5oigeRA9p5UQ3Xk9FN3jd9mOahrSvdTEc7NQ1tRfbgPyJf6N8fInpyMvHxczlp0TXfSIMzG1yVSxfShyLQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=QMm6iNgP; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="QMm6iNgP" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I1uEKK028771; Tue, 18 Mar 2025 12:15:04 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=N8WpsRL3swNJIYz9UBeb3WCUfW7uEPfK76yuQ0tfOfk=; b= QMm6iNgPKmTpS3JX1YczrPFKVrZLCA7UPocTt4vvtd3yjHtBeQ0PX0pxTZdnys3C iJXk+chxNHyO8LX9XPHorvdRXqkQRlmmeZaKJ4kWvQ6nobvGTDqo2F378B2ZRpGi kdrIgiIO+4lE6bdRM0oKBOo+yrujILdGl0+gJ6U5P2+zcPsH9ZNHP631D20LOPnb 5jrQzhVGi2SoYBfPk5Wju/oiBg1nBOjvvTjwOj5gLgmcbM8iA/uRp2Olag5DLIgH aMgIvJXNu+IYqP8AP6YAiH9G+dMDIURVaNcATwYf5+XUg07Jggs0uqkA7Zgv2nZN 8Gyr5S0ivOZIQDbdTUxr0g== Received: from ediex02.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879w-6 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:04 -0500 (CDT) Received: from ediex01.ad.cirrus.com (198.61.84.80) by ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:15:00 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:15:00 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id 1AC5282255A; Tue, 18 Mar 2025 17:15:00 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 14/15] ASoC: ops: Remove some unnecessary local variables Date: Tue, 18 Mar 2025 17:14:58 +0000 Message-ID: <20250318171459.3203730-15-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa18 cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=NghW8AhbQmovec1g4z4A:9 X-Proofpoint-GUID: sRHSyfO81H5H98BHwo2FfvZBW27E5ddN X-Proofpoint-ORIG-GUID: sRHSyfO81H5H98BHwo2FfvZBW27E5ddN X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" Remove some local variables that aren't adding much in terms of clarity or space saving. Signed-off-by: Charles Keepax --- sound/soc/soc-ops.c | 44 +++++++++++++++++--------------------------- 1 file changed, 17 insertions(+), 27 deletions(-) diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index 3ec3242a2b114..3ac5b3a62c812 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -370,8 +370,6 @@ int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol, { struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; - unsigned int reg =3D mc->reg; - unsigned int reg2 =3D mc->rreg; unsigned int mask =3D soc_mixer_sx_mask(mc); =20 return soc_get_volsw(kcontrol, ucontrol, mc, mask, mc->max); @@ -666,9 +664,6 @@ int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol, unsigned int regwshift =3D component->val_bytes * BITS_PER_BYTE; unsigned int regwmask =3D GENMASK(regwshift - 1, 0); unsigned long mask =3D GENMASK(mc->nbits - 1, 0); - unsigned int invert =3D mc->invert; - long min =3D mc->min; - long max =3D mc->max; long val =3D 0; unsigned int i; =20 @@ -678,10 +673,10 @@ int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol, val |=3D (regval & regwmask) << (regwshift * (regcount - i - 1)); } val &=3D mask; - if (min < 0 && val > max) + if (mc->min < 0 && val > mc->max) val |=3D ~mask; - if (invert) - val =3D max - val; + if (mc->invert) + val =3D mc->max - val; ucontrol->value.integer.value[0] =3D val; =20 return 0; @@ -713,16 +708,14 @@ int snd_soc_put_xr_sx(struct snd_kcontrol *kcontrol, unsigned int regwshift =3D component->val_bytes * BITS_PER_BYTE; unsigned int regwmask =3D GENMASK(regwshift - 1, 0); unsigned long mask =3D GENMASK(mc->nbits - 1, 0); - unsigned int invert =3D mc->invert; - long max =3D mc->max; long val =3D ucontrol->value.integer.value[0]; int ret =3D 0; unsigned int i; =20 if (val < mc->min || val > mc->max) return -EINVAL; - if (invert) - val =3D max - val; + if (mc->invert) + val =3D mc->max - val; val &=3D mask; for (i =3D 0; i < regcount; i++) { unsigned int regval =3D (val >> (regwshift * (regcount - i - 1))) & @@ -757,17 +750,16 @@ int snd_soc_get_strobe(struct snd_kcontrol *kcontrol, struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; - unsigned int reg =3D mc->reg; - unsigned int shift =3D mc->shift; - unsigned int mask =3D BIT(shift); unsigned int invert =3D mc->invert !=3D 0; + unsigned int mask =3D BIT(mc->shift); unsigned int val; =20 - val =3D snd_soc_component_read(component, reg); + val =3D snd_soc_component_read(component, mc->reg); val &=3D mask; =20 - if (shift !=3D 0 && val !=3D 0) - val =3D val >> shift; + if (mc->shift !=3D 0 && val !=3D 0) + val =3D val >> mc->shift; + ucontrol->value.enumerated.item[0] =3D val ^ invert; =20 return 0; @@ -790,19 +782,17 @@ int snd_soc_put_strobe(struct snd_kcontrol *kcontrol, struct snd_soc_component *component =3D snd_kcontrol_chip(kcontrol); struct soc_mixer_control *mc =3D (struct soc_mixer_control *)kcontrol->private_value; - unsigned int reg =3D mc->reg; - unsigned int shift =3D mc->shift; - unsigned int mask =3D BIT(shift); - unsigned int invert =3D mc->invert !=3D 0; unsigned int strobe =3D ucontrol->value.enumerated.item[0] !=3D 0; + unsigned int invert =3D mc->invert !=3D 0; + unsigned int mask =3D BIT(mc->shift); unsigned int val1 =3D (strobe ^ invert) ? mask : 0; unsigned int val2 =3D (strobe ^ invert) ? 0 : mask; - int err; + int ret; =20 - err =3D snd_soc_component_update_bits(component, reg, mask, val1); - if (err < 0) - return err; + ret =3D snd_soc_component_update_bits(component, mc->reg, mask, val1); + if (ret < 0) + return ret; =20 - return snd_soc_component_update_bits(component, reg, mask, val2); + return snd_soc_component_update_bits(component, mc->reg, mask, val2); } EXPORT_SYMBOL_GPL(snd_soc_put_strobe); --=20 2.39.5 From nobody Sun Feb 8 13:41:53 2026 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B6710212D97; Tue, 18 Mar 2025 17:15:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.152.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318114; cv=none; b=D1n16yc5axst1PA3lHP4zMT/afSAgJ/R0WJLojqtTnESoYlNIL53KvpVt4fIJgH0/iGGQY45Clpu+k5i4uTdf3+ogUGWuHXf7zoq9RjJiZhV8V+ePCEqIY+Y2riVWOKanbRADaopSwlNKhBchFyakH4qAy0rTHqLJyQ+StGRYsg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742318114; c=relaxed/simple; bh=gBvREq43h+d8ri5lUrPjWbsYpqwaS5jKBWCTUI+kpYQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=LKZB79g+boPpcMO+pth9v3Hex+WcUo11MhwqSsDc2cGnERXuDUpRKwEQ2ylH8j8pqUytON3nDnUHKnJutlokZXhmvzt+J9zPxnZUQcXW++p907c5MYhYkluZ4KqRA9QNsyC7WalZ2QZgnTSLWpGVX5RcGHHcb9Z2HOg7UPLcVyA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=q7LAeVht; arc=none smtp.client-ip=67.231.152.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="q7LAeVht" Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52I5qiuK018522; Tue, 18 Mar 2025 12:15:07 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s= PODMain02222019; bh=vZLoj8BzCsEIfXnkHhWeN6v3RfZwA+6OiHbRsVlD5Vc=; b= q7LAeVhtMLkVrDB21D/AhMEq74XEqsAVCDClawGceQYQ5cggOtH2v2niBKh+TSOx O6sAXAw3DVffl+cExgfjPLO/X8Z0O4iz5SXuq24HST+woO11Qu9B3/jgyXD6z/Is 8rN+YvsCQ7hN2/Zk7JU0d6Wot3CNbXG1nJfk1TGoxBFi/Q2iDviy6X0tMxGqIvq4 nhnDyI4l/a/N3zk0RGV/B5XRl3RO6zVmCADjfxLqIUR3A5hx/xOaFu1Jd4P2yXIX 0i4wN0PtEFXxVj8HLZyreHtcuR2U3BHbfYUcHeQXuy7yTc3m8fhjc7oFUBRz+NQS gZy+49q/agByOvACNKJqfw== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 45d5yh879v-10 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Mar 2025 12:15:06 -0500 (CDT) Received: from ediex02.ad.cirrus.com (198.61.84.81) by ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 18 Mar 2025 17:15:00 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by anon-ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Tue, 18 Mar 2025 17:15:00 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id 2A44A82255C; Tue, 18 Mar 2025 17:15:00 +0000 (UTC) From: Charles Keepax To: CC: , , , , , , Subject: [PATCH 15/15] ASoC: ops: Apply platform_max after deciding control type Date: Tue, 18 Mar 2025 17:14:59 +0000 Message-ID: <20250318171459.3203730-16-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> References: <20250318171459.3203730-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=GrhC+l1C c=1 sm=1 tr=0 ts=67d9aa1a cx=c_pps a=uGhh+3tQvKmCLpEUO+DX4w==:117 a=uGhh+3tQvKmCLpEUO+DX4w==:17 a=Vs1iUdzkB0EA:10 a=w1d2syhTAAAA:8 a=NfW0dt3s_OP-V94RNuMA:9 X-Proofpoint-GUID: zcGncDXP9cSo4uVzoVyUvyEi1kB9HDBT X-Proofpoint-ORIG-GUID: zcGncDXP9cSo4uVzoVyUvyEi1kB9HDBT X-Proofpoint-Spam-Reason: safe Content-Type: text/plain; charset="utf-8" It doesn't really make sense for the type of a control to change based on the platform_max field. platform_max allows a specific system to limit values of a control for safety but it seems reasonable the control type should remain the same between different systems, even if it is restricted down to just two values. Move the application of platform_max to after control type determination in soc_info_volsw(). Signed-off-by: Charles Keepax --- sound/soc/soc-ops.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index 3ac5b3a62c812..8d4dd11c9aef1 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -172,9 +172,6 @@ static int soc_info_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo, struct soc_mixer_control *mc, int max) { - if (mc->platform_max && mc->platform_max < max) - max =3D mc->platform_max; - uinfo->type =3D SNDRV_CTL_ELEM_TYPE_INTEGER; =20 if (max =3D=3D 1) { @@ -185,6 +182,9 @@ static int soc_info_volsw(struct snd_kcontrol *kcontrol, uinfo->type =3D SNDRV_CTL_ELEM_TYPE_BOOLEAN; } =20 + if (mc->platform_max && mc->platform_max < max) + max =3D mc->platform_max; + uinfo->count =3D snd_soc_volsw_is_stereo(mc) ? 2 : 1; uinfo->value.integer.min =3D 0; uinfo->value.integer.max =3D max; --=20 2.39.5