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[84.248.220.251]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-549ba865024sm1387506e87.123.2025.03.17.11.54.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 11:54:05 -0700 (PDT) From: Abdiel Janulgue To: rust-for-linux@vger.kernel.org, daniel.almeida@collabora.com, dakr@kernel.org, robin.murphy@arm.com, aliceryhl@google.com Cc: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Trevor Gross , Valentin Obst , linux-kernel@vger.kernel.org (open list), Christoph Hellwig , Marek Szyprowski , airlied@redhat.com, iommu@lists.linux.dev (open list:DMA MAPPING HELPERS), Abdiel Janulgue Subject: [PATCH v15 01/11] rust: error: Add EOVERFLOW Date: Mon, 17 Mar 2025 20:52:08 +0200 Message-ID: <20250317185345.2608976-2-abdiel.janulgue@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> References: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Trivial addition for missing EOVERFLOW error. This is used by a subsequent patch that might require returning EOVERFLOW as a result of `checked_mul`. Reviewed-by: Alice Ryhl Reviewed-by: Andreas Hindborg Signed-off-by: Abdiel Janulgue Acked-by: Danilo Krummrich --- rust/kernel/error.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/rust/kernel/error.rs b/rust/kernel/error.rs index 376f6a6ae5e3..30014d507ed3 100644 --- a/rust/kernel/error.rs +++ b/rust/kernel/error.rs @@ -64,6 +64,7 @@ macro_rules! declare_err { declare_err!(EPIPE, "Broken pipe."); declare_err!(EDOM, "Math argument out of domain of func."); declare_err!(ERANGE, "Math result not representable."); + declare_err!(EOVERFLOW, "Value too large for defined data type."); declare_err!(ERESTARTSYS, "Restart the system call."); declare_err!(ERESTARTNOINTR, "System call was interrupted by a signal = and will be restarted."); declare_err!(ERESTARTNOHAND, "Restart if no handler."); --=20 2.43.0 From nobody Wed Dec 17 12:05:31 2025 Received: from mail-lj1-f180.google.com (mail-lj1-f180.google.com [209.85.208.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 453271E834A; Mon, 17 Mar 2025 18:54:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237653; cv=none; b=CB9RNijpHzb8O2B6HG1esXW7QWBL9r2Y0hK3Cjh0udQPOykSeeIU0souDYFCyapDV9dJn1+dfwCVPIdPre30t2FQaSHhO2FzMNmhxR1rZlBnj1Tbbc+hxDdmMyLRK0FF1e7oMDT5PHFJ0+FPQUEY5CTJh6TXEleURqFoR+Uf0rM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237653; c=relaxed/simple; bh=oGOFIMrjfL+4XU5dP1wcQjBFQeScz806Bd7Lj3UJZ+g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CyZBG0PcJF7/s39a/PBlvgt2hRAlmCR8UpkjRT4hJFKCXtVwD98wBGByWet9agwTtvfoIGxDewIXz8z1n7lSg1kJp20CtRnK/KPTKY6jV+7lbedBybVKabbpuN696X0nQs9HA2x0kI0WSoCyRNeWGNCtIIYM3WXlZv1vfK3g70Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=b2MlAGM7; arc=none smtp.client-ip=209.85.208.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="b2MlAGM7" Received: by mail-lj1-f180.google.com with SMTP id 38308e7fff4ca-30bfb6ab47cso47204461fa.3; Mon, 17 Mar 2025 11:54:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1742237649; x=1742842449; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DM0eQ1obKbtILGTTnzK/VCxxqxPjEtxURVU4+ANPojg=; b=b2MlAGM7mivBOwVAGAfObwUUAqT1tlliM+dBA6Qcn907g/MRYzxA1njPyv4UGQ4AHd EGvzJnW2UeVXgJU1hdHMqa1WHbSm42aqsUGc0j51F/sfMFv99eKyra+a1SuKObu1rd0q CY60fc6KAypYIhKVmv5tpyW2emVSayHukydT4Ds1lppxjXj78Ow6ZKN94vl5KTVUXdv5 QTgRb2QgvkwygsEdMUA7YopzmjNvEgyavHpSJGreMD0RDg1obNBpUy0hcxC6RBpVgwie dahp1OgmkXdMyJCFBAnSnyxKIGb/G3mEqFSf0WFQRGWvzeBd9n0NwEBe8U9bl+Rs5jtD Y2GQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742237649; x=1742842449; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DM0eQ1obKbtILGTTnzK/VCxxqxPjEtxURVU4+ANPojg=; b=tr1Q2Nd7/LmxDGbVha8K7KMNeqpB/w6xdBculjUbvXDe/u1hevxNTtjNkYtNH1ir3H g7RJNUN6w0togqny3F9VZYTj8TVDn365ETMrmN3k2Hh+9H4UBxyZgsb6c6oK8xRgWWuQ zuQqzfJXkSdm9J+pgbV/SunEwZhYlG6509jeXzyfZcdC+9lr8VetSMJ6FGtL/RQ9reTP DSl3IdlYPIyxzlf4EhYP7wWi7M8nLYTVUHNZgxvZ0defeWZIKDDeam/AuLuuF135XmBo V+UZog/dG6fjYxkpAQf3tDmk3K9iwQADjqeqIYSTKX0n9nSM2112MHTcKvbu8MpW2WTx wLtw== X-Forwarded-Encrypted: i=1; AJvYcCXZ756LqePM7BFO0GCXA5QXiEgewI2zdEVxveppZvmekxRb/Qx8VFc8spMGopEydzoQvLkln9GfEGV2ZOo=@vger.kernel.org X-Gm-Message-State: AOJu0YyirW9uyf+bdMycPX5AfD+3kC07/4Td97H/1LXk3B5bUHptBiYy nDK/bu7+ba8nkjsrLtdXgjnNrmiRXAf9JdsOGzuDvOjurph6Y6QcRNFRFQ== X-Gm-Gg: ASbGncvSwti147ywoKn+lYf2PckiQHkT7TAl0OaPWk+JSDYV5DafC/E6QwLG5zdY3i7 uj2DTK2mVV28xQd/IFFpVGn4TW9rLZdby1nksRXNT7r8qlr6K8EgrE7DbojWi0LxZzMU62i6noV V2Wqf/T/iCxSnaeE5OT9Xa5eC9S/KRUU2mp+Fn9u/Xlv3G9vRXypci3nDOwl1h8ryu2HwGBWS2I 8abOFI6fvRIvD7CE2Cwgc1EH0WdSCBW74i+sLgMw3ERw9tw0WyrRcKv8iNz+rf1ErtLXRDAAwin mMNfm5Dgh7oWCWNVH2keC5dAncQ9QfDL/pUqRm1pHJcRUKpjUX6/co1O10ljddCNTZZ6Zqqdvsg siQvCdlt3NVKBk5oAZgMvEw== X-Google-Smtp-Source: AGHT+IFnnedBdplgL64PWBV49Hy+Jry/u8OoNeqEanEXgzNG/BKD9z4voKdW4Uvd0DjiuRK/61Cf8Q== X-Received: by 2002:a05:6512:3e14:b0:545:8c5:44cb with SMTP id 2adb3069b0e04-549c3921986mr8810314e87.31.1742237649071; Mon, 17 Mar 2025 11:54:09 -0700 (PDT) Received: from abj-NUC9VXQNX.. (dsl-hkibng22-54f8dc-251.dhcp.inet.fi. [84.248.220.251]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-549ba865024sm1387506e87.123.2025.03.17.11.54.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 11:54:07 -0700 (PDT) From: Abdiel Janulgue To: rust-for-linux@vger.kernel.org, daniel.almeida@collabora.com, dakr@kernel.org, robin.murphy@arm.com, aliceryhl@google.com Cc: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Trevor Gross , Valentin Obst , linux-kernel@vger.kernel.org (open list), Christoph Hellwig , Marek Szyprowski , airlied@redhat.com, iommu@lists.linux.dev (open list:DMA MAPPING HELPERS), Abdiel Janulgue Subject: [PATCH v15 02/11] rust: add dma coherent allocator abstraction. Date: Mon, 17 Mar 2025 20:52:09 +0200 Message-ID: <20250317185345.2608976-3-abdiel.janulgue@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> References: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a simple dma coherent allocator rust abstraction. Based on Andreas Hindborg's dma abstractions from the rnvme driver, which was also based on earlier work by Wedson Almeida Filho. Reviewed-by: Alice Ryhl Signed-off-by: Abdiel Janulgue Acked-by: Danilo Krummrich --- rust/bindings/bindings_helper.h | 1 + rust/kernel/dma.rs | 387 ++++++++++++++++++++++++++++++++ rust/kernel/lib.rs | 1 + 3 files changed, 389 insertions(+) create mode 100644 rust/kernel/dma.rs diff --git a/rust/bindings/bindings_helper.h b/rust/bindings/bindings_helpe= r.h index ae39fc18a8bf..ccb988340df6 100644 --- a/rust/bindings/bindings_helper.h +++ b/rust/bindings/bindings_helper.h @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs new file mode 100644 index 000000000000..9d00f9c49f47 --- /dev/null +++ b/rust/kernel/dma.rs @@ -0,0 +1,387 @@ +// SPDX-License-Identifier: GPL-2.0 + +//! Direct memory access (DMA). +//! +//! C header: [`include/linux/dma-mapping.h`](srctree/include/linux/dma-ma= pping.h) + +use crate::{ + bindings, build_assert, + device::Device, + error::code::*, + error::Result, + transmute::{AsBytes, FromBytes}, + types::ARef, +}; + +/// Possible attributes associated with a DMA mapping. +/// +/// They can be combined with the operators `|`, `&`, and `!`. +/// +/// Values can be used from the [`attrs`] module. +/// +/// # Examples +/// +/// ``` +/// use kernel::device::Device; +/// use kernel::dma::{attrs::*, CoherentAllocation}; +/// +/// # fn test(dev: &Device) -> Result { +/// let attribs =3D DMA_ATTR_FORCE_CONTIGUOUS | DMA_ATTR_NO_WARN; +/// let c: CoherentAllocation =3D +/// CoherentAllocation::alloc_attrs(dev, 4, GFP_KERNEL, attribs)?; +/// # Ok::<(), Error>(()) } +/// ``` +#[derive(Clone, Copy, PartialEq)] +#[repr(transparent)] +pub struct Attrs(u32); + +impl Attrs { + /// Get the raw representation of this attribute. + pub(crate) fn as_raw(self) -> crate::ffi::c_ulong { + self.0 as _ + } + + /// Check whether `flags` is contained in `self`. + pub fn contains(self, flags: Attrs) -> bool { + (self & flags) =3D=3D flags + } +} + +impl core::ops::BitOr for Attrs { + type Output =3D Self; + fn bitor(self, rhs: Self) -> Self::Output { + Self(self.0 | rhs.0) + } +} + +impl core::ops::BitAnd for Attrs { + type Output =3D Self; + fn bitand(self, rhs: Self) -> Self::Output { + Self(self.0 & rhs.0) + } +} + +impl core::ops::Not for Attrs { + type Output =3D Self; + fn not(self) -> Self::Output { + Self(!self.0) + } +} + +/// DMA mapping attributes. +pub mod attrs { + use super::Attrs; + + /// Specifies that reads and writes to the mapping may be weakly order= ed, that is that reads + /// and writes may pass each other. + pub const DMA_ATTR_WEAK_ORDERING: Attrs =3D Attrs(bindings::DMA_ATTR_W= EAK_ORDERING); + + /// Specifies that writes to the mapping may be buffered to improve pe= rformance. + pub const DMA_ATTR_WRITE_COMBINE: Attrs =3D Attrs(bindings::DMA_ATTR_W= RITE_COMBINE); + + /// Lets the platform to avoid creating a kernel virtual mapping for t= he allocated buffer. + pub const DMA_ATTR_NO_KERNEL_MAPPING: Attrs =3D Attrs(bindings::DMA_AT= TR_NO_KERNEL_MAPPING); + + /// Allows platform code to skip synchronization of the CPU cache for = the given buffer assuming + /// that it has been already transferred to 'device' domain. + pub const DMA_ATTR_SKIP_CPU_SYNC: Attrs =3D Attrs(bindings::DMA_ATTR_S= KIP_CPU_SYNC); + + /// Forces contiguous allocation of the buffer in physical memory. + pub const DMA_ATTR_FORCE_CONTIGUOUS: Attrs =3D Attrs(bindings::DMA_ATT= R_FORCE_CONTIGUOUS); + + /// This is a hint to the DMA-mapping subsystem that it's probably not= worth the time to try + /// to allocate memory to in a way that gives better TLB efficiency. + pub const DMA_ATTR_ALLOC_SINGLE_PAGES: Attrs =3D Attrs(bindings::DMA_A= TTR_ALLOC_SINGLE_PAGES); + + /// This tells the DMA-mapping subsystem to suppress allocation failur= e reports (similarly to + /// __GFP_NOWARN). + pub const DMA_ATTR_NO_WARN: Attrs =3D Attrs(bindings::DMA_ATTR_NO_WARN= ); + + /// Used to indicate that the buffer is fully accessible at an elevate= d privilege level (and + /// ideally inaccessible or at least read-only at lesser-privileged le= vels). + pub const DMA_ATTR_PRIVILEGED: Attrs =3D Attrs(bindings::DMA_ATTR_PRIV= ILEGED); +} + +/// An abstraction of the `dma_alloc_coherent` API. +/// +/// This is an abstraction around the `dma_alloc_coherent` API which is us= ed to allocate and map +/// large consistent DMA regions. +/// +/// A [`CoherentAllocation`] instance contains a pointer to the allocated = region (in the +/// processor's virtual address space) and the device address which can be= given to the device +/// as the DMA address base of the region. The region is released once [`C= oherentAllocation`] +/// is dropped. +/// +/// # Invariants +/// +/// For the lifetime of an instance of [`CoherentAllocation`], the `cpu_ad= dr` is a valid pointer +/// to an allocated region of consistent memory and `dma_handle` is the DM= A address base of +/// the region. +// TODO +// +// DMA allocations potentially carry device resources (e.g.IOMMU mappings)= , hence for soundness +// reasons DMA allocation would need to be embedded in a `Devres` containe= r, in order to ensure +// that device resources can never survive device unbind. +// +// However, it is neither desirable nor necessary to protect the allocated= memory of the DMA +// allocation from surviving device unbind; it would require RCU read side= critical sections to +// access the memory, which may require subsequent unnecessary copies. +// +// Hence, find a way to revoke the device resources of a `CoherentAllocati= on`, but not the +// entire `CoherentAllocation` including the allocated memory itself. +pub struct CoherentAllocation { + dev: ARef, + dma_handle: bindings::dma_addr_t, + count: usize, + cpu_addr: *mut T, + dma_attrs: Attrs, +} + +impl CoherentAllocation { + /// Allocates a region of `size_of:: * count` of consistent memory. + /// + /// # Examples + /// + /// ``` + /// use kernel::device::Device; + /// use kernel::dma::{attrs::*, CoherentAllocation}; + /// + /// # fn test(dev: &Device) -> Result { + /// let c: CoherentAllocation =3D + /// CoherentAllocation::alloc_attrs(dev, 4, GFP_KERNEL, DMA_ATTR_N= O_WARN)?; + /// # Ok::<(), Error>(()) } + /// ``` + pub fn alloc_attrs( + dev: &Device, + count: usize, + gfp_flags: kernel::alloc::Flags, + dma_attrs: Attrs, + ) -> Result> { + build_assert!( + core::mem::size_of::() > 0, + "It doesn't make sense for the allocated type to be a ZST" + ); + + let size =3D count + .checked_mul(core::mem::size_of::()) + .ok_or(EOVERFLOW)?; + let mut dma_handle =3D 0; + // SAFETY: Device pointer is guaranteed as valid by the type invar= iant on `Device`. + let ret =3D unsafe { + bindings::dma_alloc_attrs( + dev.as_raw(), + size, + &mut dma_handle, + gfp_flags.as_raw(), + dma_attrs.as_raw(), + ) + }; + if ret.is_null() { + return Err(ENOMEM); + } + // INVARIANT: We just successfully allocated a coherent region whi= ch is accessible for + // `count` elements, hence the cpu address is valid. We also hold = a refcounted reference + // to the device. + Ok(Self { + dev: dev.into(), + dma_handle, + count, + cpu_addr: ret as *mut T, + dma_attrs, + }) + } + + /// Performs the same functionality as [`CoherentAllocation::alloc_att= rs`], except the + /// `dma_attrs` is 0 by default. + pub fn alloc_coherent( + dev: &Device, + count: usize, + gfp_flags: kernel::alloc::Flags, + ) -> Result> { + CoherentAllocation::alloc_attrs(dev, count, gfp_flags, Attrs(0)) + } + + /// Returns the base address to the allocated region in the CPU's virt= ual address space. + pub fn start_ptr(&self) -> *const T { + self.cpu_addr + } + + /// Returns the base address to the allocated region in the CPU's virt= ual address space as + /// a mutable pointer. + pub fn start_ptr_mut(&mut self) -> *mut T { + self.cpu_addr + } + + /// Returns a DMA handle which may given to the device as the DMA addr= ess base of + /// the region. + pub fn dma_handle(&self) -> bindings::dma_addr_t { + self.dma_handle + } + + /// Returns a pointer to an element from the region with bounds checki= ng. `offset` is in + /// units of `T`, not the number of bytes. + /// + /// Public but hidden since it should only be used from [`dma_read`] a= nd [`dma_write`] macros. + #[doc(hidden)] + pub fn item_from_index(&self, offset: usize) -> Result<*mut T> { + if offset >=3D self.count { + return Err(EINVAL); + } + // SAFETY: + // - The pointer is valid due to type invariant on `CoherentAlloca= tion` + // and we've just checked that the range and index is within bound= s. + // - `offset` can't overflow since it is smaller than `self.count`= and we've checked + // that `self.count` won't overflow early in the constructor. + Ok(unsafe { self.cpu_addr.add(offset) }) + } + + /// Reads the value of `field` and ensures that its type is [`FromByte= s`]. + /// + /// # Safety + /// + /// This must be called from the [`dma_read`] macro which ensures that= the `field` pointer is + /// validated beforehand. + /// + /// Public but hidden since it should only be used from [`dma_read`] m= acro. + #[doc(hidden)] + pub unsafe fn field_read(&self, field: *const F) -> F { + // SAFETY: + // - By the safety requirements field is valid. + // - Using read_volatile() here is not sound as per the usual rule= s, the usage here is + // a special exception with the following notes in place. When dea= ling with a potential + // race from a hardware or code outside kernel (e.g. user-space pr= ogram), we need that + // read on a valid memory is not UB. Currently read_volatile() is = used for this, and the + // rationale behind is that it should generate the same code as RE= AD_ONCE() which the + // kernel already relies on to avoid UB on data races. Note that t= he usage of + // read_volatile() is limited to this particular case, it cannot b= e used to prevent + // the UB caused by racing between two kernel functions nor do the= y provide atomicity. + unsafe { field.read_volatile() } + } + + /// Writes a value to `field` and ensures that its type is [`AsBytes`]. + /// + /// # Safety + /// + /// This must be called from the [`dma_write`] macro which ensures tha= t the `field` pointer is + /// validated beforehand. + /// + /// Public but hidden since it should only be used from [`dma_write`] = macro. + #[doc(hidden)] + pub unsafe fn field_write(&self, field: *mut F, val: F) { + // SAFETY: + // - By the safety requirements field is valid. + // - Using write_volatile() here is not sound as per the usual rul= es, the usage here is + // a special exception with the following notes in place. When dea= ling with a potential + // race from a hardware or code outside kernel (e.g. user-space pr= ogram), we need that + // write on a valid memory is not UB. Currently write_volatile() i= s used for this, and the + // rationale behind is that it should generate the same code as WR= ITE_ONCE() which the + // kernel already relies on to avoid UB on data races. Note that t= he usage of + // write_volatile() is limited to this particular case, it cannot = be used to prevent + // the UB caused by racing between two kernel functions nor do the= y provide atomicity. + unsafe { field.write_volatile(val) } + } +} + +/// Note that the device configured to do DMA must be halted before this o= bject is dropped. +impl Drop for CoherentAllocation { + fn drop(&mut self) { + let size =3D self.count * core::mem::size_of::(); + // SAFETY: Device pointer is guaranteed as valid by the type invar= iant on `Device`. + // The cpu address, and the dma handle are valid due to the type i= nvariants on + // `CoherentAllocation`. + unsafe { + bindings::dma_free_attrs( + self.dev.as_raw(), + size, + self.cpu_addr as _, + self.dma_handle, + self.dma_attrs.as_raw(), + ) + } + } +} + +/// Reads a field of an item from an allocated region of structs. +/// +/// # Examples +/// +/// ``` +/// use kernel::device::Device; +/// use kernel::dma::{attrs::*, CoherentAllocation}; +/// +/// struct MyStruct { field: u32, } +/// +/// // SAFETY: All bit patterns are acceptable values for `MyStruct`. +/// unsafe impl kernel::transmute::FromBytes for MyStruct{}; +/// // SAFETY: Instances of `MyStruct` have no uninitialized portions. +/// unsafe impl kernel::transmute::AsBytes for MyStruct{}; +/// +/// # fn test(alloc: &kernel::dma::CoherentAllocation) -> Result= { +/// let whole =3D kernel::dma_read!(alloc[2]); +/// let field =3D kernel::dma_read!(alloc[1].field); +/// # Ok::<(), Error>(()) } +/// ``` +#[macro_export] +macro_rules! dma_read { + ($dma:expr, $idx: expr, $($field:tt)*) =3D> {{ + let item =3D $crate::dma::CoherentAllocation::item_from_index(&$dm= a, $idx)?; + // SAFETY: `item_from_index` ensures that `item` is always a valid= pointer and can be + // dereferenced. The compiler also further validates the expressio= n on whether `field` + // is a member of `item` when expanded by the macro. + unsafe { + let ptr_field =3D ::core::ptr::addr_of!((*item) $($field)*); + $crate::dma::CoherentAllocation::field_read(&$dma, ptr_field) + } + }}; + ($dma:ident [ $idx:expr ] $($field:tt)* ) =3D> { + $crate::dma_read!($dma, $idx, $($field)*); + }; + ($($dma:ident).* [ $idx:expr ] $($field:tt)* ) =3D> { + $crate::dma_read!($($dma).*, $idx, $($field)*); + }; +} + +/// Writes to a field of an item from an allocated region of structs. +/// +/// # Examples +/// +/// ``` +/// use kernel::device::Device; +/// use kernel::dma::{attrs::*, CoherentAllocation}; +/// +/// struct MyStruct { member: u32, } +/// +/// // SAFETY: All bit patterns are acceptable values for `MyStruct`. +/// unsafe impl kernel::transmute::FromBytes for MyStruct{}; +/// // SAFETY: Instances of `MyStruct` have no uninitialized portions. +/// unsafe impl kernel::transmute::AsBytes for MyStruct{}; +/// +/// # fn test(alloc: &kernel::dma::CoherentAllocation) -> Result= { +/// kernel::dma_write!(alloc[2].member =3D 0xf); +/// kernel::dma_write!(alloc[1] =3D MyStruct { member: 0xf }); +/// # Ok::<(), Error>(()) } +/// ``` +#[macro_export] +macro_rules! dma_write { + ($dma:ident [ $idx:expr ] $($field:tt)*) =3D> {{ + $crate::dma_write!($dma, $idx, $($field)*); + }}; + ($($dma:ident).* [ $idx:expr ] $($field:tt)* ) =3D> {{ + $crate::dma_write!($($dma).*, $idx, $($field)*); + }}; + ($dma:expr, $idx: expr, =3D $val:expr) =3D> { + let item =3D $crate::dma::CoherentAllocation::item_from_index(&$dm= a, $idx)?; + // SAFETY: `item_from_index` ensures that `item` is always a valid= item. + unsafe { $crate::dma::CoherentAllocation::field_write(&$dma, item,= $val) } + }; + ($dma:expr, $idx: expr, $(.$field:ident)* =3D $val:expr) =3D> { + let item =3D $crate::dma::CoherentAllocation::item_from_index(&$dm= a, $idx)?; + // SAFETY: `item_from_index` ensures that `item` is always a valid= pointer and can be + // dereferenced. The compiler also further validates the expressio= n on whether `field` + // is a member of `item` when expanded by the macro. + unsafe { + let ptr_field =3D ::core::ptr::addr_of_mut!((*item) $(.$field)= *); + $crate::dma::CoherentAllocation::field_write(&$dma, ptr_field,= $val) + } + }; +} diff --git a/rust/kernel/lib.rs b/rust/kernel/lib.rs index c92497c7c655..001374a96d66 100644 --- a/rust/kernel/lib.rs +++ b/rust/kernel/lib.rs @@ -44,6 +44,7 @@ pub mod device; pub mod device_id; pub mod devres; +pub mod dma; pub mod driver; pub mod error; pub mod faux; --=20 2.43.0 From nobody Wed Dec 17 12:05:31 2025 Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 34A741EDA10; Mon, 17 Mar 2025 18:54:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237655; cv=none; b=Wz3xfW7Ha4olYYgPVwivqI/ceDrrgtn1WAHRhZU/ntQ1UsNvVbl0gwIwEvgpHeJVIHSAHeyX5GEDehD0GzZPznJnOpCkjGPW7wKBB7hd7XhHnlFOBWWzirY/JB2h+eYpzaw4snpxpXX7TLw+cTtCDjVGU8+sHsk/6PoeUieuX04= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237655; c=relaxed/simple; bh=NPurUptvYolnP+zwLTc8xyODM40c1STXAevHbBUYyUM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hKFvyl78du2rZLsHo3KD0YavBd4ACXhDcTc4I4aEO+jKb1mTLXO8zay6wa1hOWyMGEEk1e29vKjW47l4M9mo1wtwyI48TTb9Emo3JlLnxCtAHv65sFCLj2syHOPIDIjCX5mq6MOZP5CDQOq1ofOMJPKddGXHt6qvJPCRiJGkDBw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=BDpX0bI1; arc=none smtp.client-ip=209.85.167.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="BDpX0bI1" Received: by mail-lf1-f54.google.com with SMTP id 2adb3069b0e04-54996d30bfbso4340860e87.2; Mon, 17 Mar 2025 11:54:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1742237651; x=1742842451; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HY0a+7Bd76kNssAI216pzAYL/YAAvUS9w1O5DEvCouw=; b=BDpX0bI1rBX+NOnvM9N+P8mrF4K5wXtW/Hr1USsCrrCjDl2XU5QmDHhE+gM/FDhsdj Wg5Zw4kG4UNO8wgC01Xz5ozqAd7/ayLtN2AsCSw5qNNqJQfPsCQnMDscTH0u1bOj98x6 SD5SEGmPIC5RSN1EecSS/PC5HtEmPZ/yTfHdzl+ySY8UUXYvGuu7me5ykQy8O8sclAEt cv4v3x2IL7/jsMo98FyUv4NaKDT8nygVAj+a29Sd+KngyGvWSAFt7vUe/VYeVKQuIu9m ophBjqMZ7kPTeRHE12SM9XVL/VEcHGSvwN7lGTrDXhs0X0UhRQwdKORc0NLT4wsZqOwr 1ujQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742237651; x=1742842451; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HY0a+7Bd76kNssAI216pzAYL/YAAvUS9w1O5DEvCouw=; b=rwa++baIOibR4k4W3qTbTQWC4TuVprWAXuFdWolShT69u30S328ezYsY2IvnYFtqsJ 18ysaOrUTAKNN76DfLzpzCCwEzdXoLZEmYre4UYWtMqAnWsEvsCzrNxlnwDxENW2A7Cc /xd6sto9WAhCObzGfZHP+/kVGQQIKAYEwidL+4GFO21f7GkVXzrTeJ9L/tgWx9oTF/Cu wFSDk0s9pVNpmavQGq4kQ9oq4yxw6C2fUOx80wjk5HUz0vQLu7h1sYhpnDHJlGF5xAbS nGg9Z5fxB0wiaqXDmeZ8mCztMjlijvb7NA7QthMD975v+b/lMeZ1yw3+gWQCbBBkFfik mlxA== X-Forwarded-Encrypted: i=1; AJvYcCXOa+wZLS1HbGoim7LnMizP+nsZcEOwEpyxztMP6HhpqOeMtL6Zn4HBuRtWct2acPwKe5VX26Eg3iUhI7s=@vger.kernel.org X-Gm-Message-State: AOJu0Yw7RPd+HG6HiLkiwU4gSeH+jDCl5zXEp5N3+q3lcueGBOgR72Mx Y6beW1CurKDBdcVEgTv/82XJ3tTlOYCWaKbBsYJWqTyB2iH5cb2LPR/J1w== X-Gm-Gg: ASbGncsD+WQgy+PGA8z8ieIcW9/Qs45JH8l+cINsK0exUnxEt8A+r2X/+XXgxhW27g2 hemb1ejEPUx4+F4Z4fw7Pe1xNs0K8q55O/XfBFAcclKn/iTBaoa1c0ZJgT7AKGWQr2Kn4eA5Y9R WqCSvVXfKQnM9wh1l5f7okhuG2WCr6dh2EcdUQjLgGvPTOAqeGnEAeGNp7+yLrl+fXBuoVpqPNt Hfv2LX/RsL9zrreD2Jy80Fce6vNMlpM6zFwzhv2mN9AvzaM42iS66aiGB6XSrhFZiM0tQZXh/7T 1mCKMp/0p+pQr/oyTpu/EQKB8w5BkDNZ64FC/uS3FDyroAUCY0g6gX2iBResqWWdN1n2Yq3lfJb o4Ml1eskGTk1uhDP5b0YUU1zqzDQCrDZt X-Google-Smtp-Source: AGHT+IEoHmWqOEUAbFn1XAQ9ghX1d5uNsCm0ipDw6XJoieye2FBFqVI/P9sH7ueMp48dHZ+dyTCaAA== X-Received: by 2002:a05:6512:6c7:b0:549:b0f3:439c with SMTP id 2adb3069b0e04-549c39122d7mr7333101e87.21.1742237651131; Mon, 17 Mar 2025 11:54:11 -0700 (PDT) Received: from abj-NUC9VXQNX.. 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[84.248.220.251]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-549ba865024sm1387506e87.123.2025.03.17.11.54.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 11:54:10 -0700 (PDT) From: Abdiel Janulgue To: rust-for-linux@vger.kernel.org, daniel.almeida@collabora.com, dakr@kernel.org, robin.murphy@arm.com, aliceryhl@google.com Cc: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Trevor Gross , Valentin Obst , linux-kernel@vger.kernel.org (open list), Christoph Hellwig , Marek Szyprowski , airlied@redhat.com, iommu@lists.linux.dev (open list:DMA MAPPING HELPERS), Abdiel Janulgue Subject: [PATCH v15 03/11] samples: rust: add Rust dma test sample driver Date: Mon, 17 Mar 2025 20:52:10 +0200 Message-ID: <20250317185345.2608976-4-abdiel.janulgue@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> References: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a simple driver to excercise the basics of the Rust DMA coherent allocator bindings. Suggested-by: Danilo Krummrich Signed-off-by: Abdiel Janulgue Acked-by: Danilo Krummrich --- samples/rust/Kconfig | 11 +++++ samples/rust/Makefile | 1 + samples/rust/rust_dma.rs | 97 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 109 insertions(+) create mode 100644 samples/rust/rust_dma.rs diff --git a/samples/rust/Kconfig b/samples/rust/Kconfig index 3b6eae84b297..e2d14aa6beec 100644 --- a/samples/rust/Kconfig +++ b/samples/rust/Kconfig @@ -78,4 +78,15 @@ config SAMPLE_RUST_HOSTPROGS =20 If unsure, say N. =20 +config SAMPLE_RUST_DRIVER_DMA + tristate "DMA Test Driver" + depends on PCI + help + This option builds the Rust dma test driver sample. + + To compile this as a module, choose M here: + the module will be called dma. + + If unsure, say N. + endif # SAMPLES_RUST diff --git a/samples/rust/Makefile b/samples/rust/Makefile index 0dbc6d90f1ef..1a9aff6e8d6a 100644 --- a/samples/rust/Makefile +++ b/samples/rust/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_SAMPLE_RUST_PRINT) +=3D rust_print.o obj-$(CONFIG_SAMPLE_RUST_DRIVER_PCI) +=3D rust_driver_pci.o obj-$(CONFIG_SAMPLE_RUST_DRIVER_PLATFORM) +=3D rust_driver_platform.o obj-$(CONFIG_SAMPLE_RUST_DRIVER_FAUX) +=3D rust_driver_faux.o +obj-$(CONFIG_SAMPLE_RUST_DRIVER_DMA) +=3D rust_dma.o =20 rust_print-y :=3D rust_print_main.o rust_print_events.o =20 diff --git a/samples/rust/rust_dma.rs b/samples/rust/rust_dma.rs new file mode 100644 index 000000000000..1740140faba6 --- /dev/null +++ b/samples/rust/rust_dma.rs @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0 + +//! Rust DMA api test (based on QEMU's `pci-testdev`). +//! +//! To make this driver probe, QEMU must be run with `-device pci-testdev`. + +use kernel::{bindings, dma::CoherentAllocation, pci, prelude::*}; + +struct DmaSampleDriver { + pdev: pci::Device, + ca: CoherentAllocation, +} + +const TEST_VALUES: [(u32, u32); 5] =3D [ + (0xa, 0xb), + (0xc, 0xd), + (0xe, 0xf), + (0xab, 0xba), + (0xcd, 0xef), +]; + +struct MyStruct { + h: u32, + b: u32, +} + +impl MyStruct { + fn new(h: u32, b: u32) -> Self { + Self { h, b } + } +} +// SAFETY: All bit patterns are acceptable values for `MyStruct`. +unsafe impl kernel::transmute::AsBytes for MyStruct {} +// SAFETY: Instances of `MyStruct` have no uninitialized portions. +unsafe impl kernel::transmute::FromBytes for MyStruct {} + +kernel::pci_device_table!( + PCI_TABLE, + MODULE_PCI_TABLE, + ::IdInfo, + [( + pci::DeviceId::from_id(bindings::PCI_VENDOR_ID_REDHAT, 0x5), + () + )] +); + +impl pci::Driver for DmaSampleDriver { + type IdInfo =3D (); + const ID_TABLE: pci::IdTable =3D &PCI_TABLE; + + fn probe(pdev: &mut pci::Device, _info: &Self::IdInfo) -> Result>> { + dev_info!(pdev.as_ref(), "Probe DMA test driver.\n"); + + let ca: CoherentAllocation =3D + CoherentAllocation::alloc_coherent(pdev.as_ref(), TEST_VALUES.= len(), GFP_KERNEL)?; + + || -> Result { + for (i, value) in TEST_VALUES.into_iter().enumerate() { + kernel::dma_write!(ca[i] =3D MyStruct::new(value.0, value.= 1)); + } + + Ok(()) + }()?; + + let drvdata =3D KBox::new( + Self { + pdev: pdev.clone(), + ca, + }, + GFP_KERNEL, + )?; + + Ok(drvdata.into()) + } +} + +impl Drop for DmaSampleDriver { + fn drop(&mut self) { + dev_info!(self.pdev.as_ref(), "Unload DMA test driver.\n"); + + let _ =3D || -> Result { + for (i, value) in TEST_VALUES.into_iter().enumerate() { + assert_eq!(kernel::dma_read!(self.ca[i].h), value.0); + assert_eq!(kernel::dma_read!(self.ca[i].b), value.1); + } + Ok(()) + }(); + } +} + +kernel::module_pci_driver! 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[84.248.220.251]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-549ba865024sm1387506e87.123.2025.03.17.11.54.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 11:54:11 -0700 (PDT) From: Abdiel Janulgue To: rust-for-linux@vger.kernel.org, daniel.almeida@collabora.com, dakr@kernel.org, robin.murphy@arm.com, aliceryhl@google.com Cc: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Trevor Gross , Valentin Obst , linux-kernel@vger.kernel.org (open list), Christoph Hellwig , Marek Szyprowski , airlied@redhat.com, iommu@lists.linux.dev (open list:DMA MAPPING HELPERS), Abdiel Janulgue Subject: [PATCH v15 04/11] MAINTAINERS: add entry for Rust dma mapping helpers device driver API Date: Mon, 17 Mar 2025 20:52:11 +0200 Message-ID: <20250317185345.2608976-5-abdiel.janulgue@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> References: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add an entry for the Rust dma mapping helpers abstractions. Nacked-by: Christoph Hellwig Acked-by: Danilo Krummrich Acked-by: Andreas Hindborg Acked-by: Marek Szyprowski Signed-off-by: Abdiel Janulgue --- MAINTAINERS | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 72b88f1638a2..4c0786336826 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6902,6 +6902,19 @@ F: include/linux/dma-mapping.h F: include/linux/swiotlb.h F: kernel/dma/ =20 +DMA MAPPING HELPERS DEVICE DRIVER API [RUST] +M: Abdiel Janulgue +M: Danilo Krummrich +R: Daniel Almeida +R: Robin Murphy +R: Andreas Hindborg +L: rust-for-linux@vger.kernel.org +S: Supported +W: https://rust-for-linux.com +T: git https://github.com/Rust-for-Linux/linux.git alloc-next +F: rust/kernel/dma.rs +F: samples/rust/rust_dma.rs + DMA-BUF HEAPS FRAMEWORK M: Sumit Semwal R: Benjamin Gaignard --=20 2.43.0 From nobody Wed Dec 17 12:05:31 2025 Received: from mail-lf1-f51.google.com (mail-lf1-f51.google.com [209.85.167.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A13C1F582C; Mon, 17 Mar 2025 18:54:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237657; cv=none; b=pnpElYLOY91O3ylbfwKguHT0oV65gyoAr59AyDJKAfrsNlRzlF03IM1PSqZrQiZ7rnjVeiiJJ5eJPyiD5Si4OJ2SWbC+5KIrJmG1SIKgsS1bdcLtc39OLctqdVmUv5SDqiYkgwY5MxNqBw+8YwKRvyUw9Xo8dKY/oQISqUWylzQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237657; c=relaxed/simple; bh=O6iH5uaB2vnuCo3stdhQI+RIzmVOwagXzOMXjOYTBuI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BY7HgO3zzb6gGhnG5Qp/UdnFkMant8OKBcRiSec0GwGXK7h8RmDKLus8CywstamyryBNhrQI2mBOLGtprWArTSSR2CNcF/GLx1sCU4kBlOAnvX2/TUuJLRvW85KvxMcAUdsfhhhf2PqYo1qR9rnUPlW3mtMFvqHTzZmNqkYXQIs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=N6fOMIbV; arc=none smtp.client-ip=209.85.167.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="N6fOMIbV" Received: by mail-lf1-f51.google.com with SMTP id 2adb3069b0e04-5499c5d9691so5189125e87.2; Mon, 17 Mar 2025 11:54:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1742237654; x=1742842454; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jQtPQvh7AOfNGyyJYgAlzNOC+RTx4D234UEnDx6A0Kg=; b=N6fOMIbVpsfSQQyJ3HcmHUGZh15vBv/HyKM7ysoW24IrF5zHhkBWIRX8y9vdxLKhY/ 1a9NHWSave1rE2jSfn2azne1DK/eaX8nuO1fQvw8/bquwyrs2fxGLjixEYJCA2zWqVVB MlL7LQ3qzCDgXavF4yOzDn0X04pqDOIqPagijfK93fqa1weIGlmGNgiK7Jp42JkfmmvQ ywlzpMj/5LGb2PQ4N87sXZll1LRMxjyYDIlaZ0OP78e6HtmdR+Ecrlw3LgONVCcmwm0e K+5Dnc/GuR/eQUJFY6Q2IIVW2eWjF8G1/ZjmTyfk71xlwj6qkB4JM6Ix9t2MDJisHiTW gSMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742237654; x=1742842454; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jQtPQvh7AOfNGyyJYgAlzNOC+RTx4D234UEnDx6A0Kg=; b=WDTSPAGGjLrc13Kiknm5FVRnjk2tS+GTThkQIV1qhVvtwf/CgxiWoFyfDU4+QcY80H YLTF3b+xwE/uZ2G4MXQ4rR9wW9GJgh6CbZlM69dfE2KJKVJK9xGiKFJk+iYerRCjRajp 1JWGx11Ur4pHeF/fbT6CIGDgjNzl/tZErvg/UkP3Fh8WjejIAixryNfvnrq9S1AjX8KH zYXTwl/7iJf3vbehkKg5VIPeIkZW9JJjVWYC3OZqCwADqlA0tbcjDq4Io0g0NMtRCudz Wrt7Ssk9uQ5/gJjMpFSSnBSO5u6Ji8vSkzGiFBTz7it++utXkTZQxCzOhgr6XxO8yqvG mGAw== X-Forwarded-Encrypted: i=1; AJvYcCWckLWf9m/vbheLNuGTnDZ04jIZi1fvIjcOMBO14MxH9flPVGI9A8E9t8yKFdEtPFqCgriyRDrTLV8rkhU=@vger.kernel.org X-Gm-Message-State: AOJu0Ywm4gqEH5Z43WhRwwMntqIz4BJrLovwvcV4Dz0pioPTfAp1yjMQ bAQKJx1i09IRsbSHdO8p9+114VRJ0S063B7Cf7xK0HqtrV9lPlrjoUGHkQ== X-Gm-Gg: ASbGncsLXkmiV62XcsBUzuRnoyV8Kg1h1UDg/w8gWt7iCbnppDR8dRqfFPmq/9GirTn CPUk2o0QuvYxp6QILPU76qvAiU+zFje2DCFSI/p0veU7BCFt8MvEwZfNmm4CN3aCR7u7VUYxkhZ 92csDxtNpcSE9S75TKzIIzEYby+SB56pv6ZGpsk3imlZh5KHAmg4UWY+6/yfaB/XhLv1A+yoTnS 8kHaScDOsupGEHR5qymSnaZoY5UVXWDL0WfULxdGM/RA764VFExcy7KueP5LIs5t4vMawJRLmFw 99bYKWXnd4VTEfWrSbB5J++cfqLiaCg9tR/R1L60nSpzqlCuZlm4DAFVJAEm2tPhpwopqXOX4Ki JPuyp/hh878WwVbNnOqMceg== X-Google-Smtp-Source: AGHT+IGT6zkWZzSsnWuUG/nW7dwX9DryRKc+ef3WR8hQSZbEMG3129wtNF8We2swDm+RCLx4OFZ36g== X-Received: by 2002:a05:6512:acb:b0:545:2950:5360 with SMTP id 2adb3069b0e04-549c38f5ee2mr7499944e87.22.1742237654055; Mon, 17 Mar 2025 11:54:14 -0700 (PDT) Received: from abj-NUC9VXQNX.. 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[84.248.220.251]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-549ba865024sm1387506e87.123.2025.03.17.11.54.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 11:54:12 -0700 (PDT) From: Abdiel Janulgue To: rust-for-linux@vger.kernel.org, daniel.almeida@collabora.com, dakr@kernel.org, robin.murphy@arm.com, aliceryhl@google.com Cc: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Trevor Gross , Valentin Obst , linux-kernel@vger.kernel.org (open list), Christoph Hellwig , Marek Szyprowski , airlied@redhat.com, iommu@lists.linux.dev (open list:DMA MAPPING HELPERS), Abdiel Janulgue Subject: [PATCH v15 05/11] rust: dma: implement `dma::Device` trait Date: Mon, 17 Mar 2025 20:52:12 +0200 Message-ID: <20250317185345.2608976-6-abdiel.janulgue@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> References: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Danilo Krummrich Add a trait that defines the DMA specific methods of devices. The `dma::Device` trait should be implemented by (bus) device representations, where the underlying bus potentially supports DMA, such as `pci::Device` or `platform::Device`. Signed-off-by: Danilo Krummrich Signed-off-by: Abdiel Janulgue Acked-by: Danilo Krummrich --- rust/kernel/dma.rs | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs index 9d00f9c49f47..834d00c1347e 100644 --- a/rust/kernel/dma.rs +++ b/rust/kernel/dma.rs @@ -6,13 +6,20 @@ =20 use crate::{ bindings, build_assert, - device::Device, + device, error::code::*, error::Result, transmute::{AsBytes, FromBytes}, types::ARef, }; =20 +/// Trait to be implemented by bus specific devices. +/// +/// The [`Device`] trait should be implemented by bus specific device repr= esentations, where the +/// underlying bus has potential support for DMA, such as [`crate::pci::De= vice`] or +/// [crate::platform::Device]. +pub trait Device: AsRef {} + /// Possible attributes associated with a DMA mapping. /// /// They can be combined with the operators `|`, `&`, and `!`. @@ -130,7 +137,7 @@ pub mod attrs { // Hence, find a way to revoke the device resources of a `CoherentAllocati= on`, but not the // entire `CoherentAllocation` including the allocated memory itself. pub struct CoherentAllocation { - dev: ARef, + dev: ARef, dma_handle: bindings::dma_addr_t, count: usize, cpu_addr: *mut T, @@ -152,7 +159,7 @@ impl CoherentAllocation { /// # Ok::<(), Error>(()) } /// ``` pub fn alloc_attrs( - dev: &Device, + dev: &device::Device, count: usize, gfp_flags: kernel::alloc::Flags, dma_attrs: Attrs, @@ -194,7 +201,7 @@ pub fn alloc_attrs( /// Performs the same functionality as [`CoherentAllocation::alloc_att= rs`], except the /// `dma_attrs` is 0 by default. pub fn alloc_coherent( - dev: &Device, + dev: &device::Device, count: usize, gfp_flags: kernel::alloc::Flags, ) -> Result> { --=20 2.43.0 From nobody Wed Dec 17 12:05:31 2025 Received: from mail-lf1-f42.google.com (mail-lf1-f42.google.com [209.85.167.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 41D9C1FA85A; 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[84.248.220.251]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-549ba865024sm1387506e87.123.2025.03.17.11.54.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 11:54:14 -0700 (PDT) From: Abdiel Janulgue To: rust-for-linux@vger.kernel.org, daniel.almeida@collabora.com, dakr@kernel.org, robin.murphy@arm.com, aliceryhl@google.com Cc: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Trevor Gross , Valentin Obst , linux-kernel@vger.kernel.org (open list), Christoph Hellwig , Marek Szyprowski , airlied@redhat.com, iommu@lists.linux.dev (open list:DMA MAPPING HELPERS), Abdiel Janulgue Subject: [PATCH v15 06/11] rust: dma: add dma addressing capabilities Date: Mon, 17 Mar 2025 20:52:13 +0200 Message-ID: <20250317185345.2608976-7-abdiel.janulgue@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> References: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Danilo Krummrich Implement `dma_set_mask()` and `dma_set_mask_and_coherent()` in the `dma::Device` trait. Those methods are used to inform the kernel about the device's DMA addressing capabilities. Co-developed-by: Abdiel Janulgue Signed-off-by: Abdiel Janulgue Signed-off-by: Danilo Krummrich Acked-by: Danilo Krummrich --- rust/helpers/dma.c | 8 ++++++++ rust/helpers/helpers.c | 1 + rust/kernel/dma.rs | 46 +++++++++++++++++++++++++++++++++++++++--- 3 files changed, 52 insertions(+), 3 deletions(-) create mode 100644 rust/helpers/dma.c diff --git a/rust/helpers/dma.c b/rust/helpers/dma.c new file mode 100644 index 000000000000..8eb482386f93 --- /dev/null +++ b/rust/helpers/dma.c @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +int rust_helper_dma_set_mask_and_coherent(struct device *dev, u64 mask) +{ + return dma_set_mask_and_coherent(dev, mask); +} diff --git a/rust/helpers/helpers.c b/rust/helpers/helpers.c index 0640b7e115be..8f3808c8b7fe 100644 --- a/rust/helpers/helpers.c +++ b/rust/helpers/helpers.c @@ -13,6 +13,7 @@ #include "build_bug.c" #include "cred.c" #include "device.c" +#include "dma.c" #include "err.c" #include "fs.c" #include "io.c" diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs index 834d00c1347e..fc66f1764c31 100644 --- a/rust/kernel/dma.rs +++ b/rust/kernel/dma.rs @@ -5,10 +5,10 @@ //! C header: [`include/linux/dma-mapping.h`](srctree/include/linux/dma-ma= pping.h) =20 use crate::{ - bindings, build_assert, - device, + bindings, build_assert, device, error::code::*, error::Result, + prelude::*, transmute::{AsBytes, FromBytes}, types::ARef, }; @@ -18,7 +18,35 @@ /// The [`Device`] trait should be implemented by bus specific device repr= esentations, where the /// underlying bus has potential support for DMA, such as [`crate::pci::De= vice`] or /// [crate::platform::Device]. -pub trait Device: AsRef {} +pub trait Device: AsRef { + /// Inform the kernel about the device's DMA addressing capabilities. + /// + /// Set both the DMA mask and the coherent DMA mask to the same value. + /// + /// Note that we don't check the return value from the C `dma_set_cohe= rent_mask` as the DMA API + /// guarantees that the coherent DMA mask can be set to the same or sm= aller than the streaming + /// DMA mask. + fn dma_set_mask_and_coherent(&mut self, mask: u64) -> Result { + // SAFETY: By the type invariant of `device::Device`, `self.as_ref= ().as_raw()` is valid. + let ret =3D unsafe { bindings::dma_set_mask_and_coherent(self.as_r= ef().as_raw(), mask) }; + if ret !=3D 0 { + Err(Error::from_errno(ret)) + } else { + Ok(()) + } + } + + /// Same as [`Self::dma_set_mask_and_coherent`], but set the mask only= for streaming mappings. + fn dma_set_mask(&mut self, mask: u64) -> Result { + // SAFETY: By the type invariant of `device::Device`, `self.as_ref= ().as_raw()` is valid. + let ret =3D unsafe { bindings::dma_set_mask(self.as_ref().as_raw()= , mask) }; + if ret !=3D 0 { + Err(Error::from_errno(ret)) + } else { + Ok(()) + } + } +} =20 /// Possible attributes associated with a DMA mapping. /// @@ -392,3 +420,15 @@ macro_rules! dma_write { } }; } + +/// Helper function to set the bit mask for DMA addressing. +pub const fn dma_bit_mask(n: usize) -> u64 { + if n > 64 { + return 0; + } + if n =3D=3D 64 { + !0 + } else { + (1 << (n)) - 1 + } +} --=20 2.43.0 From nobody Wed Dec 17 12:05:31 2025 Received: from mail-lf1-f44.google.com (mail-lf1-f44.google.com [209.85.167.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1556E1FECBA; Mon, 17 Mar 2025 18:54:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237661; cv=none; b=D3+yavpWTlIPqbFtGJYpsXjwD8eIbAXyYkEa70UjJ9n051xsj+5YT2K5KXmjo8juFmimpRVofLVwdMfgFwdhpd1p/u6tzpRz5mM7uirQ+pySbMCm+DiTR85eRJp8Qn4fLSi8lWurIiT7UTg5r5iwr55aSyWu46ZXxAFVwHIiTRo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237661; c=relaxed/simple; bh=VyefDGWH0N2YpL9VfzECx+ApcLuk3v2hDwgQ1bV/Fl0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pq7v0+73HJdyEqG1Uh7QK+2371lBOiZN8cWfJOIncyyunfPVvxj2FEHag7z/SXxR2aG1RcWr3rlhfa5BODidt4xxvAravHWFeYUONQ1cBBzTwTBNkGeWIAIPapRQFTnGmXshDfLI0UGNg9NMAFZUJPRY8QqOxBQWaHx3r4gd/bg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Nv06Lm5x; arc=none smtp.client-ip=209.85.167.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Nv06Lm5x" Received: by mail-lf1-f44.google.com with SMTP id 2adb3069b0e04-5499b18d704so4799138e87.0; Mon, 17 Mar 2025 11:54:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1742237658; x=1742842458; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9RE7FkHXPj3rgd/JOL9Q773Ys4uYomt6iSafrtUCPEA=; b=Nv06Lm5xFaL6pQi9y00Kn2sYUHw4dO+b/g//JqO+R7TMQuWr9uEEAKTohmIhXagxpb 6XCIWoc9k2SLfku5AGGo22Ns6w1Klg3QNa1Fk9kcGjlC7eXZ4CQkX7BgQML7TF3MniCf WJ9XP+YC6r9BiG2KoEChvRXgAQK1sFWNE9QbhAXxuahiCxows1B9cQRbRWOkH1tO4J5W CZseVMDjyv1UqlhIyQVSKXxrYPnx4Ow2TlA1oAESxjJAbRUPx74PoFK3pSKyDe/WEMxj lo9vUDQxXJHc24yQy+Mw8IWE/C/FsNCBh0or+BmQVyiMWvWAuMIU653UvS6UjffTXjn9 2LYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742237658; x=1742842458; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9RE7FkHXPj3rgd/JOL9Q773Ys4uYomt6iSafrtUCPEA=; b=ihvd8P5FUD3ncxg5hvueoR5Ot1+Lz5DrpRtyuxAfBuEKfbqG5vrR7ponlNDxjgeAbO jX/yjv999UAA5jlgWaA/3qXTs1b45bLdTohMW4RgKJOWjwgG3xRJ6K4VCRq9JxTyAgZ2 dssihjYC/VwclVSq2XtjiHXY/KInLyc0cDZ8UDoxnEk8fpm8rvgn7Y7l42nEsVyePNdQ jo78D+CYIoZ71FZz7G3w3muLbJoVrTYGd3iAmbqBhTGz74SGJsaNWiajHzz/v/xChY2D HWNtQX+GJms1acx9Th8WUtXTd+gUZ0wFFMJdShCXXKpKzo6tinTHYeG13ahba1ZeIwMK RDmA== X-Forwarded-Encrypted: i=1; AJvYcCX6VbNb2nQH6Teb0tnvIlefha/ublxdmc/xMCeyGk1HfKeFtLzfOuzHUSrLTAFaspC8qc972hVoFjwlJLU=@vger.kernel.org X-Gm-Message-State: AOJu0YxopYX4KZSQRWlo5ipLw3Veo+ufRa6looVKXmqU3zsdCEPTCNAz QCdCwINzt3ai8qiYwdJFVx3idKFu6N77wjn19s6sb+UArAvKvBGVMYfjpQ== X-Gm-Gg: ASbGnct2TUF44fUEeisfX7vRfme8hziMXhTqUICzFtowCokXQtpsFlcpYSBDE9b5DN0 G2Qe8Ey3ZoM+sWngrQCC+KhYFmJgXndSIkqgudSLiYI4YZyLQ5sJVQ7DWITk19wmsZjwoXeUfJy Ns5+m8kWetH/4CCUYB1DbYdgTVJ0I2bpBinEOY8XSMIjFOWWpo/Bvz7v8cPATQvkYqnQdlLUTy5 wH7pAgcb2aVJPZeZI3ic00c6AyG04ZsWtRLqIzkSkYRCr2LJqBOgYeG+Xc34RghG/XogkqcGxzj HZvzKC8gAN9kfHX5oS+pzlY01GdD8978DPC8xgVW83BAAqXdokpPLgxEUpkZ/Y4O4tKmvmMnxCa bn/bZF0xV0imyAoTMs1PE0g== X-Google-Smtp-Source: AGHT+IH+KOAMpDUgs9VZDCOMT81BZbgFevjKeE27whY+TdKHMJL0Bf3RFF+AR/1gnrWgGKy1uUv9Lg== X-Received: by 2002:a05:6512:3ba4:b0:545:22ec:8b6b with SMTP id 2adb3069b0e04-549c39907ccmr8171472e87.35.1742237658184; Mon, 17 Mar 2025 11:54:18 -0700 (PDT) Received: from abj-NUC9VXQNX.. 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[84.248.220.251]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-549ba865024sm1387506e87.123.2025.03.17.11.54.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 11:54:16 -0700 (PDT) From: Abdiel Janulgue To: rust-for-linux@vger.kernel.org, daniel.almeida@collabora.com, dakr@kernel.org, robin.murphy@arm.com, aliceryhl@google.com Cc: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Trevor Gross , Valentin Obst , linux-kernel@vger.kernel.org (open list), Christoph Hellwig , Marek Szyprowski , airlied@redhat.com, iommu@lists.linux.dev (open list:DMA MAPPING HELPERS), Abdiel Janulgue Subject: [PATCH v15 07/11] rust: pci: implement the `dma::Device` trait Date: Mon, 17 Mar 2025 20:52:14 +0200 Message-ID: <20250317185345.2608976-8-abdiel.janulgue@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> References: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Danilo Krummrich The PCI bus is potentially capable of performing DMA, hence implement the `dma:Device` trait for `pci::Device`. Signed-off-by: Danilo Krummrich Signed-off-by: Abdiel Janulgue Acked-by: Danilo Krummrich --- rust/kernel/pci.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs index f7b2743828ae..5839aa5d4098 100644 --- a/rust/kernel/pci.rs +++ b/rust/kernel/pci.rs @@ -432,3 +432,5 @@ fn as_ref(&self) -> &device::Device { &self.0 } } + +impl crate::dma::Device for Device {} --=20 2.43.0 From nobody Wed Dec 17 12:05:31 2025 Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56398200B9B; Mon, 17 Mar 2025 18:54:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237663; cv=none; b=TGWIkzKKYp2jvYBym281PpvFAwWONDSER2AK94UumoEJx48Jk1S3mzbqUzTW6NJilOt5s32WVHUErA1NncnIpuroHRmfK2z0CuXonQS4Ui0STly4h2InT/jiKz/aq/DO8BNjypbR8rUZq7M/Mv6Hc3ak2r92bPmXvx61M42uQ4Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237663; c=relaxed/simple; bh=DhrwcCKAPl4wQYbKHYYSepNVPu31+4xtNNYqjdxy+Ig=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pBa7DsiKzTRks/1VALoRV9yHHe59zUB2xjfG8V3Ndzkf57REfMbgUqRV+zL+5SnbJlVvqJyjDbd8YRtpKCte3zPOwhaG4c3aUvwXGfVAjilhq9zkXjiC7P9Gd8Y8paSyOShTXDBwpGofaSeWaEzVOrQQalH9HWVjQ6LWT2+wSPo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=jjASMqQ6; arc=none smtp.client-ip=209.85.167.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="jjASMqQ6" Received: by mail-lf1-f54.google.com with SMTP id 2adb3069b0e04-549b116321aso5300742e87.3; Mon, 17 Mar 2025 11:54:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1742237659; x=1742842459; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bITllDD7zuDX+leMoEvJ9eOhvzTi6bzqiRqTzF92s50=; b=jjASMqQ6HhzJOnIu6h5dPYVXvA2db9ezNIZo4YCLIUyt1eMF68gBHvahj4BDW7iTeC Yu2D3VDIjZ+pq6tB2soLOkg3U8Wl3wVX8P/oHFAGs9Mv8/8LSI6YtdXQ76RKI/fud7he xCpyVNHP7s9OiGjuzO9HnZ0KeqQmOWuIKHRC/ru4Ke06z/qUVanVC0C05X5+/OelN/6H 4Fpv2W6/XGc/WY1LfGp9VG+6l9syYTkgCeg1/BwuJjoN+qrtYSu5N/peaH7TyNCc7KNc f+cNOnJFnqEjND7ANzLAcCEgQLRPzqzjTLOsBxRrzluOplyx1rmataZyksZGaTsj4fl3 nz0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742237659; x=1742842459; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bITllDD7zuDX+leMoEvJ9eOhvzTi6bzqiRqTzF92s50=; b=U+VuCH4cyalEQbMVqt1fD7nf4h0OkbmpZdqsFE6eC4tZi6jIeZQ5wIbfV5se3caClM EpHcgexeP+mC7GFz+ZLXk3dzmoUNnXiNOMVU0WbdFDVnC0Nyq64Ta92FtwlxGqG3I+hQ x7gvUuhb/rSFxW/VAtAQJz9xjYxf1+eeHe0MWnzMIx3EXGS68eQ9tDPAE+Yvqpm8pFxi 7EUq0v0FR1knv1UbNMKQ5aLE3HolWV2gxLvv6fm4u/aKGKUID/sw7Z/dGaZkmG0z/rcK 7/vSMmi8xxzPMJ8FNNNMFsrTGtOt7re9nWZGBCXK2ydhUx86stZougVgqFIutIuTFAGZ u+vQ== X-Forwarded-Encrypted: i=1; AJvYcCUhCJI56wvhD5QL6ZtK3I8dJV1FD1zhjBuEbltoN0KvxfRBHFDL2jm3i+i3lFxxuofrskxafocamEaD1b4=@vger.kernel.org X-Gm-Message-State: AOJu0YwwqQPxUNV0F939gxNu6A4u5jV1I9rf1+e1l8ffDW3fD8tllekD h6bncnL6KkjEob7V6JediK1wpnCzusqjGS215+UePqoWTpu/WGPkg9LV5A== X-Gm-Gg: ASbGncsOZoayCSb3dnfzziMV6wSaJy1Lonq/YB0vvFWk624w0Ae6D3RlHGJ1utgz0My zmLi5VIfh0+2VgEo1RcOKdFSpq/8hqjWFPq5bKKBKo0K+8BL8n8ZGNmmkjhLizgIm320OnViJfe FZfgzBxfYkj1e9HlKYtVqIEPsWsxkOLoMDceAq9yU8mqaqb/XcgjRqIBlY8R7VkeVfXinMw9TTB PPgw89zLDU03ua1d3jeVLcwkV2HQQ4L38G3xQd3HsEbhx+0b+Pzlhi/C0Bc3Xn2fmXoj/eL9cxQ hHRVdkKZ9eFtzxuDgKzLFyz01WfGZ7lKTegX5NpiRWKbnVbIPmBx52k7HuZC4uUewsVxo53PBD3 A+YA0/aaym1xwT51Zjll+Pg== X-Google-Smtp-Source: AGHT+IFbyIHdySxokOsAc7slyf+TNhJ4gkPo4Mto9tNnD3n0AVBHi4ObetvBIzaq8zw+2DhtUo3BVA== X-Received: by 2002:a05:6512:1247:b0:545:ae6:d73f with SMTP id 2adb3069b0e04-549c394fb49mr7047143e87.46.1742237659278; Mon, 17 Mar 2025 11:54:19 -0700 (PDT) Received: from abj-NUC9VXQNX.. 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[84.248.220.251]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-549ba865024sm1387506e87.123.2025.03.17.11.54.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 11:54:18 -0700 (PDT) From: Abdiel Janulgue To: rust-for-linux@vger.kernel.org, daniel.almeida@collabora.com, dakr@kernel.org, robin.murphy@arm.com, aliceryhl@google.com Cc: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Trevor Gross , Valentin Obst , linux-kernel@vger.kernel.org (open list), Christoph Hellwig , Marek Szyprowski , airlied@redhat.com, iommu@lists.linux.dev (open list:DMA MAPPING HELPERS), Abdiel Janulgue Subject: [PATCH v15 08/11] rust: platform: implement the `dma::Device` trait Date: Mon, 17 Mar 2025 20:52:15 +0200 Message-ID: <20250317185345.2608976-9-abdiel.janulgue@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> References: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Danilo Krummrich The platform bus is potentially capable of performing DMA, hence implement the `dma:Device` trait for `platform::Device`. Signed-off-by: Danilo Krummrich Signed-off-by: Abdiel Janulgue Acked-by: Danilo Krummrich --- rust/kernel/platform.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/rust/kernel/platform.rs b/rust/kernel/platform.rs index 1297f5292ba9..a7bf3525313e 100644 --- a/rust/kernel/platform.rs +++ b/rust/kernel/platform.rs @@ -198,3 +198,5 @@ fn as_ref(&self) -> &device::Device { &self.0 } } + +impl crate::dma::Device for Device {} --=20 2.43.0 From nobody Wed Dec 17 12:05:31 2025 Received: from mail-lf1-f52.google.com (mail-lf1-f52.google.com [209.85.167.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B4EA2036F5; Mon, 17 Mar 2025 18:54:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237665; cv=none; b=WNdRa97GyS+aoVbXTubDQXeC6sF6G35SFqhdVt+aylr/MBDvVMC8zejgEGBxkdbNhvLyBPbc9mLCuYeDNxeP3CLwsrQxZzmNXD4+1sZwjYJtGemfdRudQty8nv9ZCuKzp0tApoou+D1ni7pnguSALndRmn3wEMdQtsQIQakc8Z8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237665; c=relaxed/simple; bh=AFXc+JDAFlfaLW6k8nRKqG1H7IeQzzuskvkR8ls2d24=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tllymchJfFQZh75pAO9QxRpUvRSuvpssnf4cG+O/hm3RNkTlcgW56e4KS0WG6Tt7ZJEm66R9Q/TULgAk58iFEVWNOn/hVpNLoMFhiEcNNLR+jagCOcot0UDXxB+QWHbzbMXV50npCWdbgPTJwHMYntubPJzkgpTwZYr/Sqi45i0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=AjWeU1Vr; arc=none smtp.client-ip=209.85.167.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="AjWeU1Vr" Received: by mail-lf1-f52.google.com with SMTP id 2adb3069b0e04-54963160818so5865899e87.2; Mon, 17 Mar 2025 11:54:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1742237661; x=1742842461; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=thgHd6wCi9ljuTgZv1q/rgFzzZU0rxSovW0BQEj3yDA=; b=AjWeU1VrT3H9vemNxtxJ457OLPT7HSmvNYGzhAoFH9/Or9pFaliLpCHp+KKUJ0nYWt nrWrBccA6GVkJQMGJKzm+iDA5dkhWotw57YBq1/0pxtWzyndOXOoM/luGN+5BlZk1bBj 8w2hCRIh0BIR7Kw7qQ48d2W6PiQv8lWq/Cl01K3GCVjY35mhqNPe7X90pgfk/DteMtFv oucodC/ipPbl7YDLi846RETT6fpXmKcRBlCIeyaAmT/Ipn3eLwqpQv5TUK4hvJd64TNH nz0kkibCZBziIU0H0o6d+WmMpDbXm9ufeJPPds8UoYvFTrCpJgWdTYDBjbd8lpXEm3ch DPDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742237661; x=1742842461; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=thgHd6wCi9ljuTgZv1q/rgFzzZU0rxSovW0BQEj3yDA=; b=qN0sFdg1vrqRr+mcWrRIEAvcGZ2WMseigeirq70b69ayBMq3hEI36MyqietP2MS0il LBFJasa1DxBeZaOJ0R3s+D7Zggl0fc1Vinukj/ckWFR3x8PKEo6fAtxne7Ix+wZrNeAz azvdbVo0JpZMnAP+pUYd1pLZwhcxgwEqWrTBN3h3sPeAmalQHzu0ZH2TKiC/0tYe4bhp Dt2uOciggAGsG1Za4oIZyic3mHZKiGH56Er/MwU+w6ZEQgkZiV9bvK68Y1DgTGJZk1u0 btRQBkoDMz+ORgVD6S5pGZa3xdka/LfPRmLmjXfU1LBs0cNAxMxHDfjR9r40B4NaH66y KKQg== X-Forwarded-Encrypted: i=1; AJvYcCVS32WFG3cbcTOS/jxnQ9+8nzqBNxIiPncTL5IYRVsycFfrIRi4sIeHMf4jj4sLdvafYwo9F3t8sQa9zuo=@vger.kernel.org X-Gm-Message-State: AOJu0YycgyCaWfS2APv3AX2Gl+420P7HKfznjVymmnggXu5CloimBblK hLS1CxDfVQkaGFAWxYfI7QKgJlzvhCfeY4BEjbk3d1UMPi7q9KWBQZqGPg== X-Gm-Gg: ASbGnct1F8ODnJL+mRZKjdWZsJS/iaqK0Q4SOvtcUnsMrgVkZmCo928jzmWUachmaJp lRtjOt5JVNDyUPQD+r1lUoptEAOShB1KmJUdyyqtCO6FPL8KHoHAe6mXg20uznoU/DEarB3PzzE gYgIu8OknF8tufi0vs1xEYKfNNQSzv1tJrfW86RJcq0jJmXdv+3fEQPXAc7ZvncQyXmBXa6owwW d9UqJeq4WowIyVNTjS98W0oAdCbSFHxolUKBn8CpVSgXTpjnfJrlxAE9XxMDT20CCyGTBdfTkWz tLv5XRrDK2tOeGnSCigaD43I2t3AddvKMSk1I5L2/57e8lSl759ur4yTJ7nRGRVc6yO4s0Eein0 uuLonIMnvMz/AEA+0fPMZWw== X-Google-Smtp-Source: AGHT+IEzcHIx5VvRKJa7vTMmQW77VymKl7dWS5EAvgPjCayjuDwj//mTZSHgbw6h1YANjwJF/oLHJQ== X-Received: by 2002:a05:6512:3ba4:b0:549:b13a:5d7f with SMTP id 2adb3069b0e04-549c39905d3mr7606610e87.41.1742237661377; Mon, 17 Mar 2025 11:54:21 -0700 (PDT) Received: from abj-NUC9VXQNX.. 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[84.248.220.251]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-549ba865024sm1387506e87.123.2025.03.17.11.54.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 11:54:20 -0700 (PDT) From: Abdiel Janulgue To: rust-for-linux@vger.kernel.org, daniel.almeida@collabora.com, dakr@kernel.org, robin.murphy@arm.com, aliceryhl@google.com Cc: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Trevor Gross , Valentin Obst , linux-kernel@vger.kernel.org (open list), Christoph Hellwig , Marek Szyprowski , airlied@redhat.com, iommu@lists.linux.dev (open list:DMA MAPPING HELPERS), Abdiel Janulgue Subject: [PATCH v15 09/11] rust: dma: use `dma::Device` in `CoherentAllocation` Date: Mon, 17 Mar 2025 20:52:16 +0200 Message-ID: <20250317185345.2608976-10-abdiel.janulgue@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> References: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Danilo Krummrich Require a `&dyn dma::Device` in `CoherentAllocation`, such that DMA memory can only be allocated with devices on potentially DMA capable busses. Signed-off-by: Danilo Krummrich Signed-off-by: Abdiel Janulgue Acked-by: Danilo Krummrich --- rust/kernel/dma.rs | 16 ++++++++-------- samples/rust/rust_dma.rs | 2 +- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs index fc66f1764c31..6d7aff6b360a 100644 --- a/rust/kernel/dma.rs +++ b/rust/kernel/dma.rs @@ -57,10 +57,9 @@ fn dma_set_mask(&mut self, mask: u64) -> Result { /// # Examples /// /// ``` -/// use kernel::device::Device; -/// use kernel::dma::{attrs::*, CoherentAllocation}; +/// use kernel::dma::{attrs::*, Device, CoherentAllocation}; /// -/// # fn test(dev: &Device) -> Result { +/// # fn test(dev: &dyn Device) -> Result { /// let attribs =3D DMA_ATTR_FORCE_CONTIGUOUS | DMA_ATTR_NO_WARN; /// let c: CoherentAllocation =3D /// CoherentAllocation::alloc_attrs(dev, 4, GFP_KERNEL, attribs)?; @@ -178,16 +177,15 @@ impl CoherentAllocation { /// # Examples /// /// ``` - /// use kernel::device::Device; - /// use kernel::dma::{attrs::*, CoherentAllocation}; + /// use kernel::dma::{attrs::*, Device, CoherentAllocation}; /// - /// # fn test(dev: &Device) -> Result { + /// # fn test(dev: &dyn Device) -> Result { /// let c: CoherentAllocation =3D /// CoherentAllocation::alloc_attrs(dev, 4, GFP_KERNEL, DMA_ATTR_N= O_WARN)?; /// # Ok::<(), Error>(()) } /// ``` pub fn alloc_attrs( - dev: &device::Device, + dev: &dyn Device, count: usize, gfp_flags: kernel::alloc::Flags, dma_attrs: Attrs, @@ -197,6 +195,8 @@ pub fn alloc_attrs( "It doesn't make sense for the allocated type to be a ZST" ); =20 + let dev =3D dev.as_ref(); + let size =3D count .checked_mul(core::mem::size_of::()) .ok_or(EOVERFLOW)?; @@ -229,7 +229,7 @@ pub fn alloc_attrs( /// Performs the same functionality as [`CoherentAllocation::alloc_att= rs`], except the /// `dma_attrs` is 0 by default. pub fn alloc_coherent( - dev: &device::Device, + dev: &dyn Device, count: usize, gfp_flags: kernel::alloc::Flags, ) -> Result> { diff --git a/samples/rust/rust_dma.rs b/samples/rust/rust_dma.rs index 1740140faba6..4c7ebf66647a 100644 --- a/samples/rust/rust_dma.rs +++ b/samples/rust/rust_dma.rs @@ -52,7 +52,7 @@ fn probe(pdev: &mut pci::Device, _info: &Self::IdInfo) ->= Result> dev_info!(pdev.as_ref(), "Probe DMA test driver.\n"); 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[84.248.220.251]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-549ba865024sm1387506e87.123.2025.03.17.11.54.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 11:54:22 -0700 (PDT) From: Abdiel Janulgue To: rust-for-linux@vger.kernel.org, daniel.almeida@collabora.com, dakr@kernel.org, robin.murphy@arm.com, aliceryhl@google.com Cc: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Trevor Gross , Valentin Obst , linux-kernel@vger.kernel.org (open list), Christoph Hellwig , Marek Szyprowski , airlied@redhat.com, iommu@lists.linux.dev (open list:DMA MAPPING HELPERS), Abdiel Janulgue Subject: [PATCH v15 10/11] rust: samples: dma: set DMA mask Date: Mon, 17 Mar 2025 20:52:17 +0200 Message-ID: <20250317185345.2608976-11-abdiel.janulgue@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> References: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Danilo Krummrich Set a DMA mask for the `pci::Device` in the Rust DMA sample driver. Signed-off-by: Danilo Krummrich Signed-off-by: Abdiel Janulgue Acked-by: Danilo Krummrich --- samples/rust/rust_dma.rs | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/samples/rust/rust_dma.rs b/samples/rust/rust_dma.rs index 4c7ebf66647a..39b6050aa3b6 100644 --- a/samples/rust/rust_dma.rs +++ b/samples/rust/rust_dma.rs @@ -4,7 +4,12 @@ //! //! To make this driver probe, QEMU must be run with `-device pci-testdev`. =20 -use kernel::{bindings, dma::CoherentAllocation, pci, prelude::*}; +use kernel::{ + bindings, + dma::{CoherentAllocation, Device}, + pci, + prelude::*, +}; =20 struct DmaSampleDriver { pdev: pci::Device, @@ -51,6 +56,8 @@ impl pci::Driver for DmaSampleDriver { fn probe(pdev: &mut pci::Device, _info: &Self::IdInfo) -> Result>> { dev_info!(pdev.as_ref(), "Probe DMA test driver.\n"); =20 + pdev.dma_set_mask_and_coherent(kernel::dma::dma_bit_mask(64))?; + let ca: CoherentAllocation =3D CoherentAllocation::alloc_coherent(pdev, TEST_VALUES.len(), GF= P_KERNEL)?; =20 --=20 2.43.0 From nobody Wed Dec 17 12:05:31 2025 Received: from mail-lf1-f44.google.com (mail-lf1-f44.google.com [209.85.167.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A44E41E832B; Mon, 17 Mar 2025 18:54:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237669; cv=none; b=FIbZe+GmGmVYHBPEcHiwKOhFsK/PymrSYo4v/aZ3qEHK+29UBy8GRCAgmwwTzB5a0cAw+IkWN5k5VHoLaH/+zmT+WSWVwLfnG+qhtck39Q7bFU+JBh0jf31i5fhEiFq1jXHMS2vyCPK9wb0e7Rn6b0p04g3fiqVINN/50O4jing= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742237669; c=relaxed/simple; bh=/7wFbnKC/IXue+Ku51P5u/UhRTtbHQI319bGUuW1U8E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NAimXsrBbkGU8c7AxUBpQHB9D9T5Hlh3ZcJGk2NkOZYYbEDq5lv7sxjwh/Gd9eNDORCyCucatilbqTqzdv0JEzZWGtfd7CVqRerlkuRUzeEBsKNeZNWyVT1UvL7j2qD4A40SBW9h/81GJz1rp+xKTnt5mXG9dc4+xTqRcQDhtQc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=J5+e/fmk; arc=none smtp.client-ip=209.85.167.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="J5+e/fmk" Received: by mail-lf1-f44.google.com with SMTP id 2adb3069b0e04-549b116321aso5300856e87.3; Mon, 17 Mar 2025 11:54:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1742237666; x=1742842466; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rTtaX3vhSb5G36KvfqVCTP+WKBznUgLh6K0dIke/e54=; b=J5+e/fmkOSVU+T4HzOW9dyGFEOzjurwdS0edfUpXoqPd6nV2G7rvYA9/GlteVZDrqc KTa/BeVmijlJI07nYMHEWbb+MnE8h9odEmL+H4iZT7K2RC0jzyEGXJsLiR2qq20SNURN wlH0LavVhDATL51fYz/ARfcLuLd4Rkmd+TB5CzvRY6DYG1tvs1GxgdeTf6bVbCKsLV3S G4VXu5cmzzpEzQqgZDjp6GfYCeScvMAkp303CQvhwqwJ4lbcKbNqclE1kx5SYqNodO8Q o1p8VFaw9HEjav8Vw5YUEz/AvEHxc1qGJehJuT9SqgEOz//laVNsNtudbyCyM3Mmco9h zt8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742237666; x=1742842466; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rTtaX3vhSb5G36KvfqVCTP+WKBznUgLh6K0dIke/e54=; b=fMi2l3u9Y26HRX44V47lTWsVYr0KN1x9y+Ets/eNRVcZXXhxQAXZGkREHpbFfyHw3k LAUHVAUQIf/gQ9Cvio60s5B3nP1ofT+rXXcXV7DbjQ6uTnB5QgnOC2YZ1fCQg/NBMEoz r53lUQJLAzAxbo4d/Uq0nU5z4WSZd9UPeKgzPsmbnxKkC7faNPtYBsMOFTYVv+FH/lFF WZWcSH5Z5yx4NfRND9XqYXS4A/k2clu1I60cTl9+E5cuLZowvazWqMYXTQljv09G0svV uT5XoWhC//pnZej6Ozb3k1YUViG3D7StOf1tYEcaQpJZ3wBd6wmzUepPALcLxXHkLNH+ TLiQ== X-Forwarded-Encrypted: i=1; AJvYcCVjU3WR5BK12noK7AbeRjcZ5hCUd4luBuIgtW0p91Kev2FtupJ29wngQ2cQxRTDsGGYGpYaWNgB80NPDL0=@vger.kernel.org X-Gm-Message-State: AOJu0Yyt4uUdBM7CWEWmSCXduSeq9uY/cRSIZtmGz9WuPyJD4y/mo0Ga pECwZ9W/o/Bw6/vBgqcaNVTlgEFPiJ7HXuNSi4OIKBr9deMhpKNvCzLXGA== X-Gm-Gg: ASbGncuqbXTyimNfXukPITL72Maq1lgSRsZgJhfewZXo124Wr2aig4CO6+tzANWeIMy Qhl2hE3I0vVBY4Xsspai4wjbwByToUoE4Gs+1aZlpPlBijvYJ2xDch7vKjv3NEiYrpNH4IkjhWq p9ruyg/3iso9qcfvJrkoRHNCuUIyTVMF0YAFd0K99NZU80PNQ9Mu9jthVw9S6IvEUe+TLyYz2ke ylgyblCId8Yz7/PhHH/pt7TyWssPFCEyFvhPtXPYLINJABuvk9rMV/RLrNVyOLPCP7jb2nQoATW B8A4gnYwIToofblUNEMtsaUIMoiGkL6lq/dhrKi4xfUzF6OHtwnj08/ycJSTtiUAGB1ttN+10Hp 73dloUn5bjpueLMThyApYVblyy85u25n4 X-Google-Smtp-Source: AGHT+IFLi8eIWmNCR26IQ1ZzNqzF+yX5evRGaLB3kNs6XdGjVB80bX12ukMhk1Sq94RJg91f1Bo3PQ== X-Received: by 2002:a05:6512:31c3:b0:549:8f06:8225 with SMTP id 2adb3069b0e04-549c39507ebmr7288403e87.53.1742237665546; Mon, 17 Mar 2025 11:54:25 -0700 (PDT) Received: from abj-NUC9VXQNX.. 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[84.248.220.251]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-549ba865024sm1387506e87.123.2025.03.17.11.54.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Mar 2025 11:54:24 -0700 (PDT) From: Abdiel Janulgue To: rust-for-linux@vger.kernel.org, daniel.almeida@collabora.com, dakr@kernel.org, robin.murphy@arm.com, aliceryhl@google.com Cc: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Trevor Gross , Valentin Obst , linux-kernel@vger.kernel.org (open list), Christoph Hellwig , Marek Szyprowski , airlied@redhat.com, iommu@lists.linux.dev (open list:DMA MAPPING HELPERS), Abdiel Janulgue Subject: [PATCH v15 11/11] rust: dma: add as_slice/write functions for CoherentAllocation Date: Mon, 17 Mar 2025 20:52:18 +0200 Message-ID: <20250317185345.2608976-12-abdiel.janulgue@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> References: <20250317185345.2608976-1-abdiel.janulgue@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add unsafe accessors for the region for reading or writing large blocks of data. Signed-off-by: Abdiel Janulgue Acked-by: Danilo Krummrich Reviewed-by: Andreas Hindborg --- rust/kernel/dma.rs | 87 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs index 6d7aff6b360a..027ef75a461a 100644 --- a/rust/kernel/dma.rs +++ b/rust/kernel/dma.rs @@ -253,6 +253,93 @@ pub fn dma_handle(&self) -> bindings::dma_addr_t { self.dma_handle } =20 + /// Returns the data from the region starting from `offset` as a slice. + /// `offset` and `count` are in units of `T`, not the number of bytes. + /// + /// Due to the safety requirements of slice, the caller should conside= r that the region could + /// be modified by the device at anytime. For ringbuffer type of r/w a= ccess or use-cases where + /// the pointer to the live data is needed, `start_ptr()` or `start_pt= r_mut()` could be + /// used instead. + /// + /// # Safety + /// + /// * Callers must ensure that no hardware operations that involve the= buffer are currently + /// taking place while the returned slice is live. + /// * Callers must ensure that this call does not race with a write to= the same region while + /// while the returned slice is live. + pub unsafe fn as_slice(&self, offset: usize, count: usize) -> Result<&= [T]> { + let end =3D offset.checked_add(count).ok_or(EOVERFLOW)?; + if end >=3D self.count { + return Err(EINVAL); + } + // SAFETY: + // - The pointer is valid due to type invariant on `CoherentAlloca= tion`, + // we've just checked that the range and index is within bounds. T= he immutability of the + // of data is also guaranteed by the safety requirements of the fu= nction. + // - `offset` can't overflow since it is smaller than `self.count`= and we've checked + // that `self.count` won't overflow early in the constructor. + Ok(unsafe { core::slice::from_raw_parts(self.cpu_addr.add(offset),= count) }) + } + + /// Performs the same functionality as [`CoherentAllocation::as_slice`= ], except that a mutable + /// slice is returned. + /// + /// # Safety + /// + /// * Callers must ensure that no hardware operations that involve the= buffer are currently + /// taking place while the returned slice is live. + /// * Callers must ensure that this call does not race with a read or = write to the same region + /// while the returned slice is live. + pub unsafe fn as_slice_mut(&self, offset: usize, count: usize) -> Resu= lt<&mut [T]> { + let end =3D offset.checked_add(count).ok_or(EOVERFLOW)?; + if end >=3D self.count { + return Err(EINVAL); + } + // SAFETY: + // - The pointer is valid due to type invariant on `CoherentAlloca= tion`, + // we've just checked that the range and index is within bounds. T= he immutability of the + // of data is also guaranteed by the safety requirements of the fu= nction. + // - `offset` can't overflow since it is smaller than `self.count`= and we've checked + // that `self.count` won't overflow early in the constructor. + Ok(unsafe { core::slice::from_raw_parts_mut(self.cpu_addr.add(offs= et), count) }) + } + + /// Writes data to the region starting from `offset`. `offset` is in u= nits of `T`, not the + /// number of bytes. + /// + /// # Safety + /// + /// * Callers must ensure that no hardware operations that involve the= buffer overlaps with + /// this write. + /// * Callers must ensure that this call does not race with a read or = write to the same region + /// that overlaps with this write. + /// + /// # Examples + /// + /// ``` + /// # fn test(alloc: &mut kernel::dma::CoherentAllocation) -> Resu= lt { + /// let somedata: [u8; 4] =3D [0xf; 4]; + /// let buf: &[u8] =3D &somedata; + /// // SAFETY: No hw operation on the device and no other r/w access t= o the region at this point. + /// unsafe { alloc.write(buf, 0)?; } + /// # Ok::<(), Error>(()) } + /// ``` + pub unsafe fn write(&self, src: &[T], offset: usize) -> Result { + let end =3D offset.checked_add(src.len()).ok_or(EOVERFLOW)?; + if end >=3D self.count { + return Err(EINVAL); + } + // SAFETY: + // - The pointer is valid due to type invariant on `CoherentAlloca= tion` + // and we've just checked that the range and index is within bound= s. + // - `offset` can't overflow since it is smaller than `self.count`= and we've checked + // that `self.count` won't overflow early in the constructor. + unsafe { + core::ptr::copy_nonoverlapping(src.as_ptr(), self.cpu_addr.add= (offset), src.len()) + }; + Ok(()) + } + /// Returns a pointer to an element from the region with bounds checki= ng. `offset` is in /// units of `T`, not the number of bytes. /// --=20 2.43.0