From nobody Wed Dec 17 15:34:36 2025 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C08E02459F8 for ; Mon, 17 Mar 2025 14:55:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742223335; cv=pass; b=WVG+Js3SO5eW7q/jfuh2qJTYKTEUG5g1Un5fXK3h2NJZPa6YppDL74RLkfWZAyDuDK0eRPOhChftAsUAwDrDLoBorEqdtOaeqjCIx5z8zjhp42nmkAZ66MyOdfa9ig4dGJN4yQnDeCemS8Zht7B6ENb3e8+as0CJbyYNaj4whlA= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742223335; c=relaxed/simple; bh=/BfLumKFocdvcPhxCskhPjNGo3ZslfA2/N6FaAoc5lg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OMtXQVGBAmxRegthn/Fz8arrCk00BzW+WzS/+v7tmzoNU0uhry/mHFDTN/GopSTEEfIaAdq8/NTwR1xJ/sqXqZYYdbU3f81LH7cfaipFt5R50eaS/HpWrQ2VPjKGrdYdDRsiIXFJ9V3fHFBBgIlDG5hBkmOSQaYXIMl+uxDTzhs= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=ariel.dalessandro@collabora.com header.b=NTUbiO3e; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=ariel.dalessandro@collabora.com header.b="NTUbiO3e" ARC-Seal: i=1; a=rsa-sha256; t=1742223312; cv=none; d=zohomail.com; s=zohoarc; b=cjLTeVl8RlyKIZ/QdHUaKerqGeDESqvOkY/+eZ1jwLu9GkcdQf9nAFXSzTcFe5GaouJMnNFfM9MYkeHXTCmyRUvsa97HpaTlrzmNNeno/JPQRPxACTV5pHpouCHIZ9ucj/7X3mRz3h9loSJl7HUC8seOo/VKBAiE1wzt3oTkumE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1742223312; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=E+fTK3txOlyskp4W/rEPx48F2NlCVYh8mb8E/EDT8nE=; b=DLm8UjqD4aE1K0wV4k+f9pNKFe4xCLFycMo456jtCnIjL6d1OaIaNnG3EjrzScQZeqZsWMwyARzy0QWX5hwAdJVHtboPAutcVU4mgNSx2QfVCYgkvcZnUVGzLyj0X+jvo3rsTx6BgMpxocj+uo/1EHpg9Jj+1WHxigoZWKMZ/B8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=ariel.dalessandro@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1742223312; s=zohomail; d=collabora.com; i=ariel.dalessandro@collabora.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-ID:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Message-Id:Reply-To; bh=E+fTK3txOlyskp4W/rEPx48F2NlCVYh8mb8E/EDT8nE=; b=NTUbiO3eOtOfXcGE3zsM5cHbMgB0FbalMDMywLJpMkWttRCmNSVmwmELrd075NR+ d+nhJvM0QIWACW6cmNPfP4ySjCR3mBBQVq4zzRe29hBTcnoykStHDCGe+EBdyrOOMuH OBYnnLizQ64pJ5+CMdSzOMcm8sdpvt/2xCGvLB3A= Received: by mx.zohomail.com with SMTPS id 1742223301853895.315747173944; Mon, 17 Mar 2025 07:55:01 -0700 (PDT) From: Ariel D'Alessandro To: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: boris.brezillon@collabora.com, robh@kernel.org, steven.price@arm.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, kernel@collabora.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, sjoerd@collabora.com, angelogioacchino.delregno@collabora.com, Ariel D'Alessandro Subject: [PATCH v4 5/6] drm/panfrost: Force AARCH64_4K page table format on MediaTek MT8188 Date: Mon, 17 Mar 2025 11:52:44 -0300 Message-ID: <20250317145245.910566-6-ariel.dalessandro@collabora.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250317145245.910566-1-ariel.dalessandro@collabora.com> References: <20250317145245.910566-1-ariel.dalessandro@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMailClient: External Content-Type: text/plain; charset="utf-8" MediaTek MT8188 SoC has an ARM Mali-G57 MC3 GPU (Valhall-JM), which constantly faults with the current panfrost support. For instance, running `glmark2-es2-drm` benchmark test: ``` [ 79.617461] panfrost 13000000.gpu: js fault, js=3D1, status=3DJOB_BUS_FA= ULT, head=3D0xaadc380, tail=3D0xaadc380 [ 80.119811] panfrost 13000000.gpu: gpu sched timeout, js=3D0, config=3D0= x7300, status=3D0x58, head=3D0xaaca180, tail=3D0xaaca180, sched_job=3D00000= 0002fd03ccc [ 80.129083] panfrost 13000000.gpu: Unhandled Page fault in AS0 at VA 0x0= 000000000000000 [ 80.129083] Reason: TODO [ 80.129083] raw fault status: 0x1C2 [ 80.129083] decoded fault status: SLAVE FAULT [ 80.129083] exception type 0xC2: TRANSLATION_FAULT_2 [ 80.129083] access type 0x1: EXECUTE [ 80.129083] source id 0x0 ``` Note that current panfrost mode (Mali LPAE - LEGACY) only allows to specify write-cache or implementation-defined as the caching policy, probably not matching the right configuration. As depicted in the source code: drivers/iommu/io-pgtable-arm.c: ``` * MEMATTR: Mali has no actual notion of a non-cacheable type, so the * best we can do is mimic the out-of-tree driver and hope that the * "implementation-defined caching policy" is good enough... ``` Now that Panfrost supports AARCH64_4K page table format, let's enable it on Mediatek MT8188 and configure the cache/shareability policies properly. Signed-off-by: Ariel D'Alessandro Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Boris Brezillon --- drivers/gpu/drm/panfrost/panfrost_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 0f3935556ac76..e854f290858f9 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -824,6 +824,7 @@ static const struct panfrost_compatible mediatek_mt8188= _data =3D { .num_pm_domains =3D ARRAY_SIZE(mediatek_mt8183_pm_domains), .pm_domain_names =3D mediatek_mt8183_pm_domains, .pm_features =3D BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), + .gpu_quirks =3D BIT(GPU_QUIRK_FORCE_AARCH64_PGTABLE), }; =20 static const char * const mediatek_mt8192_supplies[] =3D { "mali", NULL }; --=20 2.47.2