From nobody Wed Dec 17 15:43:09 2025 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 123771DF990 for ; Mon, 17 Mar 2025 12:43:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742215406; cv=pass; b=XY+WQzaubXTcQIdAj0f9dQz3BlsN8SvucBhzXGI0nuWE2y/N1HKfIAthuld6TDxtQWV3EBXPyupHu6rTwB0/idyqA+oJlVbmXKTtf/wswviD3ymUb2R7hss7yGRnjZ7mM/xnrQE6PIgc3qsz2TXjxW94P057D8AdPwjM1K0cjXc= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742215406; c=relaxed/simple; bh=/BfLumKFocdvcPhxCskhPjNGo3ZslfA2/N6FaAoc5lg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ugpmu8gHiicX4XgBO6ijgJKeEtV2CbI2xqv9RRnQ++iWEyU8JIDsXun8g9iBzPpconlhahJou90rhInpRvCckTfugvAoBr2HAbgWhpOXCZP0fdg4fEgWLvsNndkI2Ozk5PG1ZB50Uw6Q20pvqCZ2tJRG5TfcVN7fCMQe6POROho= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=ariel.dalessandro@collabora.com header.b=HXf4hO02; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=ariel.dalessandro@collabora.com header.b="HXf4hO02" ARC-Seal: i=1; a=rsa-sha256; t=1742215387; cv=none; d=zohomail.com; s=zohoarc; b=b3uWeDL+gwYzvfpizehB9YJMhwMmtQNJyd/A4OiYYSiMFhIjN2RWvPv1NsWIedC/s9yCeMRk+U+2R8bgf5VFrs0HIoq7YRrxUH8+l9lAoa3ygGx7DgHzsmgo6RXvd+iQPOM9ba4BTxeoOh+4s3dwpJEeHYz4bdlP4PFUgsjlVkk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1742215387; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=E+fTK3txOlyskp4W/rEPx48F2NlCVYh8mb8E/EDT8nE=; b=IzQsjoeyM9AXwepdnNHsLHNuF/dfCcGS5qu8H2MGZK6Bjkaftozyu5N9hN7eiap1CAQxd9XBrfUF2Hs3Y5StlMz5KZKlZ29VvXktExVFm1YIPY/AJAtSBfv3w19iWMQGmu2glZEVk850gNPC180SHI4bRtkGw0ErcEKcG1f0LTw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=ariel.dalessandro@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1742215387; s=zohomail; d=collabora.com; i=ariel.dalessandro@collabora.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-ID:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Message-Id:Reply-To; bh=E+fTK3txOlyskp4W/rEPx48F2NlCVYh8mb8E/EDT8nE=; b=HXf4hO02HUcqjTyZmWPudp85pADFXGqoYHtKYToogsvzm2r29rQY2SnXtal9riGA MXoYasjLxREOvo9h3J+JE65ngDedFo1rWfw6D0N7R93QOKhSgNP0MCoNj+arx1usUz3 Q+f/gi8pazD+WSg1cr6GjM5wscwHghLd1fC3xmyk= Received: by mx.zohomail.com with SMTPS id 1742215386268731.4491412408154; Mon, 17 Mar 2025 05:43:06 -0700 (PDT) From: Ariel D'Alessandro To: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: boris.brezillon@collabora.com, robh@kernel.org, steven.price@arm.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, kernel@collabora.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, sjoerd@collabora.com, angelogioacchino.delregno@collabora.com, Ariel D'Alessandro Subject: [PATCH v3 5/6] drm/panfrost: Force AARCH64_4K page table format on MediaTek MT8188 Date: Mon, 17 Mar 2025 09:40:43 -0300 Message-ID: <20250317124044.16257-6-ariel.dalessandro@collabora.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250317124044.16257-1-ariel.dalessandro@collabora.com> References: <20250317124044.16257-1-ariel.dalessandro@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMailClient: External Content-Type: text/plain; charset="utf-8" MediaTek MT8188 SoC has an ARM Mali-G57 MC3 GPU (Valhall-JM), which constantly faults with the current panfrost support. For instance, running `glmark2-es2-drm` benchmark test: ``` [ 79.617461] panfrost 13000000.gpu: js fault, js=3D1, status=3DJOB_BUS_FA= ULT, head=3D0xaadc380, tail=3D0xaadc380 [ 80.119811] panfrost 13000000.gpu: gpu sched timeout, js=3D0, config=3D0= x7300, status=3D0x58, head=3D0xaaca180, tail=3D0xaaca180, sched_job=3D00000= 0002fd03ccc [ 80.129083] panfrost 13000000.gpu: Unhandled Page fault in AS0 at VA 0x0= 000000000000000 [ 80.129083] Reason: TODO [ 80.129083] raw fault status: 0x1C2 [ 80.129083] decoded fault status: SLAVE FAULT [ 80.129083] exception type 0xC2: TRANSLATION_FAULT_2 [ 80.129083] access type 0x1: EXECUTE [ 80.129083] source id 0x0 ``` Note that current panfrost mode (Mali LPAE - LEGACY) only allows to specify write-cache or implementation-defined as the caching policy, probably not matching the right configuration. As depicted in the source code: drivers/iommu/io-pgtable-arm.c: ``` * MEMATTR: Mali has no actual notion of a non-cacheable type, so the * best we can do is mimic the out-of-tree driver and hope that the * "implementation-defined caching policy" is good enough... ``` Now that Panfrost supports AARCH64_4K page table format, let's enable it on Mediatek MT8188 and configure the cache/shareability policies properly. Signed-off-by: Ariel D'Alessandro Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Boris Brezillon --- drivers/gpu/drm/panfrost/panfrost_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 0f3935556ac76..e854f290858f9 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -824,6 +824,7 @@ static const struct panfrost_compatible mediatek_mt8188= _data =3D { .num_pm_domains =3D ARRAY_SIZE(mediatek_mt8183_pm_domains), .pm_domain_names =3D mediatek_mt8183_pm_domains, .pm_features =3D BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), + .gpu_quirks =3D BIT(GPU_QUIRK_FORCE_AARCH64_PGTABLE), }; =20 static const char * const mediatek_mt8192_supplies[] =3D { "mali", NULL }; --=20 2.47.2