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([2a02:1210:861b:6f00:82ee:73ff:feb8:99e3]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5e8169b160dsm3775586a12.41.2025.03.15.15.49.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 15 Mar 2025 15:49:26 -0700 (PDT) From: Alexander Sverdlin To: sophgo@lists.linux.dev, devicetree@vger.kernel.org, linux-rtc@vger.kernel.org Cc: Jingbao Qiu , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Alexandre Belloni , Arnd Bergmann , Yangyu Chen , linux-kernel@vger.kernel.org, Alexander Sverdlin , Krzysztof Kozlowski Subject: [PATCH v14 1/3] dt-bindings: soc: sophgo: add RTC support for Sophgo CV1800 series Date: Sat, 15 Mar 2025 23:49:12 +0100 Message-ID: <20250315224921.3627852-2-alexander.sverdlin@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250315224921.3627852-1-alexander.sverdlin@gmail.com> References: <20250315224921.3627852-1-alexander.sverdlin@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jingbao Qiu Add RTC devicetree binding for Sophgo CV1800 series SoC. The device is called RTC, but contains control registers of other HW blocks in its address space, most notably of Power-on-Reset (PoR) module, DW8051 IP (MCU core), accompanying SRAM, hence putting it in SoC subsystem. Signed-off-by: Jingbao Qiu Signed-off-by: Alexander Sverdlin Reviewed-by: Krzysztof Kozlowski Reviewed-by: Inochi Amaoto --- Changelog: v14: - no changes v13: - Moved bindings from MFD into SOC subsystem v12: - maintainer Jingbao Qiu -> sophgo@lists.linux.= dev - dropped Reviewed-by: Krzysztof Kozlowski - link to TRM - mentioned 8051 core in the description - binding is now MFD, not RTC - added "syscon" compatible - added "interrupt-names", "clock-names" (because of added PM/remoteproc) - main compatible "sophgo,cv1800-rtc" -> "sophgo,cv1800b-rtc" .../soc/sophgo/sophgo,cv1800b-rtc.yaml | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1= 800b-rtc.yaml diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800b-rt= c.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800b-rtc.ya= ml new file mode 100644 index 000000000000..5cf186c396c9 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800b-rtc.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sophgo/sophgo,cv1800b-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Real Time Clock of the Sophgo CV1800 SoC + +description: + The RTC (Real Time Clock) is an independently powered module in the chip= . It + contains a 32KHz oscillator and a Power-On-Reset (POR) sub-module, which= can + be used for time display and scheduled alarm produce. In addition, the + hardware state machine provides triggering and timing control for chip + power-on, power-off and reset. + + Furthermore, the 8051 subsystem is located within RTCSYS and is independ= ently + powered. System software can use the 8051 to manage wake conditions and = wake + the system while the system is asleep, and communicate with external dev= ices + through peripheral controllers. + + Technical Reference Manual available at + https://github.com/sophgo/sophgo-doc/tree/main/SG200X/TRM + +maintainers: + - sophgo@lists.linux.dev + +allOf: + - $ref: /schemas/rtc/rtc.yaml# + +properties: + compatible: + items: + - const: sophgo,cv1800b-rtc + - const: syscon + + reg: + maxItems: 1 + + interrupts: + items: + - description: RTC Alarm + - description: RTC Longpress + - description: VBAT DET + + interrupt-names: + items: + - const: alarm + - const: longpress + - const: vbat + + clocks: + items: + - description: RTC clock source + - description: DW8051 MCU clock source + + clock-names: + items: + - const: rtc + - const: mcu + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + + rtc@5025000 { + compatible =3D "sophgo,cv1800b-rtc", "syscon"; + reg =3D <0x5025000 0x2000>; + interrupts =3D <17 IRQ_TYPE_LEVEL_HIGH>, + <18 IRQ_TYPE_LEVEL_HIGH>, + <19 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "alarm", "longpress", "vbat"; + clocks =3D <&clk CLK_RTC_25M>, + <&clk CLK_SRC_RTC_SYS_0>; + clock-names =3D "rtc", "mcu"; + }; --=20 2.48.1