From nobody Thu Dec 18 18:01:30 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A243D1F9A8B for ; Thu, 13 Mar 2025 05:19:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741843185; cv=none; b=T/ueCeoGbtbjJ9kn2kAq/czd2fP1OXZGRmgu96Yg4nBWEdE4vmlifI9Kf5v7K1YJl3gSPDoQeIgBs/wZXZ8rd7SmbMEYIAg+iTkd8U9BJb34AnR0sU1oka4r7Bth0otUwIec1gH3IAokF35NwUDGmfzvKwZ98KGadwHqftMqijQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741843185; c=relaxed/simple; bh=s1PXrY/OFMhTX64vUdRGU7rxgkMPIx/1FasQUBWKJdo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bToU/29m3sqewzHSLcKWfp2Lz2r6Tf1zX+aJd5hnifBTGg2HBrU2pwL0ODydb1NULPj8Fje5tjfV9JhwWPBdsUMUxnPQcfYZGRkg/gk6l08pkNXmhsQ0k7qiVA/JFHKsGYc8gKJw/QWX3c7LU4t/5xIZJd4PJnfVhNTfMRRJTjc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=a/ly3YIp; arc=none smtp.client-ip=198.175.65.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="a/ly3YIp" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741843184; x=1773379184; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=s1PXrY/OFMhTX64vUdRGU7rxgkMPIx/1FasQUBWKJdo=; b=a/ly3YIpyL9DXKbOWmDz8tkYoWAXGr8py0zA536fw1yDfo7rRinWhw54 wcghJa0M2fX3VXcAR6RDWyfgB31QJm+0uG9li6IxcWsD5rGuSdPpe7roa 2DRW3xs/6Q+vdOdMby8rJmmB0NRaPNfg3tv2sRMaE3b3n1X8uMRDFG7wa Vq3UJHBkKI9nO3Hu1E5FsWGRMTSPF0I15TrFVmukQvyKfTFNFDCeKN1J2 9qrIO+VYn1yItfsux71TGHJZ9yWWjqcsMNDq0h2v78g1ENfcDwiR7onsS SiAZfhSx+rOD9/1HDBrprRUdxjg4u/mqKrV1hor3TZ1CfaGTQK9b7ib0K w==; X-CSE-ConnectionGUID: Vu9azoOJQta4oj4TExvfug== X-CSE-MsgGUID: vHDSelZ5Rl+rBPl5txkdkA== X-IronPort-AV: E=McAfee;i="6700,10204,11371"; a="54323646" X-IronPort-AV: E=Sophos;i="6.14,243,1736841600"; d="scan'208";a="54323646" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2025 22:19:43 -0700 X-CSE-ConnectionGUID: Xy5Dr7K4QjyintJu9zIlmQ== X-CSE-MsgGUID: nUWUKirPQqycC+nUSq+HgA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,243,1736841600"; d="scan'208";a="151807039" Received: from allen-box.sh.intel.com ([10.239.159.52]) by fmviesa001.fm.intel.com with ESMTP; 12 Mar 2025 22:19:40 -0700 From: Lu Baolu To: Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian Cc: Dave Jiang , Vinod Koul , Fenghua Yu , Zhangfei Gao , Zhou Wang , iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Jason Gunthorpe , Lu Baolu Subject: [PATCH v4 1/8] iommu/arm-smmu-v3: Put iopf enablement in the domain attach path Date: Thu, 13 Mar 2025 13:19:46 +0800 Message-ID: <20250313051953.4064532-2-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313051953.4064532-1-baolu.lu@linux.intel.com> References: <20250313051953.4064532-1-baolu.lu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jason Gunthorpe SMMUv3 co-mingles FEAT_IOPF and FEAT_SVA behaviors so that fault reporting doesn't work unless both are enabled. This is not correct and causes problems for iommufd which does not enable FEAT_SVA for it's fault capable domains. These APIs are both obsolete, update SMMUv3 to use the new method like AMD implements. A driver should enable iopf support when a domain with an iopf_handler is attached, and disable iopf support when the domain is removed. Move the fault support logic to sva domain allocation and to domain attach, refusing to create or attach fault capable domains if the HW doesn't support it. Move all the logic for controlling the iopf queue under arm_smmu_attach_prepare(). Keep track of the number of domains on the master (over all the SSIDs) that require iopf. When the first domain requiring iopf is attached create the iopf queue, when the last domain is detached destroy it. Turn FEAT_IOPF and FEAT_SVA into no ops. Remove the sva_lock, this is all protected by the group mutex. Signed-off-by: Jason Gunthorpe Signed-off-by: Lu Baolu Tested-by: Zhangfei Gao Acked-by: Will Deacon --- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 86 +------------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 105 +++++++++++++----- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 39 ++----- 3 files changed, 91 insertions(+), 139 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iomm= u/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 9ba596430e7c..605d1dd0e1cc 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -13,8 +13,6 @@ #include "arm-smmu-v3.h" #include "../../io-pgtable-arm.h" =20 -static DEFINE_MUTEX(sva_lock); - static void __maybe_unused arm_smmu_update_s1_domain_cd_entry(struct arm_smmu_domain *smmu_domain) { @@ -257,84 +255,6 @@ bool arm_smmu_sva_supported(struct arm_smmu_device *sm= mu) return true; } =20 -bool arm_smmu_master_iopf_supported(struct arm_smmu_master *master) -{ - /* We're not keeping track of SIDs in fault events */ - if (master->num_streams !=3D 1) - return false; - - return master->stall_enabled; -} - -bool arm_smmu_master_sva_supported(struct arm_smmu_master *master) -{ - if (!(master->smmu->features & ARM_SMMU_FEAT_SVA)) - return false; - - /* SSID support is mandatory for the moment */ - return master->ssid_bits; -} - -bool arm_smmu_master_sva_enabled(struct arm_smmu_master *master) -{ - bool enabled; - - mutex_lock(&sva_lock); - enabled =3D master->sva_enabled; - mutex_unlock(&sva_lock); - return enabled; -} - -static int arm_smmu_master_sva_enable_iopf(struct arm_smmu_master *master) -{ - struct device *dev =3D master->dev; - - /* - * Drivers for devices supporting PRI or stall should enable IOPF first. - * Others have device-specific fault handlers and don't need IOPF. - */ - if (!arm_smmu_master_iopf_supported(master)) - return 0; - - if (!master->iopf_enabled) - return -EINVAL; - - return iopf_queue_add_device(master->smmu->evtq.iopf, dev); -} - -static void arm_smmu_master_sva_disable_iopf(struct arm_smmu_master *maste= r) -{ - struct device *dev =3D master->dev; - - if (!master->iopf_enabled) - return; - - iopf_queue_remove_device(master->smmu->evtq.iopf, dev); -} - -int arm_smmu_master_enable_sva(struct arm_smmu_master *master) -{ - int ret; - - mutex_lock(&sva_lock); - ret =3D arm_smmu_master_sva_enable_iopf(master); - if (!ret) - master->sva_enabled =3D true; - mutex_unlock(&sva_lock); - - return ret; -} - -int arm_smmu_master_disable_sva(struct arm_smmu_master *master) -{ - mutex_lock(&sva_lock); - arm_smmu_master_sva_disable_iopf(master); - master->sva_enabled =3D false; - mutex_unlock(&sva_lock); - - return 0; -} - void arm_smmu_sva_notifier_synchronize(void) { /* @@ -353,6 +273,9 @@ static int arm_smmu_sva_set_dev_pasid(struct iommu_doma= in *domain, struct arm_smmu_cd target; int ret; =20 + if (!(master->smmu->features & ARM_SMMU_FEAT_SVA)) + return -EOPNOTSUPP; + /* Prevent arm_smmu_mm_release from being called while we are attaching */ if (!mmget_not_zero(domain->mm)) return -EINVAL; @@ -406,6 +329,9 @@ struct iommu_domain *arm_smmu_sva_domain_alloc(struct d= evice *dev, u32 asid; int ret; =20 + if (!(master->smmu->features & ARM_SMMU_FEAT_SVA)) + return ERR_PTR(-EOPNOTSUPP); + smmu_domain =3D arm_smmu_domain_alloc(); if (IS_ERR(smmu_domain)) return ERR_CAST(smmu_domain); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 358072b4e293..a8b1b8b17992 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2712,6 +2712,7 @@ static void arm_smmu_disable_pasid(struct arm_smmu_ma= ster *master) =20 static struct arm_smmu_master_domain * arm_smmu_find_master_domain(struct arm_smmu_domain *smmu_domain, + struct iommu_domain *domain, struct arm_smmu_master *master, ioasid_t ssid, bool nested_ats_flush) { @@ -2722,6 +2723,7 @@ arm_smmu_find_master_domain(struct arm_smmu_domain *s= mmu_domain, list_for_each_entry(master_domain, &smmu_domain->devices, devices_elm) { if (master_domain->master =3D=3D master && + master_domain->domain =3D=3D domain && master_domain->ssid =3D=3D ssid && master_domain->nested_ats_flush =3D=3D nested_ats_flush) return master_domain; @@ -2748,6 +2750,58 @@ to_smmu_domain_devices(struct iommu_domain *domain) return NULL; } =20 +static int arm_smmu_enable_iopf(struct arm_smmu_master *master, + struct arm_smmu_master_domain *master_domain) +{ + int ret; + + iommu_group_mutex_assert(master->dev); + + if (!IS_ENABLED(CONFIG_ARM_SMMU_V3_SVA)) + return -EOPNOTSUPP; + + /* + * Drivers for devices supporting PRI or stall require iopf others have + * device-specific fault handlers and don't need IOPF, so this is not a + * failure. + */ + if (!master->stall_enabled) + return 0; + + /* We're not keeping track of SIDs in fault events */ + if (master->num_streams !=3D 1) + return -EOPNOTSUPP; + + if (master->iopf_refcount) { + master->iopf_refcount++; + master_domain->using_iopf =3D true; + return 0; + } + + ret =3D iopf_queue_add_device(master->smmu->evtq.iopf, master->dev); + if (ret) + return ret; + master->iopf_refcount =3D 1; + master_domain->using_iopf =3D true; + return 0; +} + +static void arm_smmu_disable_iopf(struct arm_smmu_master *master, + struct arm_smmu_master_domain *master_domain) +{ + iommu_group_mutex_assert(master->dev); + + if (!IS_ENABLED(CONFIG_ARM_SMMU_V3_SVA)) + return; + + if (!master_domain || !master_domain->using_iopf) + return; + + master->iopf_refcount--; + if (master->iopf_refcount =3D=3D 0) + iopf_queue_remove_device(master->smmu->evtq.iopf, master->dev); +} + static void arm_smmu_remove_master_domain(struct arm_smmu_master *master, struct iommu_domain *domain, ioasid_t ssid) @@ -2764,15 +2818,17 @@ static void arm_smmu_remove_master_domain(struct ar= m_smmu_master *master, nested_ats_flush =3D to_smmu_nested_domain(domain)->enable_ats; =20 spin_lock_irqsave(&smmu_domain->devices_lock, flags); - master_domain =3D arm_smmu_find_master_domain(smmu_domain, master, ssid, - nested_ats_flush); + master_domain =3D arm_smmu_find_master_domain(smmu_domain, domain, master, + ssid, nested_ats_flush); if (master_domain) { list_del(&master_domain->devices_elm); - kfree(master_domain); if (master->ats_enabled) atomic_dec(&smmu_domain->nr_ats_masters); } spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); + + arm_smmu_disable_iopf(master, master_domain); + kfree(master_domain); } =20 /* @@ -2803,6 +2859,7 @@ int arm_smmu_attach_prepare(struct arm_smmu_attach_st= ate *state, struct arm_smmu_domain *smmu_domain =3D to_smmu_domain_devices(new_domain); unsigned long flags; + int ret; =20 /* * arm_smmu_share_asid() must not see two domains pointing to the same @@ -2835,12 +2892,19 @@ int arm_smmu_attach_prepare(struct arm_smmu_attach_= state *state, master_domain =3D kzalloc(sizeof(*master_domain), GFP_KERNEL); if (!master_domain) return -ENOMEM; + master_domain->domain =3D new_domain; master_domain->master =3D master; master_domain->ssid =3D state->ssid; if (new_domain->type =3D=3D IOMMU_DOMAIN_NESTED) master_domain->nested_ats_flush =3D to_smmu_nested_domain(new_domain)->enable_ats; =20 + if (new_domain->iopf_handler) { + ret =3D arm_smmu_enable_iopf(master, master_domain); + if (ret) + goto err_free_master_domain; + } + /* * During prepare we want the current smmu_domain and new * smmu_domain to be in the devices list before we change any @@ -2860,8 +2924,8 @@ int arm_smmu_attach_prepare(struct arm_smmu_attach_st= ate *state, !arm_smmu_master_canwbs(master)) { spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); - kfree(master_domain); - return -EINVAL; + ret =3D -EINVAL; + goto err_iopf; } =20 if (state->ats_enabled) @@ -2880,6 +2944,12 @@ int arm_smmu_attach_prepare(struct arm_smmu_attach_s= tate *state, wmb(); } return 0; + +err_iopf: + arm_smmu_disable_iopf(master, master_domain); +err_free_master_domain: + kfree(master_domain); + return ret; } =20 /* @@ -3475,8 +3545,7 @@ static void arm_smmu_release_device(struct device *de= v) { struct arm_smmu_master *master =3D dev_iommu_priv_get(dev); =20 - if (WARN_ON(arm_smmu_master_sva_enabled(master))) - iopf_queue_remove_device(master->smmu->evtq.iopf, dev); + WARN_ON(master->iopf_refcount); =20 /* Put the STE back to what arm_smmu_init_strtab() sets */ if (dev->iommu->require_direct) @@ -3561,18 +3630,8 @@ static int arm_smmu_dev_enable_feature(struct device= *dev, =20 switch (feat) { case IOMMU_DEV_FEAT_IOPF: - if (!arm_smmu_master_iopf_supported(master)) - return -EINVAL; - if (master->iopf_enabled) - return -EBUSY; - master->iopf_enabled =3D true; - return 0; case IOMMU_DEV_FEAT_SVA: - if (!arm_smmu_master_sva_supported(master)) - return -EINVAL; - if (arm_smmu_master_sva_enabled(master)) - return -EBUSY; - return arm_smmu_master_enable_sva(master); + return 0; default: return -EINVAL; } @@ -3588,16 +3647,8 @@ static int arm_smmu_dev_disable_feature(struct devic= e *dev, =20 switch (feat) { case IOMMU_DEV_FEAT_IOPF: - if (!master->iopf_enabled) - return -EINVAL; - if (master->sva_enabled) - return -EBUSY; - master->iopf_enabled =3D false; - return 0; case IOMMU_DEV_FEAT_SVA: - if (!arm_smmu_master_sva_enabled(master)) - return -EINVAL; - return arm_smmu_master_disable_sva(master); + return 0; default: return -EINVAL; } diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index bd9d7c85576a..fe6b88affa4a 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -830,9 +830,8 @@ struct arm_smmu_master { bool ats_enabled : 1; bool ste_ats_enabled : 1; bool stall_enabled; - bool sva_enabled; - bool iopf_enabled; unsigned int ssid_bits; + unsigned int iopf_refcount; }; =20 /* SMMU private data for an IOMMU domain */ @@ -908,8 +907,14 @@ void arm_smmu_make_sva_cd(struct arm_smmu_cd *target, struct arm_smmu_master_domain { struct list_head devices_elm; struct arm_smmu_master *master; + /* + * For nested domains the master_domain is threaded onto the S2 parent, + * this points to the IOMMU_DOMAIN_NESTED to disambiguate the masters. + */ + struct iommu_domain *domain; ioasid_t ssid; bool nested_ats_flush : 1; + bool using_iopf : 1; }; =20 static inline struct arm_smmu_domain *to_smmu_domain(struct iommu_domain *= dom) @@ -987,11 +992,6 @@ int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device= *smmu, =20 #ifdef CONFIG_ARM_SMMU_V3_SVA bool arm_smmu_sva_supported(struct arm_smmu_device *smmu); -bool arm_smmu_master_sva_supported(struct arm_smmu_master *master); -bool arm_smmu_master_sva_enabled(struct arm_smmu_master *master); -int arm_smmu_master_enable_sva(struct arm_smmu_master *master); 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X-CSE-ConnectionGUID: aDagmuauT2SGVh0weLjOiw== X-CSE-MsgGUID: lvSo46qgSbGhxwR1+jzD4Q== X-IronPort-AV: E=McAfee;i="6700,10204,11371"; a="54323658" X-IronPort-AV: E=Sophos;i="6.14,243,1736841600"; d="scan'208";a="54323658" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2025 22:19:47 -0700 X-CSE-ConnectionGUID: ZxGle/DsQQmjLJjHp/c8Kg== X-CSE-MsgGUID: BwUdKLrWTEG5kkWF69v+Pw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,243,1736841600"; d="scan'208";a="151807056" Received: from allen-box.sh.intel.com ([10.239.159.52]) by fmviesa001.fm.intel.com with ESMTP; 12 Mar 2025 22:19:43 -0700 From: Lu Baolu To: Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian Cc: Dave Jiang , Vinod Koul , Fenghua Yu , Zhangfei Gao , Zhou Wang , iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Jason Gunthorpe , Lu Baolu , Yi Liu Subject: [PATCH v4 2/8] iommu: Remove IOMMU_DEV_FEAT_SVA Date: Thu, 13 Mar 2025 13:19:47 +0800 Message-ID: <20250313051953.4064532-3-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313051953.4064532-1-baolu.lu@linux.intel.com> References: <20250313051953.4064532-1-baolu.lu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jason Gunthorpe None of the drivers implement anything here anymore, remove the dead code. Signed-off-by: Jason Gunthorpe Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Reviewed-by: Yi Liu Tested-by: Zhangfei Gao --- drivers/accel/amdxdna/aie2_pci.c | 13 ++----------- drivers/dma/idxd/init.c | 8 +------- drivers/iommu/amd/iommu.c | 2 -- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 2 -- drivers/iommu/intel/iommu.c | 6 ------ drivers/iommu/iommu-sva.c | 3 --- drivers/misc/uacce/uacce.c | 9 --------- include/linux/iommu.h | 9 +-------- 8 files changed, 4 insertions(+), 48 deletions(-) diff --git a/drivers/accel/amdxdna/aie2_pci.c b/drivers/accel/amdxdna/aie2_= pci.c index 5a058e565b01..c6cf7068d23c 100644 --- a/drivers/accel/amdxdna/aie2_pci.c +++ b/drivers/accel/amdxdna/aie2_pci.c @@ -512,12 +512,6 @@ static int aie2_init(struct amdxdna_dev *xdna) goto release_fw; } =20 - ret =3D iommu_dev_enable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA); - if (ret) { - XDNA_ERR(xdna, "Enable PASID failed, ret %d", ret); - goto free_irq; - } - psp_conf.fw_size =3D fw->size; psp_conf.fw_buf =3D fw->data; for (i =3D 0; i < PSP_MAX_REGS; i++) @@ -526,14 +520,14 @@ static int aie2_init(struct amdxdna_dev *xdna) if (!ndev->psp_hdl) { XDNA_ERR(xdna, "failed to create psp"); ret =3D -ENOMEM; - goto disable_sva; + goto free_irq; } xdna->dev_handle =3D ndev; =20 ret =3D aie2_hw_start(xdna); if (ret) { XDNA_ERR(xdna, "start npu failed, ret %d", ret); - goto disable_sva; + goto free_irq; } =20 ret =3D aie2_mgmt_fw_query(ndev); @@ -584,8 +578,6 @@ static int aie2_init(struct amdxdna_dev *xdna) aie2_error_async_events_free(ndev); stop_hw: aie2_hw_stop(xdna); -disable_sva: - iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA); free_irq: pci_free_irq_vectors(pdev); release_fw: @@ -601,7 +593,6 @@ static void aie2_fini(struct amdxdna_dev *xdna) =20 aie2_hw_stop(xdna); aie2_error_async_events_free(ndev); - iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA); pci_free_irq_vectors(pdev); } =20 diff --git a/drivers/dma/idxd/init.c b/drivers/dma/idxd/init.c index b946f78f85e1..1e5038cca22c 100644 --- a/drivers/dma/idxd/init.c +++ b/drivers/dma/idxd/init.c @@ -633,17 +633,11 @@ static int idxd_enable_sva(struct pci_dev *pdev) ret =3D iommu_dev_enable_feature(&pdev->dev, IOMMU_DEV_FEAT_IOPF); if (ret) return ret; - - ret =3D iommu_dev_enable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA); - if (ret) - iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_IOPF); - - return ret; + return 0; } =20 static void idxd_disable_sva(struct pci_dev *pdev) { - iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_SVA); iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_IOPF); } =20 diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 6e4fd6351646..25449a564804 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -2987,7 +2987,6 @@ static int amd_iommu_dev_enable_feature(struct device= *dev, =20 switch (feat) { case IOMMU_DEV_FEAT_IOPF: - case IOMMU_DEV_FEAT_SVA: break; default: ret =3D -EINVAL; @@ -3003,7 +3002,6 @@ static int amd_iommu_dev_disable_feature(struct devic= e *dev, =20 switch (feat) { case IOMMU_DEV_FEAT_IOPF: - case IOMMU_DEV_FEAT_SVA: break; default: ret =3D -EINVAL; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index a8b1b8b17992..60c8f1fa5bf0 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3630,7 +3630,6 @@ static int arm_smmu_dev_enable_feature(struct device = *dev, =20 switch (feat) { case IOMMU_DEV_FEAT_IOPF: - case IOMMU_DEV_FEAT_SVA: return 0; default: return -EINVAL; @@ -3647,7 +3646,6 @@ static int arm_smmu_dev_disable_feature(struct device= *dev, =20 switch (feat) { case IOMMU_DEV_FEAT_IOPF: - case IOMMU_DEV_FEAT_SVA: return 0; default: return -EINVAL; diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 85aa66ef4d61..8d557d04a273 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -3945,9 +3945,6 @@ intel_iommu_dev_enable_feat(struct device *dev, enum = iommu_dev_features feat) case IOMMU_DEV_FEAT_IOPF: return intel_iommu_enable_iopf(dev); =20 - case IOMMU_DEV_FEAT_SVA: - return 0; - default: return -ENODEV; } @@ -3961,9 +3958,6 @@ intel_iommu_dev_disable_feat(struct device *dev, enum= iommu_dev_features feat) intel_iommu_disable_iopf(dev); return 0; =20 - case IOMMU_DEV_FEAT_SVA: - return 0; - default: return -ENODEV; } diff --git a/drivers/iommu/iommu-sva.c b/drivers/iommu/iommu-sva.c index 503c5d23c1ea..331be2761a75 100644 --- a/drivers/iommu/iommu-sva.c +++ b/drivers/iommu/iommu-sva.c @@ -63,9 +63,6 @@ static struct iommu_mm_data *iommu_alloc_mm_data(struct m= m_struct *mm, struct de * reference is taken. Caller must call iommu_sva_unbind_device() * to release each reference. * - * iommu_dev_enable_feature(dev, IOMMU_DEV_FEAT_SVA) must be called first,= to - * initialize the required SVA features. - * * On error, returns an ERR_PTR value. */ struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_stru= ct *mm) diff --git a/drivers/misc/uacce/uacce.c b/drivers/misc/uacce/uacce.c index bdc2e6fda782..2a1db2abeeca 100644 --- a/drivers/misc/uacce/uacce.c +++ b/drivers/misc/uacce/uacce.c @@ -479,14 +479,6 @@ static unsigned int uacce_enable_sva(struct device *pa= rent, unsigned int flags) dev_err(parent, "failed to enable IOPF feature! ret =3D %pe\n", ERR_PTR(= ret)); return flags; } - - ret =3D iommu_dev_enable_feature(parent, IOMMU_DEV_FEAT_SVA); - if (ret) { - dev_err(parent, "failed to enable SVA feature! ret =3D %pe\n", ERR_PTR(r= et)); - iommu_dev_disable_feature(parent, IOMMU_DEV_FEAT_IOPF); - return flags; - } - return flags | UACCE_DEV_SVA; } =20 @@ -495,7 +487,6 @@ static void uacce_disable_sva(struct uacce_device *uacc= e) if (!(uacce->flags & UACCE_DEV_SVA)) return; =20 - iommu_dev_disable_feature(uacce->parent, IOMMU_DEV_FEAT_SVA); iommu_dev_disable_feature(uacce->parent, IOMMU_DEV_FEAT_IOPF); } =20 diff --git a/include/linux/iommu.h b/include/linux/iommu.h index cf8c16ba04a0..1308c8f85591 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -323,18 +323,11 @@ struct iommu_iort_rmr_data { =20 /** * enum iommu_dev_features - Per device IOMMU features - * @IOMMU_DEV_FEAT_SVA: Shared Virtual Addresses - * @IOMMU_DEV_FEAT_IOPF: I/O Page Faults such as PRI or Stall. Generally - * enabling %IOMMU_DEV_FEAT_SVA requires - * %IOMMU_DEV_FEAT_IOPF, but some devices manage I/O Page - * Faults themselves instead of relying on the IOMMU. When - * supported, this feature must be enabled before and - * disabled after %IOMMU_DEV_FEAT_SVA. + * @IOMMU_DEV_FEAT_IOPF: I/O Page Faults such as PRI or Stall. * * Device drivers enable a feature using iommu_dev_enable_feature(). */ enum iommu_dev_features { - IOMMU_DEV_FEAT_SVA, IOMMU_DEV_FEAT_IOPF, }; =20 --=20 2.43.0 From nobody Thu Dec 18 18:01:30 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3CD221FAC42 for ; Thu, 13 Mar 2025 05:19:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741843191; cv=none; b=RVl+4exjYJQ9g8nVrB0YMtJC5CoVdRQTe3NxkXgA2t9gk3tUX+j8wSCMuJTJP39y+csFc3IlIzZgwxIuuTSUadKixhv5ArHh+zG45qTFlUmtFaS8YfOsksxbHHwQ0Duu/okD7U5x722SF1Dtj1zhS7tJsgCGG3f0+Aic+9Vd0xg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741843191; c=relaxed/simple; bh=OsPnqn8stGVN29sdcgTKrocAvdCEyCUXSwHRlazMKIU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pVACzuJYnEC0xwFvieathhp7GJIzAdadJlM2K2gKnf7xMWdr/XdX9gg2jXudNdcAfRtLkgxnHQr8pvvExeOrG9knJrXkO9n5TwiblS/CJAPtcr3SslZcnEuLaI7X3YSGCpog/KVMr3jKrRAK5XUyoO9oc3N3CX1lTA/FNBTtyNo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=NxpgvRVb; arc=none smtp.client-ip=198.175.65.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="NxpgvRVb" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741843190; x=1773379190; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OsPnqn8stGVN29sdcgTKrocAvdCEyCUXSwHRlazMKIU=; b=NxpgvRVbHK85voxz/qkAj36ta6LQJYIk80FLnOtozp7BimXd3TAIieNF 8u1keT+MLS+PiOSgExd10urn/75NY8DiFVB0bPZb0WcV7IY25T5Ni7JX2 /CK7o5vrTobEmzT9B240hL7tEdcM3KnTxGqe9sn/NGVjmV9XmW4cxpS7v aMR1kxxuyNZ0mM2z+esB/wCS756eNNFFYosHchiLfxb9WGQck4Tw4ghL1 oH4j6m7q6ZJ4xBVMOOah6XJccV0EKSjdGtgvlAmw874Lc6E+8RaiAt9I7 dN9XH015W8j30VjxtocfgFAnKyM+ObD93HbOqYm8c6k4m/0P6XFvOAfOz Q==; X-CSE-ConnectionGUID: RTsIkwq7T7aFto2zdipUUw== X-CSE-MsgGUID: ffySrVCbS+arUX8LjPMSrA== X-IronPort-AV: E=McAfee;i="6700,10204,11371"; a="54323669" X-IronPort-AV: E=Sophos;i="6.14,243,1736841600"; d="scan'208";a="54323669" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2025 22:19:50 -0700 X-CSE-ConnectionGUID: y1YuBFcXTfaVWqqmGWYhRw== X-CSE-MsgGUID: Wd3EShg7RiqSyFxZQD0XAA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,243,1736841600"; d="scan'208";a="151807079" Received: from allen-box.sh.intel.com ([10.239.159.52]) by fmviesa001.fm.intel.com with ESMTP; 12 Mar 2025 22:19:47 -0700 From: Lu Baolu To: Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian Cc: Dave Jiang , Vinod Koul , Fenghua Yu , Zhangfei Gao , Zhou Wang , iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v4 3/8] iommu/vt-d: Put iopf enablement in domain attach path Date: Thu, 13 Mar 2025 13:19:48 +0800 Message-ID: <20250313051953.4064532-4-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313051953.4064532-1-baolu.lu@linux.intel.com> References: <20250313051953.4064532-1-baolu.lu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update iopf enablement in the driver to use the new method, similar to the arm-smmu-v3 driver. Enable iopf support when any domain with an iopf_handler is attached, and disable it when the domain is removed. Place all the logic for controlling the PRI and iopf queue in the domain set/remove/replace paths. Keep track of the number of domains set to the device and PASIDs that require iopf. When the first domain requiring iopf is attached, add the device to the iopf queue and enable PRI. When the last domain is removed, remove it from the iopf queue and disable PRI. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Tested-by: Zhangfei Gao Reviewed-by: Yi Liu --- drivers/iommu/intel/iommu.c | 42 ++++++++++++++++++++++++++++++------ drivers/iommu/intel/iommu.h | 33 ++++++++++++++++++++++++++++ drivers/iommu/intel/nested.c | 16 ++++++++++++-- drivers/iommu/intel/svm.c | 9 ++++++-- 4 files changed, 90 insertions(+), 10 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 8d557d04a273..227cbe7a66bc 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -3280,6 +3280,9 @@ void device_block_translation(struct device *dev) static int blocking_domain_attach_dev(struct iommu_domain *domain, struct device *dev) { + struct device_domain_info *info =3D dev_iommu_priv_get(dev); + + iopf_for_domain_remove(info->domain ? &info->domain->domain : NULL, dev); device_block_translation(dev); return 0; } @@ -3489,7 +3492,15 @@ static int intel_iommu_attach_device(struct iommu_do= main *domain, if (ret) return ret; =20 - return dmar_domain_attach_device(to_dmar_domain(domain), dev); + ret =3D iopf_for_domain_set(domain, dev); + if (ret) + return ret; + + ret =3D dmar_domain_attach_device(to_dmar_domain(domain), dev); + if (ret) + iopf_for_domain_remove(domain, dev); + + return ret; } =20 static int intel_iommu_map(struct iommu_domain *domain, @@ -3910,6 +3921,8 @@ int intel_iommu_enable_iopf(struct device *dev) if (!info->pri_enabled) return -ENODEV; =20 + /* pri_enabled is protected by the group mutex. */ + iommu_group_mutex_assert(dev); if (info->iopf_refcount) { info->iopf_refcount++; return 0; @@ -3932,6 +3945,7 @@ void intel_iommu_disable_iopf(struct device *dev) if (WARN_ON(!info->pri_enabled || !info->iopf_refcount)) return; =20 + iommu_group_mutex_assert(dev); if (--info->iopf_refcount) return; =20 @@ -3943,8 +3957,7 @@ intel_iommu_dev_enable_feat(struct device *dev, enum = iommu_dev_features feat) { switch (feat) { case IOMMU_DEV_FEAT_IOPF: - return intel_iommu_enable_iopf(dev); - + return 0; default: return -ENODEV; } @@ -3955,7 +3968,6 @@ intel_iommu_dev_disable_feat(struct device *dev, enum= iommu_dev_features feat) { switch (feat) { case IOMMU_DEV_FEAT_IOPF: - intel_iommu_disable_iopf(dev); return 0; =20 default: @@ -4036,6 +4048,7 @@ static int blocking_domain_set_dev_pasid(struct iommu= _domain *domain, { struct device_domain_info *info =3D dev_iommu_priv_get(dev); =20 + iopf_for_domain_remove(old, dev); intel_pasid_tear_down_entry(info->iommu, dev, pasid, false); domain_remove_dev_pasid(old, dev, pasid); =20 @@ -4109,6 +4122,10 @@ static int intel_iommu_set_dev_pasid(struct iommu_do= main *domain, if (IS_ERR(dev_pasid)) return PTR_ERR(dev_pasid); =20 + ret =3D iopf_for_domain_replace(domain, old, dev); + if (ret) + goto out_remove_dev_pasid; + if (dmar_domain->use_first_level) ret =3D domain_setup_first_level(iommu, dmar_domain, dev, pasid, old); @@ -4116,7 +4133,7 @@ static int intel_iommu_set_dev_pasid(struct iommu_dom= ain *domain, ret =3D domain_setup_second_level(iommu, dmar_domain, dev, pasid, old); if (ret) - goto out_remove_dev_pasid; + goto out_unwind_iopf; =20 domain_remove_dev_pasid(old, dev, pasid); =20 @@ -4124,6 +4141,8 @@ static int intel_iommu_set_dev_pasid(struct iommu_dom= ain *domain, =20 return 0; =20 +out_unwind_iopf: + iopf_for_domain_replace(old, domain, dev); out_remove_dev_pasid: domain_remove_dev_pasid(domain, dev, pasid); return ret; @@ -4338,6 +4357,11 @@ static int identity_domain_attach_dev(struct iommu_d= omain *domain, struct device if (dev_is_real_dma_subdevice(dev)) return 0; =20 + /* + * No PRI support with the global identity domain. No need to enable or + * disable PRI in this path as the iommu has been put in the blocking + * state. + */ if (sm_supported(iommu)) ret =3D intel_pasid_setup_pass_through(iommu, dev, IOMMU_NO_PASID); else @@ -4357,9 +4381,15 @@ static int identity_domain_set_dev_pasid(struct iomm= u_domain *domain, if (!pasid_supported(iommu) || dev_is_real_dma_subdevice(dev)) return -EOPNOTSUPP; =20 + ret =3D iopf_for_domain_replace(domain, old, dev); + if (ret) + return ret; + ret =3D domain_setup_passthrough(iommu, dev, pasid, old); - if (ret) + if (ret) { + iopf_for_domain_replace(old, domain, dev); return ret; + } =20 domain_remove_dev_pasid(old, dev, pasid); return 0; diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index c4916886da5a..02649eafcc24 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -1298,6 +1298,39 @@ void intel_iommu_drain_pasid_prq(struct device *dev,= u32 pasid); int intel_iommu_enable_iopf(struct device *dev); void intel_iommu_disable_iopf(struct device *dev); =20 +static inline int iopf_for_domain_set(struct iommu_domain *domain, + struct device *dev) +{ + if (!domain || !domain->iopf_handler) + return 0; + + return intel_iommu_enable_iopf(dev); +} + +static inline void iopf_for_domain_remove(struct iommu_domain *domain, + struct device *dev) +{ + if (!domain || !domain->iopf_handler) + return; + + intel_iommu_disable_iopf(dev); +} + +static inline int iopf_for_domain_replace(struct iommu_domain *new, + struct iommu_domain *old, + struct device *dev) +{ + int ret; + + ret =3D iopf_for_domain_set(new, dev); + if (ret) + return ret; + + iopf_for_domain_remove(old, dev); + + return 0; +} + #ifdef CONFIG_INTEL_IOMMU_SVM void intel_svm_check(struct intel_iommu *iommu); struct iommu_domain *intel_svm_domain_alloc(struct device *dev, diff --git a/drivers/iommu/intel/nested.c b/drivers/iommu/intel/nested.c index aba92c00b427..ad307248bcae 100644 --- a/drivers/iommu/intel/nested.c +++ b/drivers/iommu/intel/nested.c @@ -56,10 +56,14 @@ static int intel_nested_attach_dev(struct iommu_domain = *domain, if (ret) goto detach_iommu; =20 + ret =3D iopf_for_domain_set(domain, dev); + if (ret) + goto unassign_tag; + ret =3D intel_pasid_setup_nested(iommu, dev, IOMMU_NO_PASID, dmar_domain); if (ret) - goto unassign_tag; + goto disable_iopf; =20 info->domain =3D dmar_domain; spin_lock_irqsave(&dmar_domain->lock, flags); @@ -67,6 +71,8 @@ static int intel_nested_attach_dev(struct iommu_domain *d= omain, spin_unlock_irqrestore(&dmar_domain->lock, flags); =20 return 0; +disable_iopf: + iopf_for_domain_remove(domain, dev); unassign_tag: cache_tag_unassign_domain(dmar_domain, dev, IOMMU_NO_PASID); detach_iommu: @@ -166,14 +172,20 @@ static int intel_nested_set_dev_pasid(struct iommu_do= main *domain, if (IS_ERR(dev_pasid)) return PTR_ERR(dev_pasid); =20 - ret =3D domain_setup_nested(iommu, dmar_domain, dev, pasid, old); + ret =3D iopf_for_domain_replace(domain, old, dev); if (ret) goto out_remove_dev_pasid; =20 + ret =3D domain_setup_nested(iommu, dmar_domain, dev, pasid, old); + if (ret) + goto out_unwind_iopf; + domain_remove_dev_pasid(old, dev, pasid); =20 return 0; =20 +out_unwind_iopf: + iopf_for_domain_replace(old, domain, dev); out_remove_dev_pasid: domain_remove_dev_pasid(domain, dev, pasid); return ret; diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index ba93123cb4eb..f3da596410b5 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -164,18 +164,23 @@ static int intel_svm_set_dev_pasid(struct iommu_domai= n *domain, if (IS_ERR(dev_pasid)) return PTR_ERR(dev_pasid); =20 + ret =3D iopf_for_domain_replace(domain, old, dev); + if (ret) + goto out_remove_dev_pasid; + /* Setup the pasid table: */ sflags =3D cpu_feature_enabled(X86_FEATURE_LA57) ? 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Enable iopf support when any domain with an iopf_handler is attached, and disable it when the domain is removed. Add a refcount in the mock device state structure to keep track of the number of domains set to the device and PASIDs that require iopf. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian Tested-by: Zhangfei Gao Reviewed-by: Nicolin Chen Reviewed-by: Yi Liu --- drivers/iommu/iommufd/selftest.c | 64 ++++++++++++++++++++++++++------ 1 file changed, 53 insertions(+), 11 deletions(-) diff --git a/drivers/iommu/iommufd/selftest.c b/drivers/iommu/iommufd/selft= est.c index d40deb0a4f06..471af81e2617 100644 --- a/drivers/iommu/iommufd/selftest.c +++ b/drivers/iommu/iommufd/selftest.c @@ -58,6 +58,9 @@ enum { MOCK_PFN_HUGE_IOVA =3D _MOCK_PFN_START << 2, }; =20 +static int mock_dev_enable_iopf(struct device *dev, struct iommu_domain *d= omain); +static void mock_dev_disable_iopf(struct device *dev, struct iommu_domain = *domain); + /* * Syzkaller has trouble randomizing the correct iova to use since it is l= inked * to the map ioctl's output, and it has no ide about that. So, simplify t= hings. @@ -164,6 +167,8 @@ struct mock_dev { unsigned long flags; int id; u32 cache[MOCK_DEV_CACHE_NUM]; + unsigned int iopf_refcount; + struct iommu_domain *domain; }; =20 static inline struct mock_dev *to_mock_dev(struct device *dev) @@ -193,15 +198,34 @@ static int mock_domain_nop_attach(struct iommu_domain= *domain, struct device *dev) { struct mock_dev *mdev =3D to_mock_dev(dev); + int ret; =20 if (domain->dirty_ops && (mdev->flags & MOCK_FLAGS_DEVICE_NO_DIRTY)) return -EINVAL; =20 + ret =3D mock_dev_enable_iopf(dev, domain); + if (ret) + return ret; + + mock_dev_disable_iopf(dev, mdev->domain); + mdev->domain =3D domain; + + return 0; +} + +static int mock_domain_blocking_attach(struct iommu_domain *domain, + struct device *dev) +{ + struct mock_dev *mdev =3D to_mock_dev(dev); + + mock_dev_disable_iopf(dev, mdev->domain); + mdev->domain =3D NULL; + return 0; } =20 static const struct iommu_domain_ops mock_blocking_ops =3D { - .attach_dev =3D mock_domain_nop_attach, + .attach_dev =3D mock_domain_blocking_attach, }; =20 static struct iommu_domain mock_blocking_domain =3D { @@ -549,22 +573,42 @@ static void mock_domain_page_response(struct device *= dev, struct iopf_fault *evt { } =20 -static int mock_dev_enable_feat(struct device *dev, enum iommu_dev_feature= s feat) +static int mock_dev_enable_iopf(struct device *dev, struct iommu_domain *d= omain) { - if (feat !=3D IOMMU_DEV_FEAT_IOPF || !mock_iommu_iopf_queue) + struct mock_dev *mdev =3D to_mock_dev(dev); + int ret; + + if (!domain || !domain->iopf_handler) + return 0; + + if (!mock_iommu_iopf_queue) return -ENODEV; =20 - return iopf_queue_add_device(mock_iommu_iopf_queue, dev); + if (mdev->iopf_refcount) { + mdev->iopf_refcount++; + return 0; + } + + ret =3D iopf_queue_add_device(mock_iommu_iopf_queue, dev); + if (ret) + return ret; + + mdev->iopf_refcount =3D 1; + + return 0; } =20 -static int mock_dev_disable_feat(struct device *dev, enum iommu_dev_featur= es feat) +static void mock_dev_disable_iopf(struct device *dev, struct iommu_domain = *domain) { - if (feat !=3D IOMMU_DEV_FEAT_IOPF || !mock_iommu_iopf_queue) - return -ENODEV; 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a="54323701" X-IronPort-AV: E=Sophos;i="6.14,243,1736841600"; d="scan'208";a="54323701" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2025 22:19:57 -0700 X-CSE-ConnectionGUID: N88eXz2nQIGhPJGedYUqvA== X-CSE-MsgGUID: BFCPHzDPTFGKnG4kOxHY6g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,243,1736841600"; d="scan'208";a="151807128" Received: from allen-box.sh.intel.com ([10.239.159.52]) by fmviesa001.fm.intel.com with ESMTP; 12 Mar 2025 22:19:54 -0700 From: Lu Baolu To: Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian Cc: Dave Jiang , Vinod Koul , Fenghua Yu , Zhangfei Gao , Zhou Wang , iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Lu Baolu , Jason Gunthorpe Subject: [PATCH v4 5/8] dmaengine: idxd: Remove unnecessary IOMMU_DEV_FEAT_IOPF Date: Thu, 13 Mar 2025 13:19:50 +0800 Message-ID: <20250313051953.4064532-6-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313051953.4064532-1-baolu.lu@linux.intel.com> References: <20250313051953.4064532-1-baolu.lu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The IOMMU_DEV_FEAT_IOPF implementation in the iommu driver is just a no-op. It will also be removed from the iommu driver in the subsequent patch. Remove it to avoid dead code. Signed-off-by: Lu Baolu Acked-by: Vinod Koul Reviewed-by: Dave Jiang Reviewed-by: Fenghua Yu Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian Tested-by: Zhangfei Gao Reviewed-by: Yi Liu --- drivers/dma/idxd/init.c | 37 ++++++------------------------------- 1 file changed, 6 insertions(+), 31 deletions(-) diff --git a/drivers/dma/idxd/init.c b/drivers/dma/idxd/init.c index 1e5038cca22c..d44944195807 100644 --- a/drivers/dma/idxd/init.c +++ b/drivers/dma/idxd/init.c @@ -626,21 +626,6 @@ static void idxd_disable_system_pasid(struct idxd_devi= ce *idxd) idxd->pasid =3D IOMMU_PASID_INVALID; } =20 -static int idxd_enable_sva(struct pci_dev *pdev) -{ - int ret; - - ret =3D iommu_dev_enable_feature(&pdev->dev, IOMMU_DEV_FEAT_IOPF); - if (ret) - return ret; - return 0; -} - -static void idxd_disable_sva(struct pci_dev *pdev) -{ - iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_IOPF); -} - static int idxd_probe(struct idxd_device *idxd) { struct pci_dev *pdev =3D idxd->pdev; @@ -655,17 +640,13 @@ static int idxd_probe(struct idxd_device *idxd) dev_dbg(dev, "IDXD reset complete\n"); =20 if (IS_ENABLED(CONFIG_INTEL_IDXD_SVM) && sva) { - if (idxd_enable_sva(pdev)) { - dev_warn(dev, "Unable to turn on user SVA feature.\n"); - } else { - set_bit(IDXD_FLAG_USER_PASID_ENABLED, &idxd->flags); + set_bit(IDXD_FLAG_USER_PASID_ENABLED, &idxd->flags); =20 - rc =3D idxd_enable_system_pasid(idxd); - if (rc) - dev_warn(dev, "No in-kernel DMA with PASID. %d\n", rc); - else - set_bit(IDXD_FLAG_PASID_ENABLED, &idxd->flags); - } + rc =3D idxd_enable_system_pasid(idxd); + if (rc) + dev_warn(dev, "No in-kernel DMA with PASID. %d\n", rc); + else + set_bit(IDXD_FLAG_PASID_ENABLED, &idxd->flags); } else if (!sva) { dev_warn(dev, "User forced SVA off via module param.\n"); } @@ -703,8 +684,6 @@ static int idxd_probe(struct idxd_device *idxd) err: if (device_pasid_enabled(idxd)) idxd_disable_system_pasid(idxd); - if (device_user_pasid_enabled(idxd)) - idxd_disable_sva(pdev); return rc; } =20 @@ -715,8 +694,6 @@ static void idxd_cleanup(struct idxd_device *idxd) idxd_cleanup_internals(idxd); if (device_pasid_enabled(idxd)) idxd_disable_system_pasid(idxd); - if (device_user_pasid_enabled(idxd)) - idxd_disable_sva(idxd->pdev); } =20 /* @@ -1248,8 +1225,6 @@ static void idxd_remove(struct pci_dev *pdev) free_irq(irq_entry->vector, irq_entry); pci_free_irq_vectors(pdev); pci_iounmap(pdev, idxd->reg_base); - if (device_user_pasid_enabled(idxd)) - idxd_disable_sva(pdev); pci_disable_device(pdev); destroy_workqueue(idxd->wq); perfmon_pmu_remove(idxd); --=20 2.43.0 From nobody Thu Dec 18 18:01:30 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2FD861FBCBE for ; Thu, 13 Mar 2025 05:20:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741843201; cv=none; b=ObKMsI8Ta1jb0Drs3CCU13+f4ojmXBi7vAA0CVFG/DnPBDMDC7/FsQ6iNhzlNZlMDhmlb6F82rvPCy2lNnR1a+swft7JC0xCORv+20qHFJ8Zcfq0IvPtMDk08T+hdw04rauKi4+XgeiHNCBevEb2rSKMpznNgkkOjjoTTAMNR84= ARC-Message-Signature: i=1; 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d="scan'208";a="151807139" Received: from allen-box.sh.intel.com ([10.239.159.52]) by fmviesa001.fm.intel.com with ESMTP; 12 Mar 2025 22:19:57 -0700 From: Lu Baolu To: Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian Cc: Dave Jiang , Vinod Koul , Fenghua Yu , Zhangfei Gao , Zhou Wang , iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Lu Baolu , Jason Gunthorpe Subject: [PATCH v4 6/8] uacce: Remove unnecessary IOMMU_DEV_FEAT_IOPF Date: Thu, 13 Mar 2025 13:19:51 +0800 Message-ID: <20250313051953.4064532-7-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313051953.4064532-1-baolu.lu@linux.intel.com> References: <20250313051953.4064532-1-baolu.lu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" None of the drivers implement anything for IOMMU_DEV_FEAT_IOPF anymore, remove it to avoid dead code. Signed-off-by: Lu Baolu Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian Acked-by: Zhangfei Gao Tested-by: Zhangfei Gao --- drivers/misc/uacce/uacce.c | 31 ------------------------------- 1 file changed, 31 deletions(-) diff --git a/drivers/misc/uacce/uacce.c b/drivers/misc/uacce/uacce.c index 2a1db2abeeca..42e7d2a2a90c 100644 --- a/drivers/misc/uacce/uacce.c +++ b/drivers/misc/uacce/uacce.c @@ -465,31 +465,6 @@ static void uacce_release(struct device *dev) kfree(uacce); } =20 -static unsigned int uacce_enable_sva(struct device *parent, unsigned int f= lags) -{ - int ret; - - if (!(flags & UACCE_DEV_SVA)) - return flags; - - flags &=3D ~UACCE_DEV_SVA; - - ret =3D iommu_dev_enable_feature(parent, IOMMU_DEV_FEAT_IOPF); - if (ret) { - dev_err(parent, "failed to enable IOPF feature! ret =3D %pe\n", ERR_PTR(= ret)); - return flags; - } - return flags | UACCE_DEV_SVA; -} - -static void uacce_disable_sva(struct uacce_device *uacce) -{ - if (!(uacce->flags & UACCE_DEV_SVA)) - return; - - iommu_dev_disable_feature(uacce->parent, IOMMU_DEV_FEAT_IOPF); -} - /** * uacce_alloc() - alloc an accelerator * @parent: pointer of uacce parent device @@ -509,8 +484,6 @@ struct uacce_device *uacce_alloc(struct device *parent, if (!uacce) return ERR_PTR(-ENOMEM); =20 - flags =3D uacce_enable_sva(parent, flags); - uacce->parent =3D parent; uacce->flags =3D flags; uacce->ops =3D interface->ops; @@ -533,7 +506,6 @@ struct uacce_device *uacce_alloc(struct device *parent, return uacce; =20 err_with_uacce: - uacce_disable_sva(uacce); kfree(uacce); return ERR_PTR(ret); } @@ -596,9 +568,6 @@ void uacce_remove(struct uacce_device *uacce) unmap_mapping_range(q->mapping, 0, 0, 1); } =20 - /* disable sva now since no opened queues */ - uacce_disable_sva(uacce); - if (uacce->cdev) cdev_device_del(uacce->cdev, &uacce->dev); xa_erase(&uacce_xa, uacce->dev_id); --=20 2.43.0 From nobody Thu Dec 18 18:01:30 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB0FF1FBEA5 for ; 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charset="utf-8" The iopf enablement has been moved to the iommu drivers. It is unnecessary for iommufd to handle iopf enablement. Remove the iopf enablement logic to avoid duplication. Signed-off-by: Lu Baolu Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian Tested-by: Zhangfei Gao --- drivers/iommu/iommufd/device.c | 64 +++++++++++++------------ drivers/iommu/iommufd/fault.c | 45 ----------------- drivers/iommu/iommufd/iommufd_private.h | 5 -- 3 files changed, 33 insertions(+), 81 deletions(-) diff --git a/drivers/iommu/iommufd/device.c b/drivers/iommu/iommufd/device.c index 4e107f69f951..9c488680871f 100644 --- a/drivers/iommu/iommufd/device.c +++ b/drivers/iommu/iommufd/device.c @@ -6,6 +6,8 @@ #include #include #include +#include +#include =20 #include "../iommu-priv.h" #include "io_pagetable.h" @@ -216,7 +218,6 @@ struct iommufd_device *iommufd_device_bind(struct iommu= fd_ctx *ictx, refcount_inc(&idev->obj.users); /* igroup refcount moves into iommufd_device */ idev->igroup =3D igroup; - mutex_init(&idev->iopf_lock); =20 /* * If the caller fails after this success it must call @@ -471,6 +472,25 @@ iommufd_device_attach_reserved_iova(struct iommufd_dev= ice *idev, =20 /* The device attach/detach/replace helpers for attach_handle */ =20 +static bool iommufd_hwpt_compatible_device(struct iommufd_hw_pagetable *hw= pt, + struct iommufd_device *idev) +{ + struct pci_dev *pdev; + + if (!hwpt->fault || !dev_is_pci(idev->dev)) + return true; + + /* + * Once we turn on PCI/PRI support for VF, the response failure code + * should not be forwarded to the hardware due to PRI being a shared + * resource between PF and VFs. There is no coordination for this + * shared capability. This waits for a vPRI reset to recover. + */ + pdev =3D to_pci_dev(idev->dev); + + return (!pdev->is_virtfn || !pci_pri_supported(pdev)); +} + static int iommufd_hwpt_attach_device(struct iommufd_hw_pagetable *hwpt, struct iommufd_device *idev) { @@ -479,30 +499,22 @@ static int iommufd_hwpt_attach_device(struct iommufd_= hw_pagetable *hwpt, =20 lockdep_assert_held(&idev->igroup->lock); =20 + if (!iommufd_hwpt_compatible_device(hwpt, idev)) + return -EINVAL; + handle =3D kzalloc(sizeof(*handle), GFP_KERNEL); if (!handle) return -ENOMEM; =20 - if (hwpt->fault) { - rc =3D iommufd_fault_iopf_enable(idev); - if (rc) - goto out_free_handle; - } - handle->idev =3D idev; rc =3D iommu_attach_group_handle(hwpt->domain, idev->igroup->group, &handle->handle); - if (rc) - goto out_disable_iopf; + if (rc) { + kfree(handle); + return rc; + } =20 return 0; - -out_disable_iopf: - if (hwpt->fault) - iommufd_fault_iopf_disable(idev); -out_free_handle: - kfree(handle); - return rc; } =20 static struct iommufd_attach_handle * @@ -526,10 +538,8 @@ static void iommufd_hwpt_detach_device(struct iommufd_= hw_pagetable *hwpt, =20 handle =3D iommufd_device_get_attach_handle(idev); iommu_detach_group_handle(hwpt->domain, idev->igroup->group); - if (hwpt->fault) { + if (hwpt->fault) iommufd_auto_response_faults(hwpt, handle); - iommufd_fault_iopf_disable(idev); - } kfree(handle); } =20 @@ -541,34 +551,26 @@ static int iommufd_hwpt_replace_device(struct iommufd= _device *idev, iommufd_device_get_attach_handle(idev); int rc; =20 + if (!iommufd_hwpt_compatible_device(hwpt, idev)) + return -EINVAL; + handle =3D kzalloc(sizeof(*handle), GFP_KERNEL); if (!handle) return -ENOMEM; =20 - if (hwpt->fault && !old->fault) { - rc =3D iommufd_fault_iopf_enable(idev); - if (rc) - goto out_free_handle; - } - handle->idev =3D idev; rc =3D iommu_replace_group_handle(idev->igroup->group, hwpt->domain, &handle->handle); if (rc) - goto out_disable_iopf; + goto out_free_handle; =20 if (old->fault) { iommufd_auto_response_faults(hwpt, old_handle); - if (!hwpt->fault) - iommufd_fault_iopf_disable(idev); } kfree(old_handle); =20 return 0; =20 -out_disable_iopf: - if (hwpt->fault && !old->fault) - iommufd_fault_iopf_disable(idev); out_free_handle: kfree(handle); return rc; diff --git a/drivers/iommu/iommufd/fault.c b/drivers/iommu/iommufd/fault.c index c48d72c9668c..46f17eb20ee2 100644 --- a/drivers/iommu/iommufd/fault.c +++ b/drivers/iommu/iommufd/fault.c @@ -9,57 +9,12 @@ #include #include #include -#include -#include #include #include =20 #include "../iommu-priv.h" #include "iommufd_private.h" =20 -int iommufd_fault_iopf_enable(struct iommufd_device *idev) -{ - struct device *dev =3D idev->dev; - int ret; - - /* - * Once we turn on PCI/PRI support for VF, the response failure code - * should not be forwarded to the hardware due to PRI being a shared - * resource between PF and VFs. There is no coordination for this - * shared capability. This waits for a vPRI reset to recover. - */ - if (dev_is_pci(dev)) { - struct pci_dev *pdev =3D to_pci_dev(dev); - - if (pdev->is_virtfn && pci_pri_supported(pdev)) - return -EINVAL; - } - - mutex_lock(&idev->iopf_lock); - /* Device iopf has already been on. */ - if (++idev->iopf_enabled > 1) { - mutex_unlock(&idev->iopf_lock); - return 0; - } - - ret =3D iommu_dev_enable_feature(dev, IOMMU_DEV_FEAT_IOPF); - if (ret) - --idev->iopf_enabled; - mutex_unlock(&idev->iopf_lock); - - return ret; -} - -void iommufd_fault_iopf_disable(struct iommufd_device *idev) -{ - mutex_lock(&idev->iopf_lock); - if (!WARN_ON(idev->iopf_enabled =3D=3D 0)) { - if (--idev->iopf_enabled =3D=3D 0) - iommu_dev_disable_feature(idev->dev, IOMMU_DEV_FEAT_IOPF); - } - mutex_unlock(&idev->iopf_lock); -} - void iommufd_auto_response_faults(struct iommufd_hw_pagetable *hwpt, struct iommufd_attach_handle *handle) { diff --git a/drivers/iommu/iommufd/iommufd_private.h b/drivers/iommu/iommuf= d/iommufd_private.h index 246297452a44..dcab49f79e7a 100644 --- a/drivers/iommu/iommufd/iommufd_private.h +++ b/drivers/iommu/iommufd/iommufd_private.h @@ -420,9 +420,6 @@ struct iommufd_device { /* always the physical device */ struct device *dev; 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d="scan'208";a="54323748" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2025 22:20:07 -0700 X-CSE-ConnectionGUID: a+i5FHz+TmKFiFhPsszcaQ== X-CSE-MsgGUID: VrHdXNiWSbaDe1zlTmr0Bg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,243,1736841600"; d="scan'208";a="151807188" Received: from allen-box.sh.intel.com ([10.239.159.52]) by fmviesa001.fm.intel.com with ESMTP; 12 Mar 2025 22:20:04 -0700 From: Lu Baolu To: Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian Cc: Dave Jiang , Vinod Koul , Fenghua Yu , Zhangfei Gao , Zhou Wang , iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Lu Baolu , Jason Gunthorpe Subject: [PATCH v4 8/8] iommu: Remove iommu_dev_enable/disable_feature() Date: Thu, 13 Mar 2025 13:19:53 +0800 Message-ID: <20250313051953.4064532-9-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250313051953.4064532-1-baolu.lu@linux.intel.com> References: <20250313051953.4064532-1-baolu.lu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" No external drivers use these interfaces anymore. Furthermore, no existing iommu drivers implement anything in the callbacks. Remove them to avoid dead code. Signed-off-by: Lu Baolu Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian Tested-by: Zhangfei Gao --- drivers/iommu/amd/iommu.c | 32 ------------------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 34 --------------------- drivers/iommu/intel/iommu.c | 25 --------------- drivers/iommu/iommu.c | 32 ------------------- include/linux/iommu.h | 28 ----------------- 5 files changed, 151 deletions(-) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 25449a564804..16892bff1eaa 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -2980,36 +2980,6 @@ static const struct iommu_dirty_ops amd_dirty_ops = =3D { .read_and_clear_dirty =3D amd_iommu_read_and_clear_dirty, }; =20 -static int amd_iommu_dev_enable_feature(struct device *dev, - enum iommu_dev_features feat) -{ - int ret =3D 0; - - switch (feat) { - case IOMMU_DEV_FEAT_IOPF: - break; - default: - ret =3D -EINVAL; - break; - } - return ret; -} - -static int amd_iommu_dev_disable_feature(struct device *dev, - enum iommu_dev_features feat) -{ - int ret =3D 0; - - switch (feat) { - case IOMMU_DEV_FEAT_IOPF: - break; - default: - ret =3D -EINVAL; - break; - } - return ret; -} - const struct iommu_ops amd_iommu_ops =3D { .capable =3D amd_iommu_capable, .blocked_domain =3D &blocked_domain, @@ -3023,8 +2993,6 @@ const struct iommu_ops amd_iommu_ops =3D { .get_resv_regions =3D amd_iommu_get_resv_regions, .is_attach_deferred =3D amd_iommu_is_attach_deferred, .def_domain_type =3D amd_iommu_def_domain_type, - .dev_enable_feat =3D amd_iommu_dev_enable_feature, - .dev_disable_feat =3D amd_iommu_dev_disable_feature, .page_response =3D amd_iommu_page_response, .default_domain_ops =3D &(const struct iommu_domain_ops) { .attach_dev =3D amd_iommu_attach_device, diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 60c8f1fa5bf0..fc6943b2665a 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3620,38 +3620,6 @@ static void arm_smmu_get_resv_regions(struct device = *dev, iommu_dma_get_resv_regions(dev, head); } =20 -static int arm_smmu_dev_enable_feature(struct device *dev, - enum iommu_dev_features feat) -{ - struct arm_smmu_master *master =3D dev_iommu_priv_get(dev); - - if (!master) - return -ENODEV; - - switch (feat) { - case IOMMU_DEV_FEAT_IOPF: - return 0; - default: - return -EINVAL; - } -} - -static int arm_smmu_dev_disable_feature(struct device *dev, - enum iommu_dev_features feat) -{ - struct arm_smmu_master *master =3D dev_iommu_priv_get(dev); - - if (!master) - return -EINVAL; - - switch (feat) { - case IOMMU_DEV_FEAT_IOPF: - return 0; - default: - return -EINVAL; - } -} - /* * HiSilicon PCIe tune and trace device can be used to trace TLP headers o= n the * PCIe link and save the data to memory by DMA. The hardware is restricte= d to @@ -3684,8 +3652,6 @@ static struct iommu_ops arm_smmu_ops =3D { .device_group =3D arm_smmu_device_group, .of_xlate =3D arm_smmu_of_xlate, .get_resv_regions =3D arm_smmu_get_resv_regions, - .dev_enable_feat =3D arm_smmu_dev_enable_feature, - .dev_disable_feat =3D arm_smmu_dev_disable_feature, .page_response =3D arm_smmu_page_response, .def_domain_type =3D arm_smmu_def_domain_type, .viommu_alloc =3D arm_vsmmu_alloc, diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 227cbe7a66bc..9f14195e7781 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -3952,29 +3952,6 @@ void intel_iommu_disable_iopf(struct device *dev) iopf_queue_remove_device(iommu->iopf_queue, dev); } =20 -static int -intel_iommu_dev_enable_feat(struct device *dev, enum iommu_dev_features fe= at) -{ - switch (feat) { - case IOMMU_DEV_FEAT_IOPF: - return 0; - default: - return -ENODEV; - } -} - -static int -intel_iommu_dev_disable_feat(struct device *dev, enum iommu_dev_features f= eat) -{ - switch (feat) { - case IOMMU_DEV_FEAT_IOPF: - return 0; - - default: - return -ENODEV; - } -} - static bool intel_iommu_is_attach_deferred(struct device *dev) { struct device_domain_info *info =3D dev_iommu_priv_get(dev); @@ -4416,8 +4393,6 @@ const struct iommu_ops intel_iommu_ops =3D { .release_device =3D intel_iommu_release_device, .get_resv_regions =3D intel_iommu_get_resv_regions, .device_group =3D intel_iommu_device_group, - .dev_enable_feat =3D intel_iommu_dev_enable_feat, - .dev_disable_feat =3D intel_iommu_dev_disable_feat, .is_attach_deferred =3D intel_iommu_is_attach_deferred, .def_domain_type =3D device_def_domain_type, .pgsize_bitmap =3D SZ_4K, diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index c283721579b3..f3e70b146826 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -2884,38 +2884,6 @@ int iommu_fwspec_add_ids(struct device *dev, const u= 32 *ids, int num_ids) } EXPORT_SYMBOL_GPL(iommu_fwspec_add_ids); =20 -/* - * Per device IOMMU features. - */ -int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f= eat) -{ - if (dev_has_iommu(dev)) { - const struct iommu_ops *ops =3D dev_iommu_ops(dev); - - if (ops->dev_enable_feat) - return ops->dev_enable_feat(dev, feat); - } - - return -ENODEV; -} -EXPORT_SYMBOL_GPL(iommu_dev_enable_feature); - -/* - * The device drivers should do the necessary cleanups before calling this. - */ -int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features = feat) -{ - if (dev_has_iommu(dev)) { - const struct iommu_ops *ops =3D dev_iommu_ops(dev); - - if (ops->dev_disable_feat) - return ops->dev_disable_feat(dev, feat); - } - - return -EBUSY; -} -EXPORT_SYMBOL_GPL(iommu_dev_disable_feature); - /** * iommu_setup_default_domain - Set the default_domain for the group * @group: Group to change diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 1308c8f85591..e6c21e15c74f 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -321,16 +321,6 @@ struct iommu_iort_rmr_data { u32 num_sids; }; =20 -/** - * enum iommu_dev_features - Per device IOMMU features - * @IOMMU_DEV_FEAT_IOPF: I/O Page Faults such as PRI or Stall. - * - * Device drivers enable a feature using iommu_dev_enable_feature(). - */ -enum iommu_dev_features { - IOMMU_DEV_FEAT_IOPF, -}; - #define IOMMU_NO_PASID (0U) /* Reserved for DMA w/o PASID */ #define IOMMU_FIRST_GLOBAL_PASID (1U) /*starting range for allocation */ #define IOMMU_PASID_INVALID (-1U) @@ -650,9 +640,6 @@ struct iommu_ops { bool (*is_attach_deferred)(struct device *dev); =20 /* Per device IOMMU features */ - int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f); - int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f); - void (*page_response)(struct device *dev, struct iopf_fault *evt, struct iommu_page_response *msg); =20 @@ -1121,9 +1108,6 @@ void dev_iommu_priv_set(struct device *dev, void *pri= v); extern struct mutex iommu_probe_device_lock; int iommu_probe_device(struct device *dev); =20 -int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f= ); -int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features = f); - int iommu_device_use_default_domain(struct device *dev); void iommu_device_unuse_default_domain(struct device *dev); =20 @@ -1408,18 +1392,6 @@ static inline int iommu_fwspec_add_ids(struct device= *dev, u32 *ids, return -ENODEV; } =20 -static inline int -iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features feat) -{ - return -ENODEV; -} - -static inline int -iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features feat) -{ - return -ENODEV; -} - static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev) { return NULL; --=20 2.43.0