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Peter Anvin" , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v2 19/20] tools/x86/kcpuid: Update bitfields to x86-cpuid-db v2.3 Date: Wed, 12 Mar 2025 15:37:36 +0100 Message-ID: <20250312143738.458507-20-darwi@linutronix.de> In-Reply-To: <20250312143738.458507-1-darwi@linutronix.de> References: <20250312143738.458507-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update kcpuid's CSV file to version 2.3, as generated by x86-cpuid-db. Summary of the v2.3 changes: * Per H. Peter Anvin's feedback, leaf 0x3 is not unique to Transmeta as the CSV file earlier claimed. Since leaf 0x3's format differs between Intel and Transmeta, and the project does not yet support having the same CPUID bitfield with varying interpretations across vendors, leaf 0x3 is removed for now. Given that Intel discontinued support for PSN from Pentium 4 onward, and Linux force disables it on early boot for privacy concerns, this should have minimal impact. * Leaf 0x80000021: Make bitfield IDs and descriptions coherent with each other. Remove "_support" from bitfield IDs, as no other leaf has such convention. Reported-by: "H. Peter Anvin" Closes: https://lkml.kernel.org/r/C7684E03-36E0-4D58-B6F0-78F4DB82D737@zyto= r.com Signed-off-by: Ahmed S. Darwish Link: https://gitlab.com/x86-cpuid.org/x86-cpuid-db/-/blob/v2.3/CHANGELOG.r= st --- tools/arch/x86/kcpuid/cpuid.csv | 30 +++++++++++------------------- 1 file changed, 11 insertions(+), 19 deletions(-) diff --git a/tools/arch/x86/kcpuid/cpuid.csv b/tools/arch/x86/kcpuid/cpuid.= csv index 9613e09cbfb3..8d25b0b49f3b 100644 --- a/tools/arch/x86/kcpuid/cpuid.csv +++ b/tools/arch/x86/kcpuid/cpuid.csv @@ -1,5 +1,5 @@ # SPDX-License-Identifier: CC0-1.0 -# Generator: x86-cpuid-db v2.2 +# Generator: x86-cpuid-db v2.3 =20 # # Auto-generated file. @@ -116,14 +116,6 @@ 0x2, 0, edx, 30:24, desc15 , Descript= or #15 0x2, 0, edx, 31, edx_invalid , Descript= ors 12-15 are invalid if set =20 -# Leaf 3H -# Transmeta Processor Serial Number (PSN) - - 0x3, 0, eax, 31:0, cpu_psn_0 , Processo= r Serial Number bytes 0 - 3 - 0x3, 0, ebx, 31:0, cpu_psn_1 , Processo= r Serial Number bytes 4 - 7 - 0x3, 0, ecx, 31:0, cpu_psn_2 , Processo= r Serial Number bytes 8 - 11 - 0x3, 0, edx, 31:0, cpu_psn_3 , Processo= r Serial Number bytes 12 - 15 - # Leaf 4H # Intel deterministic cache parameters =20 @@ -1020,20 +1012,20 @@ 0x80000021, 0, eax, 0, no_nested_data_bp , No neste= d data breakpoints 0x80000021, 0, eax, 1, fsgs_non_serializing , WRMSR to= {FS,GS,KERNEL_GS}_BASE is non-serializing 0x80000021, 0, eax, 2, lfence_rdtsc , LFENCE a= lways serializing / synchronizes RDTSC -0x80000021, 0, eax, 3, smm_page_cfg_lock , SMM pagi= ng configuration lock is supported +0x80000021, 0, eax, 3, smm_page_cfg_lock , SMM pagi= ng configuration lock 0x80000021, 0, eax, 6, null_sel_clr_base , Null sel= ector clears base -0x80000021, 0, eax, 7, upper_addr_ignore , EFER MSR= Upper Address Ignore Enable bit supported -0x80000021, 0, eax, 8, autoibrs , EFER MSR= Automatic IBRS enable bit supported -0x80000021, 0, eax, 9, no_smm_ctl_msr , SMM_CTL = MSR (0xc0010116) is not present -0x80000021, 0, eax, 10, fsrs_supported , Fast Sho= rt Rep STOSB (FSRS) is supported -0x80000021, 0, eax, 11, fsrc_supported , Fast Sho= rt Rep CMPSB (FSRC) is supported -0x80000021, 0, eax, 13, prefetch_ctl_msr , Prefetch= control MSR is supported +0x80000021, 0, eax, 7, upper_addr_ignore , EFER MSR= Upper Address Ignore +0x80000021, 0, eax, 8, autoibrs , EFER MSR= Automatic IBRS +0x80000021, 0, eax, 9, no_smm_ctl_msr , SMM_CTL = MSR (0xc0010116) is not available +0x80000021, 0, eax, 10, fsrs , Fast Sho= rt Rep STOSB +0x80000021, 0, eax, 11, fsrc , Fast Sho= rt Rep CMPSB +0x80000021, 0, eax, 13, prefetch_ctl_msr , Prefetch= control MSR is available 0x80000021, 0, eax, 16, opcode_reclaim , Reserves= opcode space 0x80000021, 0, eax, 17, user_cpuid_disable , #GP when= executing CPUID at CPL > 0 is supported -0x80000021, 0, eax, 18, epsf_supported , Enhanced= Predictive Store Forwarding (EPSF) is supported +0x80000021, 0, eax, 18, epsf , Enhanced= Predictive Store Forwarding 0x80000021, 0, eax, 22, wl_feedback , Workload= -based heuristic feedback to OS -0x80000021, 0, eax, 24, eraps_support , Enhanced= Return Address Predictor Security -0x80000021, 0, eax, 27, sbpb , Support = for the Selective Branch Predictor Barrier +0x80000021, 0, eax, 24, eraps , Enhanced= Return Address Predictor Security +0x80000021, 0, eax, 27, sbpb , Selectiv= e Branch Predictor Barrier 0x80000021, 0, eax, 28, ibpb_brtype , Branch p= redictions flushed from CPU branch predictor 0x80000021, 0, eax, 29, srso_no , CPU is n= ot subject to the SRSO vulnerability 0x80000021, 0, eax, 30, srso_uk_no , CPU is n= ot vulnerable to SRSO at user-kernel boundary --=20 2.48.1