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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2025 09:54:22.3670 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a3ad9894-b4ba-452c-6a00-08dd614bdd97 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F3D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8036 Content-Type: text/plain; charset="utf-8" AXI 1G/2.5G Ethernet subsystem supports 1G and 2.5G speeds. Modify existing binding description, pcs-handle description and add 2500base-x in phy-mode for 2500base-X only configuration. Signed-off-by: Suraj Gupta --- .../devicetree/bindings/net/xlnx,axi-ethernet.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml b= /Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml index fb02e579463c..977f55b98f31 100644 --- a/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml +++ b/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml @@ -9,10 +9,12 @@ title: AXI 1G/2.5G Ethernet Subsystem description: | Also called AXI 1G/2.5G Ethernet Subsystem, the xilinx axi ethernet IP = core provides connectivity to an external ethernet PHY supporting different - interfaces: MII, GMII, RGMII, SGMII, 1000BaseX. It also includes two + interfaces: MII, GMII, RGMII, SGMII, 1000BaseX and 2500BaseX. It also in= cludes two segments of memory for buffering TX and RX, as well as the capability of offloading TX/RX checksum calculation off the processor. =20 + AXI 2.5G MAC is incremental speed upgrade of AXI 1G and supports 2.5G sp= eed. + Management configuration is done through the AXI interface, while payloa= d is sent and received through means of an AXI DMA controller. This driver includes the DMA driver code, so this driver is incompatible with AXI DMA @@ -62,6 +64,7 @@ properties: - rgmii - sgmii - 1000base-x + - 2500base-x =20 xlnx,phy-type: description: @@ -118,8 +121,8 @@ properties: type: object =20 pcs-handle: - description: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X - modes, where "pcs-handle" should be used to point to the PCS/PMA PHY, + description: Phandle to the internal PCS/PMA PHY in SGMII or 1000base-= x/ + 2500base-x modes, where "pcs-handle" should be used to point to the = PCS/PMA PHY, and "phy-handle" should point to an external PHY if exists. maxItems: 1 =20 --=20 2.25.1