From nobody Wed Dec 17 23:33:51 2025 Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8FD4422422D for ; Tue, 11 Mar 2025 07:51:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.190 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741679517; cv=none; b=EVTV9Ha/jUe+b9pQdVHXcX/tqtNUZmCiErf8fpWIyi7VaOAv4+SVY1ccIeJCyL9gE2xVE0O0HICQ7hivsHF2zFRH6DgARkJexqxLULipTKiSqLlDslrMOxL6BDJsGEtQtX100LcXYJ3hWawgrC+iHcqMXux5Ozvx/XnfCCsAVB4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741679517; c=relaxed/simple; bh=d9Vux/Bh223fkL9NJtsGZZSK4kmK6Mjfi0SOofbOVM8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=W8DcAWPzIJbxSbk+dWDAe4zNAE2ElpAkIIgzr1KUhQadsnhkfVctCyrQc2IggjR9iMU7p7p+Gl0LBdJVp7VhfXJnmRY8yFNJX63donOx3ANeOK0NxFOGGD+ZuKTgIAYtd0OdJGPELjmeOiHWM+ar4QjtJbJEqW/3yp+mhY8aEf0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.190 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.163.17]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4ZBm7g0hW8z2RTQn; Tue, 11 Mar 2025 15:47:27 +0800 (CST) Received: from kwepemd200014.china.huawei.com (unknown [7.221.188.8]) by mail.maildlp.com (Postfix) with ESMTPS id 392321A0188; Tue, 11 Mar 2025 15:51:47 +0800 (CST) Received: from localhost.localdomain (10.50.165.33) by kwepemd200014.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.34; Tue, 11 Mar 2025 15:51:46 +0800 From: Yicong Yang To: , , , , , , , , , , , CC: , , , , , , , , , , , , , Subject: [PATCH v12 1/4] cpu/SMT: Provide a default topology_is_primary_thread() Date: Tue, 11 Mar 2025 15:51:40 +0800 Message-ID: <20250311075143.61078-2-yangyicong@huawei.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20250311075143.61078-1-yangyicong@huawei.com> References: <20250311075143.61078-1-yangyicong@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To kwepemd200014.china.huawei.com (7.221.188.8) Content-Type: text/plain; charset="utf-8" From: Yicong Yang Currently if architectures want to support HOTPLUG_SMT they need to provide a topology_is_primary_thread() telling the framework which thread in the SMT cannot offline. However arm64 doesn't have a restriction on which thread in the SMT cannot offline, a simplest choice is that just make 1st thread as the "primary" thread. So just make this as the default implementation in the framework and let architectures like x86 that have special primary thread to override this function (which they've already done). There's no need to provide a stub function if !CONFIG_SMP or !CONFIG_HOTPLUG_SMT. In such case the testing CPU is already the 1st CPU in the SMT so it's always the primary thread. Reviewed-by: Jonathan Cameron Reviewed-by: Pierre Gondois Reviewed-by: Dietmar Eggemann Signed-off-by: Yicong Yang Reviewed-by: Sudeep Holla --- Pre questioned in v9 [1] whether this works on architectures not using CONFIG_GENERIC_ARCH_TOPOLOGY, See [2] for demonstration hacking on LoongArch VM and this also works. Architectures should use this on their own situatio= n. [1] https://lore.kernel.org/linux-arm-kernel/427bd639-33c3-47e4-9e83-68c428= eb1a7d@arm.com/ [2] https://lore.kernel.org/linux-arm-kernel/a5690fee-3019-f26c-8bad-1d95e3= 88e877@huawei.com/ arch/powerpc/include/asm/topology.h | 1 + arch/x86/include/asm/topology.h | 2 +- include/linux/topology.h | 24 ++++++++++++++++++++++++ 3 files changed, 26 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm= /topology.h index 16bacfe8c7a2..da15b5efe807 100644 --- a/arch/powerpc/include/asm/topology.h +++ b/arch/powerpc/include/asm/topology.h @@ -152,6 +152,7 @@ static inline bool topology_is_primary_thread(unsigned = int cpu) { return cpu =3D=3D cpu_first_thread_sibling(cpu); } +#define topology_is_primary_thread topology_is_primary_thread =20 static inline bool topology_smt_thread_allowed(unsigned int cpu) { diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topolog= y.h index ec134b719144..6c79ee7c0957 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -229,11 +229,11 @@ static inline bool topology_is_primary_thread(unsigne= d int cpu) { return cpumask_test_cpu(cpu, cpu_primary_thread_mask); } +#define topology_is_primary_thread topology_is_primary_thread =20 #else /* CONFIG_SMP */ static inline int topology_phys_to_logical_pkg(unsigned int pkg) { return = 0; } static inline int topology_max_smt_threads(void) { return 1; } -static inline bool topology_is_primary_thread(unsigned int cpu) { return t= rue; } static inline unsigned int topology_amd_nodes_per_pkg(void) { return 1; } #endif /* !CONFIG_SMP */ =20 diff --git a/include/linux/topology.h b/include/linux/topology.h index 52f5850730b3..6ae995e18ff5 100644 --- a/include/linux/topology.h +++ b/include/linux/topology.h @@ -240,6 +240,30 @@ static inline const struct cpumask *cpu_smt_mask(int c= pu) } #endif =20 +#ifndef topology_is_primary_thread + +#define topology_is_primary_thread topology_is_primary_thread + +static inline bool topology_is_primary_thread(unsigned int cpu) +{ + /* + * When disabling SMT the primary thread of the SMT will remain + * enabled/active. Architectures do have a special primary thread + * (e.g. x86) needs to override this function. Otherwise can make + * the first thread in the SMT as the primary thread. + * + * The sibling cpumask of an offline CPU contains always the CPU + * itself for architectures using the implementation of + * CONFIG_GENERIC_ARCH_TOPOLOGY for building their topology. + * Other architectures not using CONFIG_GENERIC_ARCH_TOPOLOGY for + * building their topology have to check whether to use this default + * implementation or to override it. + */ + return cpu =3D=3D cpumask_first(topology_sibling_cpumask(cpu)); +} + +#endif + static inline const struct cpumask *cpu_cpu_mask(int cpu) { return cpumask_of_node(cpu_to_node(cpu)); --=20 2.24.0 From nobody Wed Dec 17 23:33:51 2025 Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8FCE022422A for ; Tue, 11 Mar 2025 07:51:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.190 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741679517; cv=none; b=WD9aPVaCfCcpa5DMSjzGyBd5X5jO/iqffKPAIQDjfp9i8frW8oJ4ZnpQpCX68cnwRN3rOmr/AgpcoQBax5V4qAD9st3FXH0EPUfxX+bxpbVVjijpf7xjrZh8Sdr3ra8UgXrsWdugjd5ddA6RS6qIsh/9E2mHUxdxOCKSvK8Lj0s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741679517; c=relaxed/simple; bh=LTw3sIdttClMYJDhuYcNqZcDUZWinADAyvvfY7o3kng=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Wm6eXfv2Hwmme0iwn+/mObKKNKCN0jaC2SVkanvMtJDpeuebP4dc4ODRXU16t0yHpcgbd2NThzhhM2JX1PNxiLrFEgaIXgrYXVUYHn79W7O5AYNYDjUDUcae5Gs3yhQ+Bf6P/3Bep68wVlkwAn1aHEJ+5TrnBFZzHErxkKbwqAE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.190 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.163.44]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4ZBm7h0CXBz2RTR0; Tue, 11 Mar 2025 15:47:28 +0800 (CST) Received: from kwepemd200014.china.huawei.com (unknown [7.221.188.8]) by mail.maildlp.com (Postfix) with ESMTPS id 27B0F1402CD; Tue, 11 Mar 2025 15:51:48 +0800 (CST) Received: from localhost.localdomain (10.50.165.33) by kwepemd200014.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.34; Tue, 11 Mar 2025 15:51:47 +0800 From: Yicong Yang To: , , , , , , , , , , , CC: , , , , , , , , , , , , , Subject: [PATCH v12 2/4] arch_topology: Support SMT control for OF based system Date: Tue, 11 Mar 2025 15:51:41 +0800 Message-ID: <20250311075143.61078-3-yangyicong@huawei.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20250311075143.61078-1-yangyicong@huawei.com> References: <20250311075143.61078-1-yangyicong@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To kwepemd200014.china.huawei.com (7.221.188.8) Content-Type: text/plain; charset="utf-8" From: Yicong Yang On building the topology from the devicetree, we've already gotten the SMT thread number of each core. Update the largest SMT thread number and enable the SMT control by the end of topology parsing. The framework's SMT control provides two interface to the users [1] through /sys/devices/system/cpu/smt/control: 1) enable SMT by writing "on" and disable by "off" 2) enable SMT by writing max_thread_number or disable by writing 1 Both method support to completely disable/enable the SMT cores so both work correctly for symmetric SMT platform and asymmetric platform with non-SMT and one type SMT cores like: core A: 1 thread core B: X (X!=3D1) threads Note that for a theoretically possible multiple SMT-X (X>1) core platform the SMT control is also supported as expected but only by writing the "on/off" method. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree= /Documentation/ABI/testing/sysfs-devices-system-cpu#n542 Reviewed-by: Pierre Gondois Reviewed-by: Dietmar Eggemann Signed-off-by: Yicong Yang Reviewed-by: Jonathan Cameron Reviewed-by: Sudeep Holla --- drivers/base/arch_topology.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c index 3ebe77566788..d409d323ee64 100644 --- a/drivers/base/arch_topology.c +++ b/drivers/base/arch_topology.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -506,6 +507,10 @@ core_initcall(free_raw_capacity); #endif =20 #if defined(CONFIG_ARM64) || defined(CONFIG_RISCV) + +/* Used to enable the SMT control */ +static unsigned int max_smt_thread_num =3D 1; + /* * This function returns the logic cpu number of the node. * There are basically three kinds of return values: @@ -565,6 +570,8 @@ static int __init parse_core(struct device_node *core, = int package_id, i++; } while (1); =20 + max_smt_thread_num =3D max_t(unsigned int, max_smt_thread_num, i); + cpu =3D get_cpu_for_node(core); if (cpu >=3D 0) { if (!leaf) { @@ -677,6 +684,17 @@ static int __init parse_socket(struct device_node *soc= ket) if (!has_socket) ret =3D parse_cluster(socket, 0, -1, 0); =20 + /* + * Reset the max_smt_thread_num to 1 on failure. Since on failure + * we need to notify the framework the SMT is not supported, but + * max_smt_thread_num can be initialized to the SMT thread number + * of the cores which are successfully parsed. + */ + if (ret) + max_smt_thread_num =3D 1; + + cpu_smt_set_num_threads(max_smt_thread_num, max_smt_thread_num); + return ret; } =20 --=20 2.24.0 From nobody Wed Dec 17 23:33:51 2025 Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 15E8C2080FD for ; Tue, 11 Mar 2025 07:51:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.190 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741679519; cv=none; b=JG4D8M16jouarnq1tewg/AmngGaeayVOCqY8arBou4DY8ncdNkPYY6UeUiC30okL3mb9SGawDEKZBy7SzJs79/+csNQ8gTG6Ed42dO5bm5Q0mXM+eywBZ8U8SjXgnCGE3U3ewAxSsaiArUNRXuV73B3plZj8XjnFNxwperTGgdA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741679519; c=relaxed/simple; bh=BXK3yehrsqWCGkas2gsjRMArJef9kBM/ITAA6ky7ts8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=O1zpSI74+nAub0FPeI9LioQEUR17DSfb3r2k0zveRzs8fhUlcerc8c61q9H8pDz8xxhMyxFciKp24cgK48l5cHf8bPnclzbB4oeIcnItzXKKhowXIYNlB0XOx0/umLRdDLzJMUWJkRyaLJ2hOmFCZMxukRs8Z6M2JKmh3p35Pvg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.190 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.88.214]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4ZBm925Zzzz2CcCX; Tue, 11 Mar 2025 15:48:38 +0800 (CST) Received: from kwepemd200014.china.huawei.com (unknown [7.221.188.8]) by mail.maildlp.com (Postfix) with ESMTPS id 17A571A016C; Tue, 11 Mar 2025 15:51:49 +0800 (CST) Received: from localhost.localdomain (10.50.165.33) by kwepemd200014.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.34; Tue, 11 Mar 2025 15:51:47 +0800 From: Yicong Yang To: , , , , , , , , , , , CC: , , , , , , , , , , , , , Subject: [PATCH v12 3/4] arm64: topology: Support SMT control on ACPI based system Date: Tue, 11 Mar 2025 15:51:42 +0800 Message-ID: <20250311075143.61078-4-yangyicong@huawei.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20250311075143.61078-1-yangyicong@huawei.com> References: <20250311075143.61078-1-yangyicong@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To kwepemd200014.china.huawei.com (7.221.188.8) Content-Type: text/plain; charset="utf-8" From: Yicong Yang For ACPI we'll build the topology from PPTT and we cannot directly get the SMT number of each core. Instead using a temporary xarray to record the heterogeneous information (from ACPI_PPTT_ACPI_IDENTICAL) and SMT information of the first core in its heterogeneous CPU cluster when building the topology. Then we can know the largest SMT number in the system. If a homogeneous system's using ACPI 6.2 or later, all the CPUs should be under the root node of PPTT. There'll be only one entry in the xarray and all the CPUs in the system will be assumed identical. The framework's SMT control provides two interface to the users [1] through /sys/devices/system/cpu/smt/control: 1) enable SMT by writing "on" and disable by "off" 2) enable SMT by writing max_thread_number or disable by writing 1 Both method support to completely disable/enable the SMT cores so both work correctly for symmetric SMT platform and asymmetric platform with non-SMT and one type SMT cores like: core A: 1 thread core B: X (X!=3D1) threads Note that for a theoretically possible multiple SMT-X (X>1) core platform the SMT control is also supported as expected but only by writing the "on/off" method. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree= /Documentation/ABI/testing/sysfs-devices-system-cpu#n542 Reviewed-by: Jonathan Cameron Reviewed-by: Hanjun Guo Reviewed-by: Pierre Gondois Reviewed-by: Dietmar Eggemann Signed-off-by: Yicong Yang Reviewed-by: Sudeep Holla --- arch/arm64/kernel/topology.c | 54 ++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c index cb180684d10d..0bcea4f89ea8 100644 --- a/arch/arm64/kernel/topology.c +++ b/arch/arm64/kernel/topology.c @@ -15,8 +15,10 @@ #include #include #include +#include #include #include +#include =20 #include #include @@ -37,17 +39,28 @@ static bool __init acpi_cpu_is_threaded(int cpu) return !!is_threaded; } =20 +struct cpu_smt_info { + unsigned int thread_num; + int core_id; +}; + /* * Propagate the topology information of the processor_topology_node tree = to the * cpu_topology array. */ int __init parse_acpi_topology(void) { + unsigned int max_smt_thread_num =3D 1; + struct cpu_smt_info *entry; + struct xarray hetero_cpu; + unsigned long hetero_id; int cpu, topology_id; =20 if (acpi_disabled) return 0; =20 + xa_init(&hetero_cpu); + for_each_possible_cpu(cpu) { topology_id =3D find_acpi_cpu_topology(cpu, 0); if (topology_id < 0) @@ -57,6 +70,34 @@ int __init parse_acpi_topology(void) cpu_topology[cpu].thread_id =3D topology_id; topology_id =3D find_acpi_cpu_topology(cpu, 1); cpu_topology[cpu].core_id =3D topology_id; + + /* + * In the PPTT, CPUs below a node with the 'identical + * implementation' flag have the same number of threads. + * Count the number of threads for only one CPU (i.e. + * one core_id) among those with the same hetero_id. + * See the comment of find_acpi_cpu_topology_hetero_id() + * for more details. + * + * One entry is created for each node having: + * - the 'identical implementation' flag + * - its parent not having the flag + */ + hetero_id =3D find_acpi_cpu_topology_hetero_id(cpu); + entry =3D xa_load(&hetero_cpu, hetero_id); + if (!entry) { + entry =3D kzalloc(sizeof(*entry), GFP_KERNEL); + WARN_ON_ONCE(!entry); + + if (entry) { + entry->core_id =3D topology_id; + entry->thread_num =3D 1; + xa_store(&hetero_cpu, hetero_id, + entry, GFP_KERNEL); + } + } else if (entry->core_id =3D=3D topology_id) { + entry->thread_num++; + } } else { cpu_topology[cpu].thread_id =3D -1; cpu_topology[cpu].core_id =3D topology_id; @@ -67,6 +108,19 @@ int __init parse_acpi_topology(void) cpu_topology[cpu].package_id =3D topology_id; } =20 + /* + * This is a short loop since the number of XArray elements is the + * number of heterogeneous CPU clusters. On a homogeneous system + * there's only one entry in the XArray. + */ + xa_for_each(&hetero_cpu, hetero_id, entry) { + max_smt_thread_num =3D max(max_smt_thread_num, entry->thread_num); + xa_erase(&hetero_cpu, hetero_id); + kfree(entry); + } + + cpu_smt_set_num_threads(max_smt_thread_num, max_smt_thread_num); + xa_destroy(&hetero_cpu); return 0; } #endif --=20 2.24.0 From nobody Wed Dec 17 23:33:51 2025 Received: from szxga05-in.huawei.com (szxga05-in.huawei.com [45.249.212.191]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3C5E225A31 for ; Tue, 11 Mar 2025 07:51:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.191 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741679521; cv=none; b=GQHWIeCaC5Dz6cY+LcHOUiGma5nOblCnHjfhm+06oIt2ofPvxmNBEn0oA6sTu0cEc0rZg6VIIAK8VcMX5VamYiSqPP68NKdYYIpfBhiLw7JKn4st+Y7p2L9zXUejl6sdtvRNwtzBI0jpfFGBqRojxHpM5dFGpnruwBFUom1erdg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741679521; c=relaxed/simple; bh=aWcjSk5WjyGune3zDqpWr2kG8EqYv6U3hMSupvMIVUw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=fVX7yYZXxj/OHfkLIOGrfo9JcBOXCb76exIHplh6kqQKQVaIP7krrUKLVmexKc8HJzPiYbHpcIhjp3YgtPrmjboT/+EqAYgwzwwF49YvdOQCLkDqAD+aA5yhxUBEvM9bGOnCEkcR9EiFuWflZVJnfQYBfCim1oPH1RPYW0UC1Yg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.191 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.163.17]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4ZBmBn2YZDz1R6GT; Tue, 11 Mar 2025 15:50:09 +0800 (CST) Received: from kwepemd200014.china.huawei.com (unknown [7.221.188.8]) by mail.maildlp.com (Postfix) with ESMTPS id 03DF31A0188; Tue, 11 Mar 2025 15:51:50 +0800 (CST) Received: from localhost.localdomain (10.50.165.33) by kwepemd200014.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.34; Tue, 11 Mar 2025 15:51:48 +0800 From: Yicong Yang To: , , , , , , , , , , , CC: , , , , , , , , , , , , , Subject: [PATCH v12 4/4] arm64: Kconfig: Enable HOTPLUG_SMT Date: Tue, 11 Mar 2025 15:51:43 +0800 Message-ID: <20250311075143.61078-5-yangyicong@huawei.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20250311075143.61078-1-yangyicong@huawei.com> References: <20250311075143.61078-1-yangyicong@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To kwepemd200014.china.huawei.com (7.221.188.8) Content-Type: text/plain; charset="utf-8" From: Yicong Yang Enable HOTPLUG_SMT for SMT control. Reviewed-by: Jonathan Cameron Reviewed-by: Pierre Gondois Reviewed-by: Dietmar Eggemann Signed-off-by: Yicong Yang Reviewed-by: Sudeep Holla --- arch/arm64/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 940343beb3d4..65fe00b1922c 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -250,6 +250,7 @@ config ARM64 select HAVE_KRETPROBES select HAVE_GENERIC_VDSO select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU + select HOTPLUG_SMT if HOTPLUG_CPU select IRQ_DOMAIN select IRQ_FORCED_THREADING select KASAN_VMALLOC if KASAN --=20 2.24.0