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Peter Anvin" CC: , Brendan Jackman , Derek Manwaring Subject: [PATCH v4 11/36] x86/bugs: Restructure spectre_v2_user mitigation Date: Mon, 10 Mar 2025 11:39:58 -0500 Message-ID: <20250310164023.779191-12-david.kaplan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250310164023.779191-1-david.kaplan@amd.com> References: <20250310164023.779191-1-david.kaplan@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00022574:EE_|BY5PR12MB4212:EE_ X-MS-Office365-Filtering-Correlation-Id: 2c674fcc-51a5-4db0-724b-08dd5ff24e73 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|82310400026|376014|7416014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?dMiTzv6Dxc/lDuFmdlM9z0woA5B8lH/jIcq0uv0W7VdYYSsc9MHdmNn3zink?= =?us-ascii?Q?qcEt8gYxdHdonP1ysUBccxgai3kV1oYIF3glL5f3pcFXSEPWDxmpiGdemw6s?= =?us-ascii?Q?M4iACEC34i1HfqjhwzFTI27GzHtsRoghfSpaJGBuuzUXpE3Rq2w2HthqgAoD?= =?us-ascii?Q?dm1uOGfeY/WO0Qi/xi+PDGgRXZNZf2ZTunag/LrF6qpF7N1UcyQGNYmbdsbn?= =?us-ascii?Q?XrRXAfUnsCVm4ILg2oNSisRF0rAOK+tdJW9PSWTpPcasuvrhtGr09M1TqkUv?= =?us-ascii?Q?UU4c4bcqtUbEIpSJIvGgpTJfSIjAnViYPYEeofU69upvSvM6YhVxIydDyZGd?= =?us-ascii?Q?QUf4W/HS70aaCdQDeojoPL1lpNV/oD5FGViVo42IFl4kSFm/bo5b3q7NwBop?= =?us-ascii?Q?vHq9hAjXpKIRsr7vS7KuykD84WsmZb11yL/UFFoyXrQ3lzmVxlgNajs4wfkT?= =?us-ascii?Q?ImlBKYCWErl626dRLS9eSZaAXuGo9s8wCXv5zUbzg7XB5FrftJwf4PZfHHUg?= =?us-ascii?Q?bfyuh3TIqULfch3yqoqz+jppGFeYmJh+W/eQLdNvNYAocU/TF7agd2tnA32s?= =?us-ascii?Q?6qOeBKSWXitO4Xxh3ZKXFL4h7DKZP9ZE5gEvquh/DTYlCLhii7mEsTyqo0/H?= =?us-ascii?Q?5+FNlj5QDM7riU94SKjqqq15Pzo01yQGZixEG435SG/kDZGeiT17jHOTgID5?= =?us-ascii?Q?sWnj31Cx7V85KnVRFRoqlwgWq1SEhGpsbcAnd3TCTJquJiciVQPDKGcuyqEh?= =?us-ascii?Q?RbKnVi8fva67IJFRPOVgj8pT5hVLXyon9+L5G5B9zWdf4D4HjGCtk4CTQnai?= =?us-ascii?Q?/BJlBOUA83Ss92FI2MTYeW6QVJHUhQGcgvnfv4H//Pz9FSkCH2sD8qlG2Mvy?= =?us-ascii?Q?1I7GvIV7pqLc/VPHyG0dM0Ldi0nTY9SURuKZmujVdkPzuPLIJ4f8UN+DR3zB?= =?us-ascii?Q?BcC3gW5K40Z6cNtBX5+EM7mF/5AP5TU1c8K+a24NOo3rxM/TpeLCsY+xoXQV?= =?us-ascii?Q?O1ne04OlJvOiV3ACH2/Rqv2+Yj3BCsMWNVPzsBmtpX4lB9GTdmb6W7n8DXx1?= =?us-ascii?Q?RbO6oUL/4lAKi33o8X7tonfXSHFTVLCSAnYKrlOyPGyXtby7Rvn0J7rBpnH2?= =?us-ascii?Q?ubGE4gX9Aawnr2U1DPBj4dxwQa0LNWKWavX34NnZeCCVdAa8k30B5Su863n6?= =?us-ascii?Q?tyUz+q3hakFWnnwc9EZmkpcUfqTfe6VTZwWcN0L3qSZkicMXiiYKrB5FdZ1l?= =?us-ascii?Q?fWJBFefpbhBH45sLhAf4Dp9whmUU3r571PpQXeapRLJ7PjMg3ot8lyWV/o8w?= =?us-ascii?Q?3AQeEvlw4qt/lKBSzrX1aIejQHQXFGml3GyHyoL0M/RU1nCfI7X2lH6YnEO0?= =?us-ascii?Q?pe756qc4yY9DG2rRujpAoRobrHZgG3Qny4UPc1Slixy70NK8WuAUdABFl6Ha?= =?us-ascii?Q?q2vEdN8kADjDQQjRmnnJ+ZwxxC89VsREwFqSoOYSmsoZ7bZWexTSVxs/8ERW?= =?us-ascii?Q?59WRZqFZlZKvYD8=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014)(7416014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Mar 2025 16:40:45.8922 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2c674fcc-51a5-4db0-724b-08dd5ff24e73 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022574.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4212 Content-Type: text/plain; charset="utf-8" Restructure spectre_v2_user to use select/update/apply functions to create consistent vulnerability handling. The ibpb/stibp choices are first decided based on the spectre_v2_user command line but can be modified by the spectre_v2 command line option as well. Signed-off-by: David Kaplan --- arch/x86/kernel/cpu/bugs.c | 152 +++++++++++++++++++++---------------- 1 file changed, 85 insertions(+), 67 deletions(-) diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index 80b554249d85..623a3a3d3008 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -60,6 +60,8 @@ static void __init retbleed_select_mitigation(void); static void __init retbleed_update_mitigation(void); static void __init retbleed_apply_mitigation(void); static void __init spectre_v2_user_select_mitigation(void); +static void __init spectre_v2_user_update_mitigation(void); +static void __init spectre_v2_user_apply_mitigation(void); static void __init ssb_select_mitigation(void); static void __init l1tf_select_mitigation(void); static void __init mds_select_mitigation(void); @@ -187,11 +189,6 @@ void __init cpu_select_mitigations(void) spectre_v1_select_mitigation(); spectre_v2_select_mitigation(); retbleed_select_mitigation(); - /* - * spectre_v2_user_select_mitigation() relies on the state set by - * retbleed_select_mitigation(); specifically the STIBP selection is - * forced for UNRET or IBPB. - */ spectre_v2_user_select_mitigation(); ssb_select_mitigation(); l1tf_select_mitigation(); @@ -214,6 +211,8 @@ void __init cpu_select_mitigations(void) * choices. */ retbleed_update_mitigation(); + /* spectre_v2_user_update_mitigation() depends on retbleed_mitigation */ + spectre_v2_user_update_mitigation(); mds_update_mitigation(); taa_update_mitigation(); mmio_update_mitigation(); @@ -221,6 +220,7 @@ void __init cpu_select_mitigations(void) =20 spectre_v1_apply_mitigation(); retbleed_apply_mitigation(); + spectre_v2_user_apply_mitigation(); mds_apply_mitigation(); taa_apply_mitigation(); mmio_apply_mitigation(); @@ -1365,6 +1365,8 @@ enum spectre_v2_mitigation_cmd { SPECTRE_V2_CMD_IBRS, }; =20 +static enum spectre_v2_mitigation_cmd spectre_v2_cmd __ro_after_init =3D S= PECTRE_V2_CMD_AUTO; + enum spectre_v2_user_cmd { SPECTRE_V2_USER_CMD_NONE, SPECTRE_V2_USER_CMD_AUTO, @@ -1403,31 +1405,19 @@ static void __init spec_v2_user_print_cond(const ch= ar *reason, bool secure) pr_info("spectre_v2_user=3D%s forced on command line.\n", reason); } =20 -static __ro_after_init enum spectre_v2_mitigation_cmd spectre_v2_cmd; - static enum spectre_v2_user_cmd __init spectre_v2_parse_user_cmdline(void) { - enum spectre_v2_user_cmd mode; char arg[20]; int ret, i; =20 - mode =3D IS_ENABLED(CONFIG_MITIGATION_SPECTRE_V2) ? - SPECTRE_V2_USER_CMD_AUTO : SPECTRE_V2_USER_CMD_NONE; - - switch (spectre_v2_cmd) { - case SPECTRE_V2_CMD_NONE: + if (cpu_mitigations_off() || !IS_ENABLED(CONFIG_MITIGATION_SPECTRE_V2)) return SPECTRE_V2_USER_CMD_NONE; - case SPECTRE_V2_CMD_FORCE: - return SPECTRE_V2_USER_CMD_FORCE; - default: - break; - } =20 ret =3D cmdline_find_option(boot_command_line, "spectre_v2_user", arg, sizeof(arg)); if (ret < 0) - return mode; + return SPECTRE_V2_USER_CMD_AUTO; =20 for (i =3D 0; i < ARRAY_SIZE(v2_user_options); i++) { if (match_option(arg, ret, v2_user_options[i].option)) { @@ -1438,7 +1428,7 @@ spectre_v2_parse_user_cmdline(void) } =20 pr_err("Unknown user space protection option (%s). Switching to default\n= ", arg); - return mode; + return SPECTRE_V2_USER_CMD_AUTO; } =20 static inline bool spectre_v2_in_ibrs_mode(enum spectre_v2_mitigation mode) @@ -1446,10 +1436,10 @@ static inline bool spectre_v2_in_ibrs_mode(enum spe= ctre_v2_mitigation mode) return spectre_v2_in_eibrs_mode(mode) || mode =3D=3D SPECTRE_V2_IBRS; } =20 + static void __init spectre_v2_user_select_mitigation(void) { - enum spectre_v2_user_mitigation mode =3D SPECTRE_V2_USER_NONE; enum spectre_v2_user_cmd cmd; =20 if (!boot_cpu_has(X86_FEATURE_IBPB) && !boot_cpu_has(X86_FEATURE_STIBP)) @@ -1458,48 +1448,61 @@ spectre_v2_user_select_mitigation(void) cmd =3D spectre_v2_parse_user_cmdline(); switch (cmd) { case SPECTRE_V2_USER_CMD_NONE: - goto set_mode; + return; case SPECTRE_V2_USER_CMD_FORCE: - mode =3D SPECTRE_V2_USER_STRICT; + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_STRICT; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_STRICT; break; case SPECTRE_V2_USER_CMD_AUTO: case SPECTRE_V2_USER_CMD_PRCTL: + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_PRCTL; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_PRCTL; + break; case SPECTRE_V2_USER_CMD_PRCTL_IBPB: - mode =3D SPECTRE_V2_USER_PRCTL; + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_STRICT; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_PRCTL; break; case SPECTRE_V2_USER_CMD_SECCOMP: - case SPECTRE_V2_USER_CMD_SECCOMP_IBPB: if (IS_ENABLED(CONFIG_SECCOMP)) - mode =3D SPECTRE_V2_USER_SECCOMP; + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_SECCOMP; else - mode =3D SPECTRE_V2_USER_PRCTL; + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_PRCTL; + spectre_v2_user_stibp =3D spectre_v2_user_ibpb; + break; + case SPECTRE_V2_USER_CMD_SECCOMP_IBPB: + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_STRICT; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_PRCTL; break; } =20 - /* Initialize Indirect Branch Prediction Barrier */ - if (boot_cpu_has(X86_FEATURE_IBPB)) { - static_branch_enable(&switch_vcpu_ibpb); + /* + * At this point, an STIBP mode other than "off" has been set. + * If STIBP support is not being forced, check if STIBP always-on + * is preferred. + */ + if (spectre_v2_user_stibp !=3D SPECTRE_V2_USER_STRICT && + boot_cpu_has(X86_FEATURE_AMD_STIBP_ALWAYS_ON)) + spectre_v2_user_stibp =3D SPECTRE_V2_USER_STRICT_PREFERRED; +} =20 - spectre_v2_user_ibpb =3D mode; - switch (cmd) { - case SPECTRE_V2_USER_CMD_NONE: - break; - case SPECTRE_V2_USER_CMD_FORCE: - case SPECTRE_V2_USER_CMD_PRCTL_IBPB: - case SPECTRE_V2_USER_CMD_SECCOMP_IBPB: - static_branch_enable(&switch_mm_always_ibpb); - spectre_v2_user_ibpb =3D SPECTRE_V2_USER_STRICT; - break; - case SPECTRE_V2_USER_CMD_PRCTL: - case SPECTRE_V2_USER_CMD_AUTO: - case SPECTRE_V2_USER_CMD_SECCOMP: - static_branch_enable(&switch_mm_cond_ibpb); - break; - } +static void __init spectre_v2_user_update_mitigation(void) +{ + bool smt_possible =3D IS_ENABLED(CONFIG_SMP); =20 - pr_info("mitigation: Enabling %s Indirect Branch Prediction Barrier\n", - static_key_enabled(&switch_mm_always_ibpb) ? - "always-on" : "conditional"); + if (!boot_cpu_has(X86_FEATURE_IBPB) && !boot_cpu_has(X86_FEATURE_STIBP)) + return; + + if (cpu_smt_control =3D=3D CPU_SMT_FORCE_DISABLED || + cpu_smt_control =3D=3D CPU_SMT_NOT_SUPPORTED) + smt_possible =3D false; + + /* The spectre_v2 cmd line can override spectre_v2_user options */ + if (spectre_v2_cmd =3D=3D SPECTRE_V2_CMD_NONE) { + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_NONE; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_NONE; + } else if (spectre_v2_cmd =3D=3D SPECTRE_V2_CMD_FORCE) { + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_STRICT; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_STRICT; } =20 /* @@ -1517,30 +1520,45 @@ spectre_v2_user_select_mitigation(void) if (!boot_cpu_has(X86_FEATURE_STIBP) || !cpu_smt_possible() || (spectre_v2_in_eibrs_mode(spectre_v2_enabled) && - !boot_cpu_has(X86_FEATURE_AUTOIBRS))) + !boot_cpu_has(X86_FEATURE_AUTOIBRS))) { + spectre_v2_user_stibp =3D SPECTRE_V2_USER_NONE; return; + } =20 - /* - * At this point, an STIBP mode other than "off" has been set. - * If STIBP support is not being forced, check if STIBP always-on - * is preferred. - */ - if (mode !=3D SPECTRE_V2_USER_STRICT && - boot_cpu_has(X86_FEATURE_AMD_STIBP_ALWAYS_ON)) - mode =3D SPECTRE_V2_USER_STRICT_PREFERRED; - - if (retbleed_mitigation =3D=3D RETBLEED_MITIGATION_UNRET || - retbleed_mitigation =3D=3D RETBLEED_MITIGATION_IBPB) { - if (mode !=3D SPECTRE_V2_USER_STRICT && - mode !=3D SPECTRE_V2_USER_STRICT_PREFERRED) + if (spectre_v2_user_stibp !=3D SPECTRE_V2_USER_NONE && + (retbleed_mitigation =3D=3D RETBLEED_MITIGATION_UNRET || + retbleed_mitigation =3D=3D RETBLEED_MITIGATION_IBPB)) { + if (spectre_v2_user_stibp !=3D SPECTRE_V2_USER_STRICT && + spectre_v2_user_stibp !=3D SPECTRE_V2_USER_STRICT_PREFERRED) pr_info("Selecting STIBP always-on mode to complement retbleed mitigati= on\n"); - mode =3D SPECTRE_V2_USER_STRICT_PREFERRED; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_STRICT_PREFERRED; } + pr_info("%s\n", spectre_v2_user_strings[spectre_v2_user_stibp]); +} =20 - spectre_v2_user_stibp =3D mode; +static void __init spectre_v2_user_apply_mitigation(void) +{ + /* Initialize Indirect Branch Prediction Barrier */ + if (boot_cpu_has(X86_FEATURE_IBPB) && + spectre_v2_user_ibpb !=3D SPECTRE_V2_USER_NONE) { + static_branch_enable(&switch_vcpu_ibpb); =20 -set_mode: - pr_info("%s\n", spectre_v2_user_strings[mode]); + switch (spectre_v2_user_ibpb) { + case SPECTRE_V2_USER_STRICT: + static_branch_enable(&switch_mm_always_ibpb); + break; + case SPECTRE_V2_USER_PRCTL: + case SPECTRE_V2_USER_SECCOMP: + static_branch_enable(&switch_mm_cond_ibpb); + break; + default: + break; + } + + pr_info("mitigation: Enabling %s Indirect Branch Prediction Barrier\n", + static_key_enabled(&switch_mm_always_ibpb) ? + "always-on" : "conditional"); + } } =20 static const char * const spectre_v2_strings[] =3D { --=20 2.34.1