From nobody Tue Feb 10 17:08:54 2026 Received: from smtp.forwardemail.net (smtp.forwardemail.net [149.28.215.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB7C2221DAB for ; Sun, 9 Mar 2025 23:27:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=149.28.215.223 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741562824; cv=none; b=VcZaYsZwT1f4LGfrmpYbGS3c31cnj8s/E2XsLw6IsDSN7M/b5TVY07z1A94IxrNPS8E20PnpQfu/d+Uh/SmqQUwzPI+3QkB/BEXvDlBfG3lzaMKCK8adjlmIZKOIyW5PjJnh8qv+T1r6WWkf67jhqbCSKKZYvsQ7mYKAr206iaE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741562824; c=relaxed/simple; bh=iU34nURrJ0nfFoR++yWAIoQ4ECPtS2Fypg27n1wyEts=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IzcpXSBnkOqDF5Dfi7Vy7ERVqREC2uCpe+5f7/pMZWS7ZB7DdKSQopOordMhIq+RMDApPfTGtmIIsDHsbuYaULzhkmXwDhqHlNdHiQJ8X75vx528isTdqmmlLehPq+O1YJqZuGv6UEhrJE3bbsp2aki/YIPpPF83gYkWOAvPFgs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=tipZntGF; arc=none smtp.client-ip=149.28.215.223 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="tipZntGF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1741562822; bh=KanAfDw+UyOaqtRYsPqpRbqdHPNczgiApRuHgmm7F4E=; b=tipZntGFD9MYFT7ubTQU+CqIETlHU+t4nZIALIHQBE1u7W4n/S6sVTXQzuI1nBtYZyfPx+014 rrYq3YVfvOK0umq5CiWloSNjHh0fi3jbs4RqUUANYQmPr4SK5Xiy4HXZfn5pJSZ3N+q7BegtbUq QCdmOWr6+oMr+3T5bVhEdP8TjW6z+ZagOpRrzI09qAz9wwmr+XRnIkfuyXN6l0Gasvqdvnw3HfY /nErv9Lu9K3aVek+JgVHG03hNnm7Gh5kfHEfqItqlR3fP47ZIOR8cGFUoWIfbfnq67twwsTJUzG iFBlEgQNXTvMslqSRM2HCurw4EvTMjSOxfjQ1YqZS4Ig== X-Forward-Email-ID: 67ce23bc5209992d7c670edc X-Forward-Email-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-Forward-Email-Version: 0.4.40 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Philipp Zabel Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Wu , Yao Zi , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman , linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v2 5/5] net: stmmac: dwmac-rk: Add initial support for RK3528 integrated PHY Date: Sun, 9 Mar 2025 23:26:15 +0000 Message-ID: <20250309232622.1498084-6-jonas@kwiboo.se> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250309232622.1498084-1-jonas@kwiboo.se> References: <20250309232622.1498084-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Rockchip RK3528 (and RV1106) has a different integrated PHY compared to the integrated PHY on RK3228/RK3328. Current powerup/down operation is not compatible with the integrated PHY found in these newer SoCs. Add operations to powerup/down the integrated PHY found in RK3528. Use helpers that can be used by other GMAC variants in the future. Signed-off-by: Jonas Karlman --- Changes in v2: - New patch This is enough to power up the integrated PHY on RK3528 for MDIO/MII. However, a PHY driver is still missing and I do not have any RK3528 board that make use of this MAC and PHY, so something that can be improved upon in the future. --- .../net/ethernet/stmicro/stmmac/dwmac-rk.c | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/e= thernet/stmicro/stmmac/dwmac-rk.c index 3f096b3ccee8..ab2c872d33e0 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -134,6 +134,35 @@ static void rk_gmac_integrated_ephy_powerdown(struct r= k_priv_data *priv) reset_control_assert(priv->phy_reset); } =20 +#define RK_FEPHY_SHUTDOWN GRF_BIT(1) +#define RK_FEPHY_POWERUP GRF_CLR_BIT(1) +#define RK_FEPHY_INTERNAL_RMII_SEL GRF_BIT(6) +#define RK_FEPHY_24M_CLK_SEL (GRF_BIT(8) | GRF_BIT(9)) +#define RK_FEPHY_PHY_ID GRF_BIT(11) + +static void rk_gmac_integrated_fephy_powerup(struct rk_priv_data *priv, + unsigned int reg) +{ + reset_control_assert(priv->phy_reset); + usleep_range(20, 30); + + regmap_write(priv->grf, reg, + RK_FEPHY_POWERUP | + RK_FEPHY_INTERNAL_RMII_SEL | + RK_FEPHY_24M_CLK_SEL | + RK_FEPHY_PHY_ID); + usleep_range(10000, 12000); + + reset_control_deassert(priv->phy_reset); + usleep_range(50000, 60000); +} + +static void rk_gmac_integrated_fephy_powerdown(struct rk_priv_data *priv, + unsigned int reg) +{ + regmap_write(priv->grf, reg, RK_FEPHY_SHUTDOWN); +} + #define PX30_GRF_GMAC_CON1 0x0904 =20 /* PX30_GRF_GMAC_CON1 */ @@ -993,12 +1022,24 @@ static void rk3528_set_clock_selection(struct rk_pri= v_data *bsp_priv, } } =20 +static void rk3528_integrated_phy_powerup(struct rk_priv_data *bsp_priv) +{ + rk_gmac_integrated_fephy_powerup(bsp_priv, RK3528_VO_GRF_MACPHY_CON0); +} + +static void rk3528_integrated_phy_powerdown(struct rk_priv_data *bsp_priv) +{ + rk_gmac_integrated_fephy_powerdown(bsp_priv, RK3528_VO_GRF_MACPHY_CON0); +} + static const struct rk_gmac_ops rk3528_ops =3D { .set_to_rgmii =3D rk3528_set_to_rgmii, .set_to_rmii =3D rk3528_set_to_rmii, .set_rgmii_speed =3D rk3528_set_rgmii_speed, .set_rmii_speed =3D rk3528_set_rmii_speed, .set_clock_selection =3D rk3528_set_clock_selection, + .integrated_phy_powerup =3D rk3528_integrated_phy_powerup, + .integrated_phy_powerdown =3D rk3528_integrated_phy_powerdown, .regs_valid =3D true, .regs =3D { 0xffbd0000, /* gmac0 */ --=20 2.48.1