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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Geert Uytterhoeven , "Russell King (Oracle)" , Giuseppe Cavallaro , Jose Abreu , Alexandre Torgue Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH net-next v2 1/3] dt-bindings: net: dwmac: Increase 'maxItems' for 'interrupts' and 'interrupt-names' Date: Sat, 8 Mar 2025 20:09:19 +0000 Message-ID: <20250308200921.1089980-2-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250308200921.1089980-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20250308200921.1089980-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Increase the `maxItems` value for the `interrupts` and `interrupt-names` properties to accommodate the Renesas RZ/V2H(P) SoC, which features the `snps,dwmac-5.20` IP with 11 interrupts. Also add `additionalItems: true` to allow specifying extra interrupts beyond the predefined ones. Update the `interrupt-names` property to allow specifying extra `interrupt-names`. Also refactor the optional `interrupt-names` property by consolidating repeated enums into a single enum list. Signed-off-by: Lad Prabhakar --- Note, for this change I will be sending a sperate patch for vendor bindings to add constraints. v1->v2 - No change --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Docume= ntation/devicetree/bindings/net/snps,dwmac.yaml index 3f0aa46d798e..fad0d611a75c 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -114,6 +114,8 @@ properties: =20 interrupts: minItems: 1 + maxItems: 11 + additionalItems: true items: - description: Combined signal for various interrupt events - description: The interrupt to manage the remote wake-up packet det= ection @@ -122,11 +124,11 @@ properties: =20 interrupt-names: minItems: 1 + maxItems: 11 + additionalItems: true items: - const: macirq - enum: [eth_wake_irq, eth_lpi, sfty] - - enum: [eth_wake_irq, eth_lpi, sfty] - - enum: [eth_wake_irq, eth_lpi, sfty] =20 clocks: minItems: 1 --=20 2.43.0 From nobody Mon Feb 9 19:43:27 2026 Received: from mail-ej1-f47.google.com (mail-ej1-f47.google.com [209.85.218.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 723C220C46C; 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Sat, 08 Mar 2025 12:09:49 -0800 (PST) Received: from prasmi.Home ([2a06:5906:61b:2d00:238d:d8a2:7f2b:419e]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac254346ce8sm340766466b.177.2025.03.08.12.09.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Mar 2025 12:09:48 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Geert Uytterhoeven , "Russell King (Oracle)" , Giuseppe Cavallaro , Jose Abreu , Alexandre Torgue Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH net-next v2 2/3] dt-bindings: net: Document support for Renesas RZ/V2H(P) GBETH Date: Sat, 8 Mar 2025 20:09:20 +0000 Message-ID: <20250308200921.1089980-3-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250308200921.1089980-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20250308200921.1089980-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar GBETH IP on the Renesas RZ/V2H(P) SoC is integrated with Synopsys DesignWare MAC (version 5.20). Document the device tree bindings for the GBETH glue layer. Generic compatible string 'renesas,rzv2h-gbeth' is added since this module is identical on both the RZ/V2H(P) and RZ/G3E SoCs. The Rx/Tx clocks supplied for GBETH on the RZ/V2H(P) SoC is depicted below: Rx / Tx Reviewed-by: Rob Herring (Arm) -------+------------- on / off ------- | | Rx-180 / Tx-180 +---- not ---- on / off ------- Signed-off-by: Lad Prabhakar --- v1->v2 - Updated commit description - Updated interrupts description for clarity - Updated interrupt-names for clarity - Updated example node --- .../bindings/net/renesas,r9a09g057-gbeth.yaml | 213 ++++++++++++++++++ .../devicetree/bindings/net/snps,dwmac.yaml | 1 + 2 files changed, 214 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/renesas,r9a09g057= -gbeth.yaml diff --git a/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.= yaml b/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml new file mode 100644 index 000000000000..b3123e258f66 --- /dev/null +++ b/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml @@ -0,0 +1,213 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/renesas,r9a09g057-gbeth.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GBETH glue layer for Renesas RZ/V2H(P) (and similar SoCs) + +maintainers: + - Lad Prabhakar + +select: + properties: + compatible: + contains: + enum: + - renesas,r9a09g057-gbeth + - renesas,rzv2h-gbeth + required: + - compatible + +properties: + compatible: + items: + - enum: + - renesas,r9a09g057-gbeth # RZ/V2H(P) + - const: renesas,rzv2h-gbeth + - const: snps,dwmac-5.20 + + reg: + maxItems: 1 + + clocks: + items: + - description: CSR clock + - description: AXI system clock + - description: PTP clock + - description: TX clock + - description: RX clock + - description: TX clock phase-shifted by 180 degrees + - description: RX clock phase-shifted by 180 degrees + + clock-names: + items: + - const: stmmaceth + - const: pclk + - const: ptp_ref + - const: tx + - const: rx + - const: tx-180 + - const: rx-180 + + interrupts: + items: + - description: Subsystem interrupt + - description: The interrupt to manage the remote wake-up packet det= ection + - description: The interrupt that occurs when Tx/Rx enters/exits the= LPI state + - description: Tx queue0 transmit completion interrupt + - description: Tx queue1 transmit completion interrupt + - description: Tx queue2 transmit completion interrupt + - description: Tx queue3 transmit completion interrupt + - description: Rx queue0 receive completion interrupt + - description: Rx queue1 receive completion interrupt + - description: Rx queue2 receive completion interrupt + - description: Rx queue3 receive completion interrupt + + interrupt-names: + items: + - const: macirq + - const: eth_wake_irq + - const: eth_lpi + - const: tx-queue0 + - const: tx-queue1 + - const: tx-queue2 + - const: tx-queue3 + - const: rx-queue0 + - const: rx-queue1 + - const: rx-queue2 + - const: rx-queue3 + + resets: + items: + - description: AXI power-on system reset + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + - resets + +allOf: + - $ref: snps,dwmac.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + + ethernet@15c30000 { + compatible =3D "renesas,r9a09g057-gbeth", "renesas,rzv2h-gbeth", "= snps,dwmac-5.20"; + reg =3D <0x15c30000 0x10000>; + clocks =3D <&cpg CPG_MOD 0xbd>, <&cpg CPG_MOD 0xbc>, + <&ptp_clock>, <&cpg CPG_MOD 0xb8>, + <&cpg CPG_MOD 0xb9>, <&cpg CPG_MOD 0xba>, + <&cpg CPG_MOD 0xbb>; + clock-names =3D "stmmaceth", "pclk", "ptp_ref", + "tx", "rx", "tx-180", "rx-180"; + resets =3D <&cpg 0xb0>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "macirq", "eth_wake_irq", "eth_lpi", + "tx-queue0", "tx-queue1", "tx-queue2", + "tx-queue3", "rx-queue0", "rx-queue1", + "rx-queue2", "rx-queue3"; + phy-mode =3D "rgmii-id"; + snps,multicast-filter-bins =3D <256>; + snps,perfect-filter-entries =3D <128>; + rx-fifo-depth =3D <8192>; + tx-fifo-depth =3D <8192>; + snps,fixed-burst; + snps,force_thresh_dma_mode; + snps,axi-config =3D <&stmmac_axi_setup>; + snps,mtl-rx-config =3D <&mtl_rx_setup>; + snps,mtl-tx-config =3D <&mtl_tx_setup>; + snps,en-tx-lpi-clockgating; + snps,txpbl =3D <32>; + snps,rxpbl =3D <32>; + phy-handle =3D <&phy0>; + + stmmac_axi_setup: stmmac-axi-config { + snps,lpi_en; + snps,wr_osr_lmt =3D <0xf>; + snps,rd_osr_lmt =3D <0xf>; + snps,blen =3D <16 8 4 0 0 0 0>; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use =3D <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,priority =3D <0x1>; + snps,map-to-dma-channel =3D <0>; + }; + + queue1 { + snps,dcb-algorithm; + snps,priority =3D <0x2>; + snps,map-to-dma-channel =3D <1>; + }; + + queue2 { + snps,dcb-algorithm; + snps,priority =3D <0x4>; + snps,map-to-dma-channel =3D <2>; + }; + + queue3 { + snps,dcb-algorithm; + snps,priority =3D <0x8>; + snps,map-to-dma-channel =3D <3>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use =3D <4>; + + queue0 { + snps,dcb-algorithm; + snps,priority =3D <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,priority =3D <0x2>; + }; + + queue2 { + snps,dcb-algorithm; + snps,priority =3D <0x4>; + }; + + queue3 { + snps,dcb-algorithm; + snps,priority =3D <0x1>; + }; + }; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "snps,dwmac-mdio"; + + phy0: ethernet-phy@0 { + reg =3D <0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Docume= ntation/devicetree/bindings/net/snps,dwmac.yaml index fad0d611a75c..12b59d9a7f9b 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -75,6 +75,7 @@ properties: - qcom,sm8150-ethqos - renesas,r9a06g032-gmac - renesas,rzn1-gmac + - renesas,rzv2h-gbeth - rockchip,px30-gmac - rockchip,rk3128-gmac - rockchip,rk3228-gmac --=20 2.43.0 From nobody Mon Feb 9 19:43:27 2026 Received: from mail-ed1-f50.google.com (mail-ed1-f50.google.com [209.85.208.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF51621322B; Sat, 8 Mar 2025 20:09:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.50 ARC-Seal: i=1; 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Sat, 08 Mar 2025 12:09:50 -0800 (PST) Received: from prasmi.Home ([2a06:5906:61b:2d00:238d:d8a2:7f2b:419e]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac254346ce8sm340766466b.177.2025.03.08.12.09.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Mar 2025 12:09:50 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Geert Uytterhoeven , "Russell King (Oracle)" , Giuseppe Cavallaro , Jose Abreu , Alexandre Torgue Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH net-next v2 3/3] net: stmmac: Add DWMAC glue layer for Renesas GBETH Date: Sat, 8 Mar 2025 20:09:21 +0000 Message-ID: <20250308200921.1089980-4-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250308200921.1089980-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20250308200921.1089980-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Add the DWMAC glue layer for the GBETH IP found in the Renesas RZ/V2H(P) SoC. Signed-off-by: Lad Prabhakar --- v1->v2 - Dropped __initconst for renesas_gbeth_clks array - Added clks_config callback - Dropped STMMAC_FLAG_RX_CLK_RUNS_IN_LPI flag as this needs investigation. --- drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 ++ drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + .../stmicro/stmmac/dwmac-renesas-gbeth.c | 165 ++++++++++++++++++ 3 files changed, 177 insertions(+) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth= .c diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethe= rnet/stmicro/stmmac/Kconfig index 3c820ef56775..2c99b23f0faa 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -131,6 +131,17 @@ config DWMAC_QCOM_ETHQOS This selects the Qualcomm ETHQOS glue layer support for the stmmac device driver. =20 +config DWMAC_RENESAS_GBETH + tristate "Renesas RZ/V2H(P) GBETH support" + default ARCH_RENESAS + depends on OF && (ARCH_RENESAS || COMPILE_TEST) + help + Support for Gigabit Ethernet Interface (GBETH) on Renesas + RZ/V2H(P) SoCs. + + This selects the Renesas RZ/V2H(P) Soc specific glue layer support + for the stmmac device driver. + config DWMAC_ROCKCHIP tristate "Rockchip dwmac support" default ARCH_ROCKCHIP diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/eth= ernet/stmicro/stmmac/Makefile index 594883fb4164..91050215511b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_DWMAC_LPC18XX) +=3D dwmac-lpc18xx.o obj-$(CONFIG_DWMAC_MEDIATEK) +=3D dwmac-mediatek.o obj-$(CONFIG_DWMAC_MESON) +=3D dwmac-meson.o dwmac-meson8b.o obj-$(CONFIG_DWMAC_QCOM_ETHQOS) +=3D dwmac-qcom-ethqos.o +obj-$(CONFIG_DWMAC_RENESAS_GBETH) +=3D dwmac-renesas-gbeth.o obj-$(CONFIG_DWMAC_ROCKCHIP) +=3D dwmac-rk.o obj-$(CONFIG_DWMAC_RZN1) +=3D dwmac-rzn1.o obj-$(CONFIG_DWMAC_S32) +=3D dwmac-s32.o diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c b/dr= ivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c new file mode 100644 index 000000000000..7527387f30a0 --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dwmac-renesas-gbeth.c - DWMAC Specific Glue layer for Renesas GBETH + * + * The Rx and Tx clocks are supplied as follows for the GBETH IP. + * + * Rx / Tx + * -------+------------- on / off ------- + * | + * | Rx-180 / Tx-180 + * +---- not ---- on / off ------- + * + * Copyright (C) 2025 Renesas Electronics Corporation + */ + +#include +#include +#include +#include +#include + +#include "dwmac4.h" +#include "stmmac_platform.h" + +struct renesas_gbeth { + struct device *dev; + void __iomem *regs; + unsigned int num_clks; + struct clk *clk_tx_i; + struct clk_bulk_data *clks; + struct reset_control *rstc; +}; + +static const char *const renesas_gbeth_clks[] =3D { + "rx", "rx-180", "tx-180", +}; + +static int renesas_gbeth_clks_config(void *priv, bool enabled) +{ + struct renesas_gbeth *gbeth =3D priv; + int ret; + + if (enabled) { + ret =3D reset_control_deassert(gbeth->rstc); + if (ret) { + dev_err(gbeth->dev, "Reset deassert failed\n"); + return ret; + } + + ret =3D clk_prepare_enable(gbeth->clk_tx_i); + if (ret) { + dev_err(gbeth->dev, "Tx clock enable failed\n"); + reset_control_assert(gbeth->rstc); + return ret; + } + + ret =3D clk_bulk_prepare_enable(gbeth->num_clks, gbeth->clks); + if (ret) + clk_disable_unprepare(gbeth->clk_tx_i); + } else { + clk_bulk_disable_unprepare(gbeth->num_clks, gbeth->clks); + clk_disable_unprepare(gbeth->clk_tx_i); + ret =3D reset_control_assert(gbeth->rstc); + if (ret) + dev_err(gbeth->dev, "Reset assert failed\n"); + } + + return ret; +} + +static int renesas_gbeth_probe(struct platform_device *pdev) +{ + struct plat_stmmacenet_data *plat_dat; + struct stmmac_resources stmmac_res; + struct device *dev =3D &pdev->dev; + struct renesas_gbeth *gbeth; + unsigned int i; + int err; + + err =3D stmmac_get_platform_resources(pdev, &stmmac_res); + if (err) + return dev_err_probe(dev, err, + "failed to get resources\n"); + + plat_dat =3D devm_stmmac_probe_config_dt(pdev, stmmac_res.mac); + if (IS_ERR(plat_dat)) + return dev_err_probe(dev, PTR_ERR(plat_dat), + "dt configuration failed\n"); + + gbeth =3D devm_kzalloc(dev, sizeof(*gbeth), GFP_KERNEL); + if (!gbeth) + return -ENOMEM; + + plat_dat->clk_tx_i =3D devm_clk_get(dev, "tx"); + if (IS_ERR(plat_dat->clk_tx_i)) + return dev_err_probe(dev, PTR_ERR(plat_dat->clk_tx_i), + "error getting tx clock\n"); + + gbeth->clk_tx_i =3D plat_dat->clk_tx_i; + gbeth->num_clks =3D ARRAY_SIZE(renesas_gbeth_clks); + gbeth->clks =3D devm_kcalloc(dev, gbeth->num_clks, + sizeof(*gbeth->clks), GFP_KERNEL); + if (!gbeth->clks) + return -ENOMEM; + + for (i =3D 0; i < gbeth->num_clks; i++) + gbeth->clks[i].id =3D renesas_gbeth_clks[i]; + + err =3D devm_clk_bulk_get(dev, gbeth->num_clks, gbeth->clks); + if (err < 0) + return err; + + gbeth->rstc =3D devm_reset_control_get_exclusive(dev, NULL); + if (IS_ERR(gbeth->rstc)) + return PTR_ERR(gbeth->rstc); + + gbeth->dev =3D dev; + gbeth->regs =3D stmmac_res.addr; + plat_dat->bsp_priv =3D gbeth; + plat_dat->set_clk_tx_rate =3D stmmac_set_clk_tx_rate; + plat_dat->clks_config =3D renesas_gbeth_clks_config; + plat_dat->flags |=3D STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY | + STMMAC_FLAG_EN_TX_LPI_CLOCKGATING | + STMMAC_FLAG_SPH_DISABLE; + + err =3D renesas_gbeth_clks_config(gbeth, true); + if (err) + return err; + + err =3D stmmac_dvr_probe(dev, plat_dat, &stmmac_res); + if (err) { + renesas_gbeth_clks_config(gbeth, false); + return err; + } + + return 0; +} + +static void renesas_gbeth_remove(struct platform_device *pdev) +{ + stmmac_dvr_remove(&pdev->dev); + + renesas_gbeth_clks_config(get_stmmac_bsp_priv(&pdev->dev), false); +} + +static const struct of_device_id renesas_gbeth_match[] =3D { + { .compatible =3D "renesas,rzv2h-gbeth", }, + { /* Sentinel */ } +}; +MODULE_DEVICE_TABLE(of, renesas_gbeth_match); + +static struct platform_driver renesas_gbeth_driver =3D { + .probe =3D renesas_gbeth_probe, + .remove =3D renesas_gbeth_remove, + .driver =3D { + .name =3D "renesas-gbeth", + .pm =3D &stmmac_pltfr_pm_ops, + .of_match_table =3D renesas_gbeth_match, + }, +}; +module_platform_driver(renesas_gbeth_driver); + +MODULE_AUTHOR("Lad Prabhakar "); +MODULE_DESCRIPTION("Renesas GBETH DWMAC Specific Glue layer"); +MODULE_LICENSE("GPL"); --=20 2.43.0